Digital synthesizer frequency-modulated signals

 

(57) Abstract:

Digital synthesizer frequency-modulated signals relates to electronic computing, designed for the synthesis of signals with frequency modulation and can be used in radar, navigation, adaptive broadband communication systems and in systems with software frequency. Technical result achieved is to enhance the functionality and improve the linearity of the law of variation of the frequency and phase of the oscillations at the output of the device while maintaining its performance. Digital synthesizer frequency-modulated signals comprises a generator of clock pulses, the delay block, the block of continuous memory, two memory registers, two digital drive, the code Converter, d / a Converter, low pass filter, two adder, a phase error corrector, corrector error frequency divider with variable division factor. 2 Il.

The invention relates to electronic computing, designed for the synthesis of signals with frequency modulation and can be used as part of adaptive systems HF and VHF radio, radar, and navigation.

Known znaniya, the preset counters, multiplier codes, the drive, the code Converter, d / a Converter, low pass filter, the memory register [1].

The closest technical solution (prototype) to the proposed digital frequency synthesizer containing serially connected clock and the delay unit, connected in series, the first block of continuous memory and preset counters, the second block of continuous memory, the second register memory, the second memory, the first register memory, the first memory, the code Converter, digital to analog Converter, a low pass filter whose output is the output unit of the digital frequency synthesizer (CSC), and the inputs are the address inputs of the first and second blocks of constant memory [2] .

However, the known frequency synthesizers do not provide a sufficiently high degree of linearity of the law of change of frequency and phase.

The invention allows to increase the linearity of the law of changes of the main parameters of the signal to extend the functionality of the digital synthesizer signal when the speed is th compared with the existing frequency synthesizers - is due to the fact that in the digital synthesizer is frequency-modulated signal that contains one United block of continuous memory and the first memory register, connected in series, the first digital memory and the second memory register, connected in series, a second digital storage device, the code Converter, digital to analog Converter and a low pass filter whose output is an analog output of the synthesizer, the divider with a variable division ratio, the output of which is connected to the input of the serial transfer of the first digital drive, connected in series, the reference generator and the delay unit whose outputs are connected respectively to the clock inputs of the first register memory divider with a variable division ratio, the second memory register and a digital-to-analogue Converter, the inputs of the synthesizer are informational inputs of the divider with variable division factor and the address inputs of a block of continuous memory, an input phase error corrector, inputs connected to the outputs of the code Converter, and outputs to the second inputs of the first adder, and the offset error frequency inputs connected to the outputs of the first memory register, a second adder, the first digital drive series-connected second memory register, the first adder, the second digital storage device.

In Fig. 1 shows a structural diagram of a digital synthesizer is frequency-modulated signals, in Fig. 2 is a timing diagram of operation of the device.

Digital synthesizer FM signal (Fig. 1) contains a reference (reference) generator 1, the delay unit 2, block permanent memory 3, the first register memory 4, the first digital memory 5, the second register memory 6, the second digital memory 7, the code Converter 8, a d / a Converter 9, a low-pass filter 10, the phase error corrector 11, the first adder 12, the offset error frequency 13, the second adder 14, a divider with a variable division ratio of 15.

Digital synthesizer FM signals consists of series-connected blocks of constant memory 3, the first memory register 4, the second adder 14, the first digital memory 5, the second memory register 6, the first adder 12, the second digital memory 7, the code Converter 8, digital to analogue Converter 9, the lowpass filter 10 whose output is an analog output of the entire device; soedinenja memory register 4, divider 15, a second register memory 6, a digital-analog Converter 9, respectively; the outputs of the code Converter 8 is connected to the inputs of the phase error corrector 11, the outputs of which are connected to second inputs of the first adder 12, and the outputs of the second memory register 6 is connected to the inputs of the offset error frequency 13, the outputs of which are connected to second inputs of the second adder 14; informational inputs of the divider with a variable division ratio of 15 are inputs digital synthesizer and determine the rate of change of the frequency of the synthesized signal.

The first ring digital feedback is intended to correct incidental phase modulation of the synthesized signal when switching digital synthesizer with one frequency to another.

The second ring digital feedback designed to increase the linearity of the law of variation of the frequency of the output FM signal.

Digital synthesizer FM signals is as follows.

The address inputs of a block of continuous memory receives address code Aisimultaneously to the information inputs of the divider with variable division factor is served code Kddeterminant of the coefficient d is 2 serves to synchronize the memory registers 4 and 6, divider 15 and d / a Converter 9, and to reduce switching noise on the output of the digital to analogue Converter.

At time t0is zeroing memory registers 4, 6 and write code division ratio Kdin the divider 15. At time t1there is a record number Aiin the first register memory 4. On clock pulse t2the number of Airewritten in the first digital memory 5 through the second adder 14. The output of a digital drive 5 the result of summation is changed according to the formula

S1 = Ai+ T/Kd. (1)

On clock pulse t3the result of the summation corresponds to the second memory register 6 and through the first adder 12 is supplied to the input of the second digital memory 7. At the output of the drive is the result of summation is changed according to the formula

S2 = (Ai+ T/Kd) = AiT + T2/Kd. (2)

On the next clock pulse t4this number is supplied to the code Converter 8, where the high order bit SGN is the sign, and if it is equal to a logical "0", the d / a Converter 9 is supplied direct code, otherwise, if SGN="1", the reverse code.

The digital signal from the output of the code Converter 8 is supplied to the corre is 7 via the first adder 12. The digital code output of the second memory register 6 is fed to the input of the offset error frequency 13, where the calculation of the frequency deviation of Effrom the linear law, and then fed to the input of the second adder 14. The divider with a variable division ratio of 15 is used for operational changes in the rate of change of the frequency of the synthesized signal.

Enabling feedback loops of formula (1), (2) can be written in the form

f = Ai+ T/Kd+ Ef; (3)

< / BR>
Thus, the output signal of the digital synthesizer gives you more functionality in comparison with the prototype and has a more linear law of variation of the frequency and phase of the synthesized FM signal.

Sources of information

1. Patent N 2143173 of the Russian Federation, MKI H 03 B 19/00. A digital frequency synthesizer. / Ryabov, I. C. , Ryabov Century. And. - Appl. 04.02.99. Publ. 20.12.1999. Bull. N 35.

2. Patent N 2058659 of the Russian Federation, MKI H 03 B 19/00. A digital frequency synthesizer. / Ryabov, I. C., Fishchenko P. A. - Appl. 23.09.93. Publ. 20.04.1996. Bull. N 11 (prototype).

Digital synthesizer frequency-modulated signal that contains one United block of continuous memory and the first memory register, sequentially th drive, the code Converter, digital to analog Converter and a low pass filter whose output is an analog output of the synthesizer, the divider with a variable division ratio, the output of which is connected to the input of the serial transfer of the first digital drive, connected in series, the reference generator and the delay unit whose outputs are connected respectively to the clock inputs of the first register memory divider with a variable division ratio of the second memory register and a digital-to-analogue Converter, the inputs of the synthesizer are informational inputs of the divider with variable division factor and the address inputs of a block of continuous memory, characterized in that the synthesizer entered the phase error corrector, connected the inputs to the outputs of the code Converter, and outputs to the second inputs of the first adder, and the offset error frequency inputs connected to the outputs of the second memory register, and outputs to the second inputs of the second adder, with series-connected first memory register, a second adder, the first digital

drive, are connected to the second register memory, the first adder and the second digital storage device.

 

Same patents:

The invention relates to electronic computing techniques and can be used for synthesis of signals with frequency modulation radar, adaptive communication systems

The invention relates to electronic computing, designed for the synthesis of signals with frequency modulation (FM) and can be used in radar, adaptive broadband communication systems

The invention relates to frequency synthesis and can be used in a communication system

The invention relates to transceivers of the radio communication systems, in particular to a circuit and method of phase synchronization for the system phase adjustment (PLL) in a radio transceiver

The invention relates to radio communication and can be used in systems using hopping operating frequency

The invention relates to electrical engineering and can be used in transmitting and receiving devices

The invention relates to frequency synthesizers, and in particular to the synths fractional N frequency, in which the formation of selectable output frequencies while reducing unwanted frequency treatments

The invention relates to measuring technique and can be used in conjunction with electromagnetic structurename for fault detection and structurele products, in particular, by the method of eddy currents

The invention relates to electronic computing, designed for the synthesis of signals with frequency modulation (FM) and can be used in radar, adaptive broadband communication systems

The invention relates to electrical engineering and can be used in transmitting and receiving devices

The invention relates to the field of radio electronics and can be used in devices for various purposes, such as managed lo or sensors discrete set of frequencies

The invention relates to electrical engineering and can be used in transmitting and receiving devices

The invention relates to electronics and can find application in devices for generating a voltage sine wave, for example, as local oscillators for frequency converters or frequency synthesizers kalogiratou and low-frequency ranges

The invention relates to techniques for ultra-high frequencies

The invention relates to measuring and computing and can be used in systems digital signal processing

FIELD: radio communications.

SUBSTANCE: device has phase-inverse cascade, two-tact cascade, active elements of which at output are connected in parallel and connected to load, while source electrodes of active elements are connected to outputs of phase-inverse cascade and through source resistor to common point of device, while control electrodes of active elements through blocking capacitors are connected to common point of device.

EFFECT: broader functional capabilities, higher efficiency.

1 dwg

Up!