Process for the selective programming of non-volatile memory

 

(57) Abstract:

The invention relates to the field of programming non-volatile storage. The technical result is to reduce energy consumption. How is that first put a negative programming voltage to all tyres words WLi, WLj, and then all messelektronik tyres words WLj apply a positive voltage to compensate them negative charges. 2 C.p. f-crystals, 2 Il.

Programmable non-volatile cumulative cell (memory cell) are in an electrically floating state, the gate electrode, the so-called "floating gate" ("Floating Gate"). This floating gate is separated by an insulating layer from a channel region of cumulative cell that is otherwise made in the form of a MOS transistor, and the electrode of the control gate and located between them.

Programming of the cell is due to the fact that the floating gate electrode is applied charge. Due to this charge changes the threshold voltage, i.e. the voltage at which forming of the cumulative cell field MOS transistor begins to conduct. When reading the cell, then to control grammirovanie and programmed cell. Depending on flows do then talk, read, or logical "0" or logical "1".

Still there are two ways that can be applied to the charges on the floating gate. In the first method, to the control gate is applied a high positive voltage of about 12 V, while the drain and source forming a cumulative cell MOS transistor is applied typically 7 or 0, that is normal for MOS circuits working voltage. Due to this, through the channel of the MOS transistor flows in a strong current, from which the so-called "hot" electrons hit the "floating gate".

Another way to control shutter apply the high negative voltage of about 12 V, while the drain applied voltage of about 5 V. For this hole tunneling through the gate oxide to the floating gate and charge it positively, due to which the threshold voltage generating cumulative cell MOS transistor decreases.

This method though has the advantage that when charging the floating gate through the channel does not flow any current losses, however, creates the problem of requiring selective vklyucheno here can not be applied, as its n-doped region of the drain or the source for the application of a negative voltage formed would be quasi-short circuit linked with the case of p-doped substrate.

So is the normal position for this purpose n-channel MOS transistors in the p-doped tub, isolated because of the deep n-stainless steel tubs. Here, however, there are additional technology costs, special equipment, such as high-energy installation for ion implantation, and the risk of possible charges isolated tubs and associated stress the gate oxide during the process.

Another solution is known from EP 0 456 623 A2. There is a high negative voltage to include bus words non-volatile memory through the p-channel MOS transistors. These p-channel MOS transistors though and can be produced by the conventional methods, however, require to enable negative voltage of the gate. It is generated by inverting the voltage circuits from a high positive voltage. In any case, these inverting voltage circuit is required for each bus that requires considerable circuit-technical outlay.

The present invention is to specify a process for the selective application of negative programming voltage to the bus words non-volatile memory in which the above disadvantages are eliminated.

This problem is solved by a method according to clause 1 of the claims.

In the method according to the invention, the negative voltage is applied simultaneously to all tires of words, for example, via appropriately included as a diode p-channel MOS transistor. That is not required for selective inclusion of high negative voltage. This results in a simplification of the circuitry in the non-volatile memory, as they require only standard circuitry. Also requires only one standard technology, as it does not need any special insulation of the substrate relative to a negative voltage.

Elektrownie individual tires of words is the method according to the invention by compensating negative charges on all messelektronik tyre words. This is done by application of a positive example is the provisions do not create any problems of the above type.

The invention is illustrated below by the example of execution with the help of figures, which show:

Fig. 1 is a schematic representation of the non-volatile memory for implementing the method according to the invention;

Fig. 2 is a time chart for a visual representation of the method according to the invention.

Schematically shown in Fig. 1 non-volatile memory shows the cumulative matrix of an ordered structure with cumulative ST cells arranged in rows and columns. Cumulative cell ST can be selected via bus words WL1...WLi, WLi+1 and bit (bit) bus... BLi-1, BLi, BLi+1... in order to have the possibility of programming, erasing and reading. For programming specific cumulative STi cell to the corresponding bus words WLi should kiss high negative programming voltage to the corresponding bit bus BLi normal positive voltage of about 5 C. High negative voltage generated by the negative charge pump NLP and through the diode D, which is formed by p-channel MOS transistors, is applied simultaneously to all tyres words WL1... WLi, WLi+1... All tyres words WL1... WLi, WLi+1... through switches S can svedka 5th Century The switches S are controlled by the circuit SEL to select bus words. They can, for example, be formed of CMOS inverters.

In Fig. 2 presents the time course of the method according to the invention. At time t0 include a negative charge pump NLP. It creates point-in-time t1 required high voltage of about -12 C. This voltage is simultaneously applied through the diode D to all tyres words WL1... WLi, WLi+1. .. so that they are charged to negative voltages. This is shown in Fig. 2 for selected for silage preparation or respectively selected bus words WLi and the unselected tyres words WLj. At time t2, the negative charge pump NLP off again. To the next shortly after the time t3, the switches S of all unselected tyres words WLj closed so that these tyres words WLj is connected with a positive voltage on the negative charges due to this offset. Due to the diodes D of these positive charges have no impact on the selected bus words WLi so that it retains its negative charge. The time of discharge thus negatively charged tyres words WLi can be many seconds so that there is dostatus, to program the selected cumulative cell or selected cumulative STi cell. After the time t4 the last programming pulse has been applied to bit bus BLi, the programming process is complete and tyres words WLi and WLj are in a neutral state.

1. Process for the selective application of negative programming voltage to the bus words WLi non-volatile memory with consecutive steps: a) application of negative programming voltage to all tyres words (WLi, WLj), (b) disconnect the negative programming voltage so that all tires of words (WLi, WLj) are in a floating state, (C) the application of a positive voltage to all messelektronik tyres words (WLj).

2. The method according to p. 1, characterized in that the negative programming voltage is applied to the tires of words (WLi, WLj) through the diode (D).

3. The method according to p. 2, characterized in that the diode (D) is formed by p-channel MOS transistors.

 

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