The moving image decoder and a method of recording data group signal in a synchronous dynamic device

 

(57) Abstract:

The invention relates to techniques decoders moving image. The decoder includes a storage device group data for storing the reference image used for motion compensation, synchronous dynamic storage device, random access, a motion compensator, in which synchronous dynamic storage device, random access is made with the ability to read and write data of the data group. The technical result of the invention is to provide a decoder that performs the prediction motion compensation with high speed, and a method of recording video with one frame in the synchronous dynamic memory device with random access. 2 C. and 7 C.p. f-crystals, 18 ill.

The present invention relates to a memory frame for use in the decoder of the moving image, in particular to a frame memory which can perform motion compensation with high speed, in which synchronous dynamic storage device, random access (SZOPV) is used to store a reference image.

In General, this system's audio and video signals. The video encoder performs orthogonal transformation, quantization, variable length coding and motion estimation and compensation coding with respect to the input video signals.

Fig. 1 depicts a device for decoding video data encoded by the above-mentioned encoder. In Fig. 1 shows a video decoder, the variable length decoder 11 decodes the variable length of the received encoded data. Inverse quantization 12 quantum with the inversion data of the decoded variable length. The inverse discrete cosine transformer (inverse DCT) 13 transforms with the inverse quantized data into video data having a spatial region. The motion compensator 14 reads the video data of the macroblock corresponding to the motion vector from the memory 15 of the frame, and performs motion compensation relative to the video data received from the inverse DCT 13. The motion compensated video data is displayed in the unit of the lower thread (not shown) and stored in the memory 15 of the frame that will be used for subsequent motion compensation. Here, you use the motion vector decoder 11 variable length, which comes from the encoder, together with the encoded motion vector, from the frame memory 15. There are two kinds of predictions: the first is "the field of forecasting" in relation to the reference field image stored in the frame memory 15; and another "prediction frame relative to a reference image frame stored in the frame memory 15. Meanwhile, the image is classified in the "image field", which is decoded or encoded in units of fields, and "picture frame", which is decoded or encoded in units of a frame. Two field image corresponding to one frame, composed of top fields and bottom fields. The image field is used only for prediction of field, the image frame is used for prediction field and the prediction frame. To handle such a prediction without delay, the data stored in the frame memory 15, should quickly be read. However, since the amount of movement of data between the images becomes larger, a larger amount of data must be read from the memory 15 of the frame. As a result, you want the memory 15 of the frame quickly withdraw the stored data.

Summary image

The aim of the present invention is to provide using SZOPV, which operates even at a frequency of about 100 MHz as a memory frame.

Another objective of the present invention is to provide a method for recording a video signal of one frame to harmonize with features SZOPV.

In order to achieve the above objective of the present invention, it is necessary to provide a moving image decoder that uses SZOPV as memory frame.

In the claimed method of recording video with one frame of the video contains many clippings that include many macroblocks.

According to the claimed method for recording a video signal of one frame optionally assign one clipping of the signal region, consisting of 128 columns and N rows (N is a natural number) in SZOPV by assigning the next number N of rows SZOPV for every eight macroblocks in each tenderloin video from a variety of clippings.

The claimed method for recording a video signal of one frame optionally also includes the step of assigning the same address range for eight macroblocks in each of the four video clips by assigning Bank SZOPV to write Karditsa specific variant of its embodiment with reference to the accompanying drawings, are:

Fig. 1 is a block diagram of the main moving image decoder;

Fig. 2 - video depicts one of the main frame;

Fig. 3 - depicts a video from one plate shown in Fig. 2;

Fig. 4 - depicts the structure SZOPV according to the present invention;

Fig. 5 is an image explaining the way the video data of one macroblock in SZOPV according to the present invention;

Fig. 6 is an image explaining the way the video with one plate in SZOPV according to the present invention;

Fig. 7 is an image explaining the way the video one frame at SZOPV according to the present invention;

Fig. 8 is an image explaining the way the video one frame at SZOPV, from the point of view of data;

Fig. 9 is a conceptual diagram for explaining a prediction macroblock indicated by the motion vector in units of integer pixels;

Fig. 10 is a conceptual diagram for explaining a prediction macroblock indicated by the motion vector in units of half-PEL;

Fig. 11 shows a variant embodiment of the prediction frame in the image frame;

Fig. 12 - image which I predict field in an image field;

Fig. 14 is a chart synchronization, showing the commands that follow from the combination of signals input control in SZOPV;

Fig. 15 is a chart synchronization explaining the write operation of the recorded video data of one macroblock relative to SZOPV according to the present invention;

Fig. 16A-16C - chart synchronization explaining a read operation of the read part of the prediction macroblock shown in Fig. 11;

Fig. 17A and 17B is a table showing the change of address lines and the Bank each block shown in Fig. 11;

Fig. 18A and 18B is a view showing the relationship between the address column of the prediction macroblock and the relationship between the address column of the actual memory.

A detailed description of the preferred variant embodiment of the invention

Fig. 2 and 3 images explaining the structure of one frame of the encoded digital video data. In Fig. 2, one frame is composed of 1920 horizontal pixels and vertical 1088 lines, and one clipping frame composed of horizontal 1920 pixels and 16 vertical lines within one frame. That is, one frame is composed of 68 clippings SO-S67. Assuming that 16 horizontal pixels is one word is as a horizontal one word, multiplied by 16 vertical lines. Thus, one notch video consists of 120 macroblocks MO M, as shown in Fig. 3.

Fig. 4 depicts the structure SZOPV, which is used in the present invention. The main feature SZOPV is that all signals are working with the synchronizing clock pulse. Thus, unlike other storage devices with random access (NVR), working during the time interval defined by the pulse width control signal, SZOPV generates a control signal to perform the relevant operations are synchronous with a clock pulse. Memory frame processing module data words, for example, 16 bits in this variant embodiment. Accordingly, it is possible to construct the frame memory through 8 SZOPV, each of which has a 16-bit data bus parallel to each other.

As shown in Fig. 4, SZOPV consists of two banks, each of which has 256 columns to 2048 lines. In this SZOPV address string is defined by the 11-bit pins a10-AO, and the column address is determined by the 8-bit input pins A[7...0]. Address of the Bank is also determined by the input output A11. In the following s, explaining image location video data of one frame in SZOPV according to the present invention. As shown in Fig. 5, one macroblock of video data is represented as one word by 16 lines, horizontal 16 on the vertical columns of a single row of SDRAM. As eight consecutive macroblocks are located on the same line, the video on one plate is located in 128 columns by 15 rows in SZOPV, as shown in Fig. 6. Serial two cuttings are set in the same Bank SZOPV. Serial four cuttings are 512 columns by 15 rows in SZOPV. Then, following four consecutive clippings are arranged with a space from one line of the previous consecutive four scrapbooks. In other words, one line is for every other sequential patterns with four clips. Accordingly, 255 address lines actually are image data of one frame among 272 address line represented by the equation in the form

R=16i=j

where i is a natural number from 0 to 16 and j is a natural number from 0 to 14.

Thus, video data, with 68 clippings SO-S67, i.e., video data of one frame in Berlin is Asano in Fig. 7, eight macroblocks contained in the four cutouts have the same address line in SZOPV. Fig. 7 depicts the location of the video clips in SZOPV, and Fig. 8 depicts the relationship between the address line and the word SZOPV relative to the video data of one frame. Eight macroblocks having the same address, which is shown in Fig. 7, depicted as eight words that have the same address lines, which are shown in Fig. 8.

Fig. 9 is a conceptual diagram for explaining a prediction macroblock indicated by the motion vector in integer units. In the case where the motion vector represents even modules with half the pixels, it is necessary that the prediction macroblock had a video with one horizontal pixel and vertical line compared to a macroblock having a size of 16 by 16 pixels in performing the motion compensation. In this case, a prediction macroblock has a size equal to two said horizontal and 17 vertical lines, as shown in Fig. 10. When the vertical components of the motion vector is constant, and the horizontal components therefore vary in the range 0-15, a prediction macroblock having a size of the data areas, it is shown in Fig. 10. In this case, used for reading video data from the memory macroblocks are not changed. As a method of motion compensation using the motion vector even with the module half-pixel well known, detailed description will be omitted.

Fig. 11-13 represent views for explaining the sequence of reading the video data stored in SZOPV with different types of forecasting. Video with 8 words per line 64, which is shown in Fig. 11-13, have any one address line, which is shown in Fig. 8. Fig. 11 depicts a possible device prediction of the macroblock relative to the image frame, which is used to predict the frame. Fig. 12 depicts a possible device prediction of the macroblock relative to the image frame used for prediction of the field. For example, in Fig.12 uses the same image frame, as in Fig. 11, therefore, the reading of macroblocks to predict similar to Fig. 11. However, since the prediction is performed in units of fields, the data is read one line into two lines. Fig. 13 depicts a variant embodiment of the predictions of the field in the image field. One plate image is reflected field is located in one tenderloin (two clips) within the same address lines and address of the Bank, as shown in Fig. 7. Thus, the video data of two lines relative to single words are read 17 times higher than 34 lines, as shown in Fig. 13.

Fig. 14 is a chart synchronization, showing the control commands, the following combination of input control signals SZOPV. The control input signals are a signal sample chip /CS to provide SZOPV, the signal of the gate line address /RAS and the signal address strobe column /CAS, respectively, representing that the input address is an effective address and row address column, and the signal providing recording /WE to write data in the corresponding address. Control commands shown in Fig. 14, such as low signal steps (a), the signal is read (r), the recording signal (w) and the signal Prekrasnaya (R), are prepared according to the combination of input control signals. The number of signals of the control commands, composed of these commands is used to control SZOPV.

The write operation and the read video data to and from SZOPV using this command signal control will be described below. As for the address of a string represented in equation

R=16i=j

and address of the column represented in equation

C = 128k + 161,

the time chart, the operation of the video recording of the macroblock with a motion compensation SZOPV. In Fig. 15, data of the twenty-seventh macroblock M26 in the fifth plate S4 is recorded in the position memory having address lines from

19 (= 16 1+ 3)

and the column address from

32 (= 16 2),

video data of one macroblock is synchronized with 16 clock pulses and recorded at appropriate positions in the SDRAM.

The read operation prediction macroblocks of video data from SZOPV will be described respectively in Fig. 16A-16C.

Fig. 16A is a timing diagram for reading a prediction macroblock As shown in Fig. 11. Prediction macroblock Fig. 11 belongs to the respective macroblocks having the same address of the Bank and row. Accordingly, 34 data signal DQ[7.0] (=17 lines, 2 words) are read during generation 34 of clock pulses, using commands such as the signal is low steps (a), the recording signal (r) and the signal Prekrasnaya (R), shown together with the predictive macroblock And Fig. 17A and 17B. Here the first column address in the first place, read the corresponding macroblock becomes

33 (=16 x 2 + 1)

Data sixteenth line in predictive macroblock And belong plates 160 (= 128 +162),

but not 46. If the sixteenth and seventh data lines are completely read, then read the next word, belonging to the prediction macroblock And in which the column address becomes

49 (= 163+1).

Fig. 16B is a timing diagram for reading a prediction macroblock In Fig. 11. Prediction macroblock (Fig. 11) has one address line two address of the Bank, as shown in Fig. 17A and 17B, whose starting address is the column becomes

163 (= 128 + 16 2 3).

Then, when the second data word belonging to the prediction macroblock To be read, the address of the Bank is changed, so as to start to read data starting from the data having the address column

179 (= 12 + 163 + 3).

When the data line, whose Bank address is changed within the same prediction macroblock is read as data in the fourteenth line in a prediction macroblock In the memory having the structure of a single Bank, 13 reads the data signals and then queries the command signal low steps (a) to read data starting from the data of the fourteenth line upon receiving the command signal Prekrasnaya (R). However, the present invention uses SZOPV having two banlance for duration of blank clock pulse between the signal read (r) and signal Prekrasnaya (R). Thus, if you use this structure of the Bank with the alternation of the Bank, you can save time when data is read and written.

Fig. 16C is a timing chart for reading the prediction of the macroblock E, shown in Fig. 11.

Prediction macroblock E Fig. 11 has a different address line in two words, as shown in Fig. 17A and 17B. Therefore, commands like low active signal (a) signal read (r) and signal Prekrasnaya (R) is required when reading each word. Since the read operation of data belonging to the prediction macroblock E clear to the person skilled in the technique of the above examples, a detailed description will be omitted. The above-described examples of figs. 16A-16C use SZOPV, which is designed in such a way that the signal strobe to column address /CAS off three clock pulses before the processing of the data becomes effective.

Fig. 17A and 17B is a table showing the addresses of the row and Bank each prediction macroblock shown in Fig. 11.

Fig. 17A depicts a change of address lines relative to the control commands (a).


R+16+1.

If the address line is equal to R [10...0], the address of the row in the prediction frame is represented in the form:

R[10...0] = Fp[10...0] + Sp [6...2] x 16+ Mr[6...3],

where Ep is the prediction frame address, Sp address plate

Mr - prediction macroblock address, which is expressed by the following equations:

Sp [] = Sc [1+ Vy[7...4] and Mr []= Me []+ Vx[7...4],

where Sc [] Me [] - the current address of the plate and the current address of the macroblock, respectively.

Vx [], Vy [] the motion vectors horizon the locks. Thus, the address lines are not affected when the number of blocks is less than eight. The line also changes in modules of four plates in the case where the address lines are not affected when the number of plates is less than four, Sp[l] among the bits that are not used in the address plate is included with the address of the Bank. Sp [0] and Mr [2. . .0], which are not used in the examples above, are used as the column address, which will be described with reference to Fig. 18A and 18B. In the case listed in the file, forecasting, string address is represented in the form

R[10...0] = Fp(10...0] + Sp [5...1] (16+ Mp [6...3].

Fig. 18A and 18B is a view showing how the address column of the prediction macroblock correspond to actual memory addresses. Fig. 18A represents a case of prediction frame. The address column of the prediction macroblock is composed of eight bits, in which the four lower bits are used as the lower bits Vy[3. ..0] of the vertical motion vector. The fifth bit from the lowest bit 9(LSB) is used as the LSB Sp[0] prediction address plates, and three higher bits are used as the three more significant bits of Mr [2..] prediction address of the macroblock. Sa is the value of the counter, which takes the initial Adra is sa on the interval control commands (r). b also represents the column address of the actual memory corresponding to the counter value CA. The fact that the column address of the actual memory is not equal to the counter value that is incremented by one, due to the above method of processing a video signal according to the present invention. That is, if the vertical motion vector becomes larger than 16 lines, resulting from the increment counter value per unit change in the address of the tenderloin. Then, after reading a single word, the address of the macroblock is incremented by eight. However, the column address assigned to the actual memory, replaces the address of the tenderloin after eight macroblocks, each of which has 16 transitions lines. Selecting a prediction macroblock (Fig. 11) as an example, the sixteenth data is read synchronously with the sixteenth clock pulse. That is, the data of 16 lines of one word is read, when the value of the counter CA is 16. However, the actual address of the sixteenth column line becomes equal to the unit after the transition eighth macroblock of the address column of the fifteenth line. Thus, you want the counter to generate the initial values of a column address corresponding to the address of the actual memory.

Fig. 18B of the optical memory. As is shown in Fig. 11 and 13, one tenderloin image of the field assigned to the same memory area as the area of the two cutouts in the image frame. Thus, in the case of an image field, the border of the tenderloin - it's the same boundary Bank, which does not require a prediction of the address plate Sp [], shown in Fig. 18A. Thus, if the vertical motion vector becomes larger than 16 lines, changes the address of the Bank. Then, the least significant bit b (0] in the address column of the memory is used to distinguish between the top field and the bottom field.

In the above embodiment, the embodiment of the present invention, one word is defined as a horizontal 16 pixels of one frame. You can, however, make one word two, four or eight pixels.

As described above, the memory frame in the moving image decoder according to the present invention embodies the use of SZUPER, which can operate at high speed, in which moving image data for one frame are respectively SZOPV, allowing, thus, to handle the complexity of the prediction motion compensation using the memory frame.

1. The decoder rolling image for motion compensation, characterized in that it contains synchronous dynamic storage device, random access (SZOPV) used as memory group data.

2. The moving image decoder under item 1, characterized in that it also contains a motion compensator, and in which SZOPV made with the ability to read and write data of the data group in the expansion joint movement.

3. Notation data group signal in the synchronous dynamic memory with random access (SZOPV), and the video contains a number of macroblocks in length in one word consists of 16 vertical lines, characterized in that a further 16 vertical lines each macroblock from a variety of 16 macroblocks in the horizontal columns SZOPV.

4. Notation data group signal in the synchronous dynamic memory with random access (SZOPV) under item 3, characterized in that the video signal contains many clippings that include many of macroblocks, the method also includes the step of assigning one cut of the video area, consisting of 128 columns and N rows (N is a natural number), SZOPV by the VA clippings.

5. Notation data group signal in the synchronous dynamic memory with random access (SZOPV) p. 4, characterized in that it also includes a step of assigning the same address range for eight macroblocks in each of the four video clips by assigning Bank SZOPV to record each of the second cut of the video.

6. Notation data group signal in the synchronous dynamic memory with random access (SZOPV) under item 3, characterized in that one word contains two, four, eight or sixteen horizontal picture elements.

7. Notation data group signal in the synchronous dynamic memory with random access (SZOPV) p. 4, characterized in that the assignment of video clips for banks contains alternating the assignment of each of the second cut of the video one or two banks in SZOPV.

8. Notation data group signal in the synchronous dynamic memory with random access (SZOPV) under item 2, characterized in that the address range for the recording of macroblocks is determined by the following equation:

R = 1 memory with random access (SZOPV) p. 8, wherein the column address for write macroblock is determined according to the following equation:

C = 128k + 161,

where 0 k 3 and 0 1 7.

 

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