Pulser

 

(57) Abstract:

The invention relates to a pulse technique and can be used in automatic control systems and measuring devices. The pulser includes a reference frequency generator (GOC)(1), the output of which is connected to the first input element And (3), the second input is connected to the direct output of the first flip-flop (T)(2), and the output connected to the counting input of the counter pulses (C) (4), the information input of which is connected to the outputs of program block (PB) (6), input the initial installation which is connected to the reset inputs of the second and third T (7), (8) and connected to the inverse output of the first T (2), a clock input connected to the control bus and the first input element OR (5), the output of which is connected to the control input of PB (6) and the input record C (4), the output of which is connected to the second input set T (7), a clock input connected to the output element, And (3), a data input connected to a logical zero and the output to the first output bus, a second input of the OR element (5) and the clock input of the third T (8), the output of which is connected to the second output bus. Technical result: the introduction of the third T (8) expanded funkme devices during their formation. 1 Il.

The invention relates to a pulse technique and can be used in automatic control systems and measuring devices.

Known generator of rectangular pulses [1], comprising a reference frequency generator, the output of which is connected to the first input element And the second input is connected to the direct output of the first flip-flop, and the output connected to the counting input of the counter pulses, the information input of which is connected to the N outputs of the software block, and the output of the pulse counter connected to the first input of the second trigger, the outputs of which are connected to the output bus, the element OR the element is NOT, the input connected to the output element OR the input of the write pulse counter, and the output element is NOT connected to the control input of the software block, (N+1)-th output of which is connected to the first input of the first flip-flop inverted output of which is connected to the input of the initial installation of the software unit and the second input of the second trigger, the second input of the first flip-flop is connected to the control bus and the first input element OR the second input is connected to the output of the pulse counter.

The disadvantage of this device is the need of the data pulses with a constant length, because there is a need to record in memory the duration of each pulse.

The present invention is to enhance the functionality of the generator, creating a generator, devoid of the above-mentioned drawback and allows the formation of short rectangular pulses of constant duration and with a reduced volume of the storage device.

The problem is solved due to the fact that the square-wave generator comprising a generator reference frequency, the output of which is connected to the first input element And the second input is connected to the direct output of the first flip-flop, and the output connected to the counting input of the counter pulses, the information input of which is connected to the outputs of the software block, input the initial installation which is connected to the reset input of the second trigger and connected to the inverse output of the first flip-flop, a clock input connected to the control bus and the first input member OR the output of which is connected to the control input of the software block and the input of the write pulse counter, the output of which is connected to the input of the second trigger, the output of which is connected to the first output bus, entered tert what about the second input of the OR element and the output of the second trigger, and a reset input connected to the reset input of the second trigger clock input connected to the output element, And a data input connected to a logical zero.

The drawing shows a block diagram of the shaper pulse sequence, where: 1 - the generator frequency reference 2 is the first trigger, 3 - element And 4 - pulse counter, 5 - element OR 6 is a software block, 7 - second trigger, 8 - third trigger, 9 - input bus 10 to the first output bus 11 to the second output bus.

The output of the reference frequency generator 1 connected to the first input element And 3, the second input is connected to the direct output of the first flip-flop 2, and the output connected to the counting input of the pulse counter 4, the information input of which is connected to the outputs of a software unit 6, the input initial installation which is connected to the reset input of the second trigger 7 and is connected to the inverse output of the first flip-flop 2, the clock input of which is connected to the control input bus 9 and the first input of the OR element 5, the output of which is connected to the control input of the block 6 and the input of the write pulse counter 4, the output of which is connected to the input of the second trigger 7, the output of which is connected to the first wygodny with the second input of the OR element 5 and the output of the second trigger 7, while the reset input is connected to the reset input of the second trigger 7, a clock input connected to the output element And 3, a data input connected to a logical "0".

The program block of the proposed generator can be performed, for example, on a programmable chip RT. Other elements of the electronic circuit can be implemented, for example, with the use of chip series 561.

The device operates as follows.

In the initial state to direct the output of the trigger 2 is a logic level "0", which prohibits the passage of pulses from the output of the generator 1 to the output element And 3. At the same time on the inverse of the output of the trigger 2 is a logic level "1" which sets the program block 6 and triggers 7 and 8 in the initial state. Software unit 6 thus gives information on the inputs of the counter 4 code of the first time interval. On direct outputs of triggers 7 and 8 is set to a logical "0". In this state the device is to ward the control bus 9 trigger pulse.

The leading edge of trigger pulse, after passing through the element OR 5, writes in the counter 4 parallel code the first time interval, cat, OR 5 is supplied to the control input of the software block 6, who, on this front outputs to the outputs of the parallel code the next time interval.

On the leading edge of trigger pulse also is the installation of the trigger 2 and the direct output is a logic level "1" to allow passage of the output element And 3 clock pulses from generator 1.

The pulses from the output element And 3 arrive at the counting input of the counter 4. Upon completion of the counter 4 at its output pulse appears. On the leading edge of this pulse trigger 7 is set in one state. The leading edge of the output signal of the trigger 7, passing through the element OR 5 records in count 4 of the code the duration of the next time interval. This code is present on the information inputs of the counter 4, as the program block 6 put him on the trailing edge of the triggering pulse. At the same time this signal switches the trigger 8 in the next state.

On the leading edge of the pulse from the output element And 3 is an entry in the trigger 7 logical signal "0" is present at its input. Thus, at the output of the trigger 7 is formed by a pulse whose duration is normalized and equal to the duration of the period of clock genograms block 6, who, on this front, the following code sets the time interval for informational inputs of the counter 4.

Thus, the first output bus 10 is present, the outputs of the trigger 7, the duration of which is determined by the period of clock generator 1, and the interval sequence of these pulses content software unit 6. In addition, the trigger 8, dividing the pulses from the output of the trigger 7, generates at its output a sequence of pulses at the second output bus 11, the duration and the period which is determined in software block 6.

Introduction to the driver of the third trigger has expanded the functionality of the device due to the possibility of the formation of short pulses and reduced the amount of software devices in their formation.

The source of information

1. USSR author's certificate N 1270880, CL H 03 K No.3 / 72, 1986.

A square-wave generator comprising a generator reference frequency, the output of which is connected to the first input element And the second input is connected to the direct output of the first flip-flop, and the output connected to the counting input of the counter pulses, the information input of which is connected to the outputs of the software block, the first trigger, the clock input of which is connected to the control bus and the first input member OR the output of which is connected to the control input of the software block and the input of the write pulse counter, the output of which is connected to the input of the second trigger, the output of which is connected to the first output bus, characterized in that it introduced the third trigger, the output of which is connected to the second output bus, a clock input connected to the second input of the OR element and the output of the second trigger and the reset input from the reset input of the second trigger clock input connected to the output element, And and a data input connected to a logical zero.

 

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