The pulse extender

 

(57) Abstract:

The invention may be used in automatic control systems and measuring devices. In the extender pulses, comprising a generator of clock pulses (GTI) /7/, the input bus /1/ connected to a clock input of the first flip-flop (T) /3/, the output of which is connected to an output bus /5/, the second T /4/, the input set to the initial state of which is connected with the input set to the initial state of the first T /3/ and the release of the loan to the first counter (MF) /8/, the inputs of the first and second T /3, 4/ are connected with the bus logic "1", entered the second midrange /2/ ROM /6/, and the enable input of the second account midrange /2/ is connected to the input bus /1/ and a clock input of the second T /4/, the clock input of the second midrange /2/ - with a clock input of the first MF /8/ and the output GTI /7/, the outputs of the second midrange /2/ is connected to the address inputs of the ROM /6/, the outputs of which are connected to information inputs of the first MF /8/, the login account which is connected to the inverse output of the second T /4/, and the output of a loan to the input set to the initial state of the second midrange /2/. Technical result: the possibility of extending the duration of output pulses depending on the length of the input signal by any law, the definition is in automatic control systems and measuring devices.

Known extender pulses [1] , containing the first input bus, output bus, and a reversible counter, a second input bus connected to the first input of the trigger pulse generator, the first output of which is connected to the first input of the first frequency divider and the second output with the first input of the second frequency divider, and two elements AND IS NOT, the first input of the first of which is connected to the first input bus, a second entrance - exit loan reversible counter, and the output from the first input of the second element AND-NOT the second input is connected to the second input bus and a second input of the first frequency divider and the output from the second input of the trigger, and the outlet of which is connected to the output bus, and the inverted output from the second input of the second frequency divider and the installation log reversible counter, summing input connected to the output of the first frequency divider, and a subtractive input - output of the second frequency divider.

The disadvantage of this device is the lack of immunity of the device and the strict form interval extension of the conversion factors of the first and second frequency dividers:

t = TI(K1/K2),

where t is the value on the frequency.

The closest in technical essence to the claimed is the extender pulses [2], which contains bus clock pulses, an input bus connected to the first input element of coincidence, a second input connected to the output bus and the direct output of the first trigger, R-input of which is connected with the output of the pulse counter, the second trigger and two frequency divider and clock inputs of the frequency dividers are connected with the bus clock pulses, the control input of the first frequency divider coupled to the output element of coincidence and C-input of the second trigger, and the output from the summing input of the pulse counter, the subtractive input connected to the output of the second frequency divider, the output to the R-input of the second trigger, R-entrance - with inverse output of the first trigger, the C-input of which is connected to the input bus, and the D input bus logic "1" and the D-input of the second trigger, the inverted output of which is connected to the third input element of coincidence and the control input of the second frequency divider.

But the extender pulses, as in the previous one, the strict form interval extension of the conversion factors of the first and second frequency dividers.

Task n the activity of the input signal by any law, user defined.

The solution of this problem is achieved by the fact that the extender pulses, comprising a generator of clock pulses, an input bus connected to a clock input of the first flip-flop, the output of which is connected to the output bus, the second trigger, the input set to the initial state of which is connected with the input set to the initial state of the first trigger and the release of the loan to the first counter, the D-inputs of the first and second triggers are connected with the bus logic "1", input a second pulse counter and ROM, and the enable input of the account of the second counter is connected to the input bus and a clock input of the second trigger, the clock input of the second counter with a clock input of the first counter and the output clock pulses, the outputs of the second counter connected to the address inputs of the ROM, the outputs of which are connected to information inputs of the first counter, the input record which is connected to the inverse output of the second trigger, and the output of a loan to the input set to the initial state of the second counter.

The drawing shows a block diagram of the pulse extender.

The device has an input bus 1, the first 8 and the second 2 pulse counters, the first 3 is clocked by the input of the first flip-flop 3, the output of which is connected to an output bus 5, the input set to the initial state of which is connected with the input set to the initial state of the second trigger 4 and the release of the loan to the first counter 8, D-inputs of the first 3 and second 4 triggers connected to the bus logic "1", the enable input of the account of the second counter 2 is connected to the input bus 1 and the clock input of the second trigger 3, the clock input of the second counter 2 is clocked by the input of the first counter 8 and the generator output clock 7, the outputs of the second counter 2 are connected to the address inputs of the ROM 6, the outputs of which are connected to information inputs of the first counter 8, the input record which is connected to the inverse output of the second trigger 4, and its output is a loan to the input set to the initial state of the second counter 2.

Clock 7 may be performed, for example, as in the book C. L. awl "Popular digital circuits". M, metallurgy, 1988, page 254, Fig. 100, triggers 3 and 4 - on-a-chip TM and TW accordingly, the counter 2 in chips IE, the counter 8 - on-a-chip IE, ROM - on-a-chip RT.

The device operates as follows.

Before staging schema ROM 6 is its programming in soo is TBA, see below). In the initial state at the outputs of the triggers 3 and 4 and the output of the counter 2 are signals of logical "0" and the output of the first counter signal is logical "1" (installation diagram of circuits in their original state conventional and not shown in the functional diagram). When the input pulse at input bus on the leading edge of this pulse is the trigger setup 3 in one state and a signal of logical units from the trigger output 3 almost simultaneously with the input signal appears on the output bus. The signal of the logical unit with the input bus is also provided to the enable input of the second counter 2, which begins to count the pulses received at its input from the output of the clock generator 7. The time account is determined by the duration of the input pulse and the output of the counter 2 will present the code is N = T/t, where t is the duration of the expanding pulse, and t is the repetition period of pulses of the clock generator 7. In accordance with this code received at the address input of the ROM, select from the ROM code that defines the spread of the pulse. This code can be rewritten in the counter 8 under the action of a signal of logical units coming from the inverted output of the trigger 4. PKI zero at its inverted output). So it is in the counter 8, the recorded code for the magnitude of the expansion of the output pulse is only required for the duration of the input signal. The signal of the logic zero from the inverted output of the trigger 4 stops writing to the counter 8 and allows his work to decrease with the frequency of the clock generator 7. After a time determined by the expression T=t, where KP - ROM code corresponding to the duration for which it is necessary to expand the input signal, the output of the loan to the first counter 8 receives the impulse, which sets the first and second triggers in the initial state and resets the counter to zero 2. This results in the completion of the formation of the output signal duration.

To= TI+TEXT.

Thus, the magnitude of the expansion of the output pulse does not depend on the conversion factors counters, and is determined by the algorithm incorporated in the ROM 6, and may vary by any law by the user when recording a program in ROM.

Sources of information

1. A. S. N 1293832, MKI H 03 K 5/04 from 28.02.87,

2. A. S. N 1624670, MKI H 03 K 5/04 from 30.01.91,

The extender pulses, comprising a generator of clock pulses, the input bus, sultanovici in the initial state of which is connected with the input set to the initial state of the first trigger and the release of the loan to the first counter, D-inputs of the first and second triggers are connected with the bus logic I, characterized in that it introduced a second pulse counter and a persistent storage device (ROM), and input the permission of the account of the second counter is connected to the input bus and a clock input of the second trigger clock input of the second counter with a clock input of the first counter and the output clock pulses, the outputs of the second counter connected to the address inputs of the ROM, the outputs of which are connected to information inputs of the first counter, the input record which is connected to the inverse output of the second trigger, and the output of a loan to the input set to the initial state of the second counter.

 

Same patents:

The invention relates to switching devices and may find application in systems management, monitoring, measuring, computing devices, communication devices in different industries

The invention relates to the field of pulse technique

The invention relates to radio communications and can be used to identify signals

FIELD: electricity.

SUBSTANCE: method for pulse length reduction of powerful SHF radiation and method for its implementation is characterised by introduction of SHF pulses into waveguide section with gas-filled tubes, under influence of downward powerful SHF radiation SHF-discharges are excited in the gas-filled tubes thus leading to formation of an electromagnetic band structure and pulse narrowing. The device for pulse length reduction of powerful SHF radiation contains a waveguide section with three gas-filled tubes connected by its one end through a coaxial transition and ferrite isolator to SHF-generator and by its other end through a coaxial transition and ferrite isolator to SHF-detector, the three gas-filled tubes are placed along the waveguide section perpendicular to its wide walls with distance l=Λ0/2÷Λ0, where Λ00(1-(λ0/2a)2)-1/2 is wave length in the waveguide, λ0 is wave length of downward SHF-radiation; a is a size of the wide wall in the waveguide section.

EFFECT: reducing length of microsecond pulse of powerful SHF radiation up to 10 ns and less.

2 cl, 2 dwg

FIELD: radio engineering, communication.

SUBSTANCE: microwave emission pulse is introduced to a waveguide section with gas-discharge lamps; glow discharges are lit in gas-discharge lamps by means of a pulse voltage generator, which leads to formation of a electromagnetic band structure. A device for reduction of duration of a microwave emission signal includes a waveguide section with five gas-discharge lamps, which is connected with one of its sides through a coaxial-waveguide transition and a ferrite valve to microwave generator output, and with the other side through a coaxial-waveguide transition and ferrite valve to a microwave detector; five gas-discharge lamps are located along the waveguide section perpendicular to its wide walls at interval l=Λ0/2÷Λ0, where Λ00(1-(λ0/2a)2)-1/2 - waveguide wave length, λ0 - length of incident microwave emission wave; a - size of wide wall of the waveguide section, and they are connected to the pulse voltage generator that is connected to the pulse generator output, the output of the synchronisation pulse of which is connected to the microwave generator.

EFFECT: reduction of duration of microwave pulses from tens of microseconds to tens of nanoseconds.

2 cl, 2 dwg

Up!