The method of state management and dual information of the distributor of clock pulses

 

(57) Abstract:

The invention relates to a base station controller (ASC) system, multiple access, code-division multiplexing (MDCRC) and, more specifically, to a method of state management and dual information of the distributor of clock pulses for use in the controller of the base station. The technical result - the provision of condition monitoring dual cards in dispenser clock pulses. The method consists in forming a communication channel via THE bus and a map of the address for communication through THE bus for state management and dual information of the respective cards in the dispenser of clock pulses. The method provides periodic status checks "installed/not installed", "normal/faulty" and the double status of the relevant cards in the dispenser of clock pulses through communication via THE bus using the card address and message to the operator of the modified state information. 2 S. and 1 C.p. f-crystals, 12 ill.

The invention relates to a base station controller (ASC) system, multiple access, code-division multiplexing (MDCRC) and, more particularly, to a method of controlling senzei.

Prior art

The base station controller mode MDCRC contains communication equipment, which must be synchronized with the reference clock pulses received from the satellite. For example, the communication equipment includes a device transmission line between the base station controller and mobile switching center service (CCMO); the device transmission line between the base station controller and base transceiver station (PBS) and the vocoder. Distributor of clock pulses (RTI) generates and distributes a stable clock pulses for this instrument.

As shown in Fig. 1, the dispenser of clock pulses comprises a pair of blocks GPS global satellite radiodetermination system for receiving signals from the satellite, two pairs of the system node clock (SPTI) for generating various types of system clock pulses in accordance with the reference clock, twelve pairs of system components distributor clock pulses (SURTI) for distribution system clocks among multiple sources of clock pulses. Distributor of clock pulses is usually made on the printed placealso controlled by the processor management interface alarm (PIUS). Processor management interface alarm detects the failure of the relevant cards in the dispenser of clock pulses and controls the state of the dispenser of clock pulses. However, in prior art processor management interface alarm can control only the status "installed/not installed" and the status "normal/defective distributor of clock pulses. That is, processor management interface alarm is not able to properly monitor the state of the corresponding dual cards in dispenser clock pulses. Thus, there is a need to control the state (status "operation/standby") of the respective sides of the operator transfers the appropriate information when the dispenser clock pulses commuted because of irregularities in the operation.

The invention

The objective of the invention is to provide a method for state management and dual information of the distributor pulses in the base station controller.

Another objective of the invention is to provide a method for notifying the operator about the status and dual information zasadach of this invention is to provide a method of dual control information of the respective cards in the dispenser of clock pulses by periodically viewing registers status boards.

In accordance with one aspect of the present invention a method of controlling the condition and the dual information of the respective cards in the dispenser of clock pulses for use in the controller of the base station mode MDCRC includes forming THE communication channel(TD)(TD)-bus (THE bus transmission and distribution) and a map of the address for communication by THE(TD)(TD)-bus to control the condition and the dual information of the respective cards in the dispenser of clock pulses; for periodic inspection of the state "installed/not installed", "normal/faulty" and the double status of the relevant cards in the dispenser of clock pulses through link TD-bus with maps and addresses for the message in the target cost information about an altered state.

Brief description of drawings

The above and other objectives, features and advantages of the present invention are explained in the following detailed description of a preferred variant implementation, illustrated in the drawings, which shows the following:

Fig. 1 is a block diagram of a conventional distributor of clock pulses;

Fig. 2 is a block diagram of a device for controlling the condition of the distributor clock impulse is essor management interface alarm with many ports THAT(TD)-bus in accordance with the embodiment of the present invention;

Fig. 4 - schematic map of the address programmed in the processor control interface alarm for pairing TD bus;

Fig. 5 is a diagram of THE functions(TD)-bus mode;

Fig. 6 - scheme status rank address mode 0;

Fig. 7A is a diagram of the state address discharge mode 1;

Fig. 7B is a diagram of a state discharge data for mode 1;

Fig. 8 is a diagram status rank address for mode 2;

Fig. 9 is a diagram of the state address discharge mode 4;

Fig. 10A is a diagram status rank address mode 5;

Fig. 10B is a diagram of a state discharge data for mode 5;

Fig. 11 is a diagram of the state address discharge mode 6;

Fig. 12 is a block diagram of the sequence control condition and the dual information of the distributor of clock pulses according to a variant implementation of the present invention.

Detailed description the preferred option of carrying out the invention

The preferred implementation of the present invention will be described below with reference to the drawings, in which identical reference position indicate similar elements. It should be noted that many features, such as a detailed description of the circuit elements, distic. It should also be noted that a detailed description of the relevant prior art can be omitted if it is clear that to describe the concepts of the present invention it is not required.

In Fig. 2 shows a device for controlling the condition of the distributor of clock pulses (RTI) in accordance with a possible embodiment of the present invention. The device contains a CPU management interface alarm (PIUS) 14 for controlling the first and second distributors of clock pulses (RTI and RTI) 10 and 12, terminal block 16 to indicate to the operator control information from processor management interface alarm 14 and the host card access control alarm (UPADS) 20 for the message processor management interface alarm 14 establishment or failure to identify the relevant cards in the first and second distributors clock pulses 10 and 12. Processor management interface alarm 14 includes a storage device 18. THE(TD) bus connected for coupling signals between the processor management interface alarm 14 and distributors of clock pulses 10 and 12.

According Fig. 3 processor management interface Greyback distributor of clock pulses (RTI) 10, while the port C TU(TD)-bus is designed for coupling the second distributor clock pulses (RTI) 12. According Fig. 1 the first distributor of clock pulses 10 consists of a global satellite system positioning (GPS unit (B)), pair system node clock SPTI and six pairs of system components distributor clock pulses SURTI-SURTI. The second distributor clock pulses 12 consists of a global satellite system positioning (GPS unit (A)), pair system node clock SPTI and six pairs of system components distributor clock pulses SURTI-SURTI. Processor management interface alarm 14 reads through the ports B and C status information of the respective boards in the first and second distributors clock pulses 10 and 12, i.e., controls the operational state and the state of the corresponding dual cards. Processor management interface alarm 14 includes port D connected to the node, card access control alarm 20. Processor management interface alarm 14 reads through the port D information "installed/not installed" with host card access control alarm 20.

the SMS alarm 14 for coupling THE(TD)-bus through THE ports(TD) tyres. As shown in the drawing, the storage device contains the field of ports A, B, C and D, the read ports A, B, C and D, the status area of the ports A, B, C and D, the scan area A/B area C/D, the selection of mode A, B, C and D, the area of the interrupt mask of the read select THE(TD)-bus (enable/disable port TD-bus), the selection of THE port(TD) tyres, area interrupt vector and the unused area. In addition, the storage device 18 has a scope set mode to determine the mode in which the processor interface control alarm system 14 accesses THE(TD) bus.

In Fig. 5 presents the function TU(TD)-bus mode, the mode 0 corresponds to the read-after-write SPTI; mode 1 corresponds to the function read status SPTI; mode 2 corresponds to the function control dual status SPTI; mode 4 corresponds to the read-after-write SURTI; mode 5 corresponds to the function read status SURTI and mode 6 corresponds to the control function dual status SURTI.

Fig. 6 through 11 illustrate diagrams of States of the category of the address and data modes when accessing the device. In Fig. 6 presents the status is e discharge data for mode 1; in Fig. 8 - state discharge address for mode 2; Fig. 9 - state discharge address for mode 4 of Fig. 10A - state discharge address mode 5; Fig. 10B - state discharge data for mode 5 and in Fig. 11 - the state of the address discharge mode 6. In Fig. 12 presents a flowchart of the sequence of control operations and status of dual information distributor clock pulses RTI in accordance with the embodiment of the present invention, and the procedure control condition and the procedure of dual control of the distributor clock pulses RTI performed periodically.

In accordance with Fig. 2 through 12, if the card is installed (or removed) to (from) the first and second distributors clock pulses 10 and 12, the node control card is available to the alarm system 20, is connected to all cards in the first and second distributors clock pulses 10 and 12, specifies information "installed" ("not set") of the respective boards. Then, at step 100 (Fig. 12) processor management interface alarm 14 periodically reads through the port D information "installed/not installed' respective boards specified by the host card access control alarm 20.

Then this alarm system 14 at step 104 checks through port D, if the fee side of A double circuit boards in the first and second distributors clock pulses 10 and 12. If layer A is not set, then at step 112 checks whether the fee side B. If the Board side A and side B, both are not set, the processor management interface alarm 14 detects the absence of duality during operation 124 and reports the status of the absence of duality target unit 16 at step 126.

But if at step 104 it is determined that the fee is A set, then the procedure goes to step 106 and checks properly operates the communication through THE(TD)-bus to read the state Board side A. the Check is performed using information about the state of discharge address for mode 0 and mode 4, as shown in Fig. 6 and 9. That is, the test performs a write and read test data to/from registers SPTI and SURTI-SURTI Board side A in the first and second distributors clock pulses 10 and 12. After that, the processor management interface alarm 14 at step 108 checks properly operates the communication through THE(TD) tyres. If the connection is through THE(TD)-bus operates normally, the processor interface panel the I state "normal/faulty", status "operation/standby" relevant boards and information generated in the case of switching due to a fault on the operating side) in step 110. At this point, the processor management interface alarm 14 reads the information about the state Board side A using status of the category of the address and data mode 1 and mode 5 in accordance with the scheme of Fig. 7A, 7B, 10A and 10B. That is, processor management interface alarm 14 reads the state "normal/faulty" and the "work/waiting for SPTI and SURTI-SURTI cards A hand in the first and second distributors clock pulses 10 and 12.

At the same time, if card A is not installed, and the card side B is set, the processor management interface alarm 14 performs operations with 114 through 118, which are similar to the operations 106 through 110. During operations with 114 through 118, the processor management interface alarm 14 reads the information of the state "normal/faulty" and the status "work/waiting for SPTI and SURTI-SURTI circuit Board side B in the first and second distributors clock pulses 10 and 12.

If at step 108 it is determined that the communication through THE(TD)-A communication through THE(TD)-the bus is not operating normally, the processor management interface alarm 14 proceeds to step 124 to recognize the absence of duality. After that, the processor management interface alarm 14 reports the status to the target unit 16 at step 126.

After steps 110 and 118, the processor management interface alarm 14 at step 120 checks to see changed if the status information. If the status information is changed, the processor management interface alarm 14 adjusts the status table and reports the adjusted information in the status table to the target unit 16 at step 122. After that, the terminal unit 16 notifies the operator of the reported information.

Since all SPTI and SURTI are dual, we can see the condition and dual information, for example, circuit Board side B by a simple reading of the registers of the card side A. that is, the processor management interface alarm 14 can read the state of distribution of clock pulses 10 and 12 by the electoral operations 104-110 or operations 112-118.

For example, if the processor control interface alarm accesses Board side A distributor of clock pulses, which is not what tion, probably will read the erroneous data. Therefore, in order to avoid incorrect operation, to read the state of the respective parties (operation 110 and 118), the processor management interface alarm checks the appropriate boards (operation 100) and checks the normality of the communication through the TD-bus (operation 106 and 114).

From the above description it follows that the invention forms a communication channel through the TD-bus and notifies the operator about the state information (i.e. information about the state "installed/not installed" and "work/waiting") and dual information of the respective circuit boards by means of TD-bus. Therefore, the operator can effectively manage the condition and dual information of the respective cards in the dispenser of clock pulses of the controller of the base station.

The above described preferred embodiment of the invention, but it should be in the form that specialists in this field of technology can be implemented in different variants and/or modifications of the basic principles of the invention, without changing the nature and scope of the invention, as defined by the claims.

1. The method of controlling sostanziale system multiple access, code-division multiplexing (MDCRC), in which form the communication channel via bus transmission and distribution, record information about the state of the channel and transmit the information to the target block, wherein the communication channel is formed via bus telephone devices (TU-bus), through which also form a map of addresses to communicate to the control condition and the dual information of the respective boards in the specified allocator, which includes Board global positioning (GSOM), the system node clock (SPTI), system nodes distributor of clock pulses (SURTI), communicate via THE bus using the card addresses for validation state "installed/not installed", "normal/faulty" and the double status of the mentioned cards in the specified distributor of clock pulses, update previously registered information about the state and report to the target block of the updated status information, if the status "installed/not installed", "normal/faulty and dual card status changed.

2. The method according to p. 1, characterized in that the specified map address contains the field for verification of a fault the persons managing state and dual information cards in the dispenser of clock pulses for use in the controller base station system MDCRC, in which form the communication channel via bus transmission and distribution, record information about the state of the channel and transmit information to the terminal unit, wherein the communication channel is formed via THE bus, by means of which also form a map of the address for communication for state management and dual information of the respective boards in the specified allocator, which includes Board GAM, SPTI, SURTI, periodically check the status "installed/not installed", "normal/faulty" and the double status of the mentioned cards in the specified distributor of clock pulses through communication via THE bus using the card address and inform the terminal block on the changed status.

 

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1 cl, 1 dwg

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