(57) Abstract:Usage: in the computer and electronic equipment. The inventive design of semiconductor crystal standard integrated circuits introduced switching ring located around the perimeter of the crystal, the number of which is equal to the number of terminals of the crystal. In addition to the existing pads, called in this case the inner edge of the semiconductor crystal are external contact pads. All pads to allow connection to any leads of the package IC with any internal contact area of the crystal are elongated - this is accomplished by providing electrical connections necessary internal pads with the outside by means of the switching rings. The technical result of the invention is to improve reliability and increase Tehnologichesky printed circuit Board containing integrated circuit as a component. 3 Il. The invention relates to semiconductor integrated circuits (IC), in particular to circuits with dielectric isolation components and substrate policella, which made traditional technologies: semiconductor or hybrid.As the first analogue of  is considered, from the point of view of its design, standard integrated chip, comprising a housing in which is placed crystallochemical made with pads on two of its opposite sides, is electrically connected by a metallic conductors, which is fixed to the semiconductor chip with contact pads that are connected to pads of Kristallografiya wire jumpers, and conclusions are pressed into the housing, electrically connected to pads of the semiconductor chip.As a second analogue of  is selected chip that includes a polycrystalline substrate, active and passive elements, placed in isolated dielectric parts of monocrystalline semiconductor, a system of metallic compounds with intersections, which are made in the form located directly in the substrate alloy sections with the grain size of the polycrystal, not exceeding 3 microns.As a prototype reviewed by poluprovodni 2, spaced double row along the perimeter or matrix, depending on their number (from 14 to 64) and the type of housing of the semiconductor crystal 3 with active, passive elements and the metal interconnects, wires 4, one end of which is welded to the contact pads of the crystal 5, located generally along the perimeter, and the other to the findings of the case or contact pads of Kristallografiya 6 connected to the terminals of the buildings IC.The shortcoming of total as for the prototype, and for both analogues, from the point of view of the authors of this work is "hard" pin assignment IC in the Assembly process, not subsequently changed, which leads to the following consequences: when designing printed circuit boards for electronic equipment and computer engineering this IC is placed on the card in the specified range of conditions the place and it is connection to other components of the card (trace). During this process you may experience the following situation: tracks supplied to the IC from above (from below), must be connected with the bottom (top) pins of the IC, such tracks almost inevitably cross the other route is suitable to lateral conclusions IC (Fig.Alonei side they cross the road, suitable for vertical conclusions IC (Fig. 2B). As a result, virtually impossible to do without vias or jumpers, which reduces the quality of the Board, its reliability and manufacturability.The invention is directed to improving the reliability and increasing the manufacturability of the PCB that contains an integrated circuit as a component.This is achieved by the fact that the perimeter of a semiconductor crystal at the expense of some increase in its area are concentric switching ring, as if separating pad crystal 5 prototype (Fig. 1) into two parts: internal and external pads. Pads crystal prototype performs two functions: remove information from the functional part of the crystal IC and transfer it to the pads of Kristallografiya 6 and, therefore, conclusions 2 IC. In contrast to the prototype in the IC of the proposed design these functions are: internal pads remove information from the crystal, and the external - transfer it to the pads of Kristallografiya. The connections of the inner pads with the outside is performed by switching the number of the I pad is electrically connected with one of the switching rings in the manufacturing process of the IC, and each inner pad has the possibility of switching to any of the switching rings before installing the chip on the circuit Board.The invention is illustrated in Fig.3, which presents a view of the proposed integrated circuit from the top, from which it is evident that the design standard IC with case 1, the pins 2, the semiconductor crystal 3, the connecting conductors 4, the contact area of the crystal 5, hereinafter referred to as internal and run directly on the substrate in the form of high-alloy sections with the grain size of the polycrystal, not exceeding 2 μm, and the contact pads of Kristallografiya 6, inputs: switching ring 7, the number of which is equal to the number of pads of the crystal is performed on the surface of film technology, and the external contact pads 8, next commutation rings along the edge of the crystal and connected hinged conductors 4 with pads 6 of Kristallografiya.Internal and external contact pads are extra long - length domestic limited to the level of the last (external) switching ring, and each external contact area of the ptx2">To implement embedded in the device capabilities of the pins when installing the IC on the circuit Board, you must perform the electrical connection through burning of the insulation layer between the particular internal contact pad and a switching ring which is connected with the necessary output IC.It should be noted that the die size of this IC in comparison with the prototype slightly increases due to the width of the switching rings (2 μm) and the same insulating distance between them. For example, if the pin number of the IC - 24 the size of the side of the semiconductor crystal will increase by approximately 0.2 mm,
The use of the proposed integrated circuits will minimize the number of conflicts between the roads, and consequently, the number of interlayer connections (transitions)
In the static state, the IC of the proposed design assumes the presence of a chip with pins 2 (Fig. 3), isolated switching ring 7 from its functional parts, i.e. from the inner pads 5.The way the proposed use of the IC in the composition of the circuit Board or other device after the appointment of conclusions the proposed method is not the best chip designs, microprocessors and microassemblies. - M.; Chapman and hall, 1989, S. 400.2. USSR author's certificate N 1583995, H 01 L 23/28, 1987.3. USSR author's certificate N 470237, H 01 L 27/00, 24.08.77. Integrated chip that includes a polycrystalline substrate, active and passive elements, metal interconnects, wherein it around the perimeter of the surface of the semiconductor crystal entered the switching ring width of 2 μm and the same insulating distance between them, the number of which is equal to the number of terminals of the crystal IC, and in addition to the internal pads introduced external contact pads located on the edge of the crystal and connected to pads of Kristallografiya, pads are made extra long, directly in the substrate in the form of high-alloy sections with the grain size of the polycrystal not more than 2 μm, each external contact pad is in electrical connection with one of the switching rings, which determines its length, and the length of each of the inner pads to allow its commutation with any switching ring before installing the IC on the circuit Board is limited to external comm
SUBSTANCE: invention relates to conductive pastes for forming metal contacts on the surface of substrates for photovoltaic cells. The conductive paste is substantially free of frit glass. According to one version of the invention, the conductive paste contains organometallic components which form a solid metal oxide phase upon firing and conductive material. The organometallic components are selected from a group which includes metal carboxylates or metal alkoxides, where the metal is boron, aluminium, silicon, bismuth, zinc or vanadium. According to another version, the conductive paste includes multiple precursors which form conductive elements upon firing or heating. The paste is adapted for adhesion to the surface of a substrate and upon firing, forms a solid oxide phase while forming an electrical conductor from conductive materials on the substrate.
EFFECT: use of said conductive paste in a line of a conductive array of photovoltaic cells provides high efficiency and fill factor of the photovoltaic cell.
14 cl, 2 tbl, 2 ex
FIELD: radio engineering, communication.
SUBSTANCE: invention relates to pressure housings and specifically to inlets in said housings. The apparatus includes a base (204) and a wall (203) which defines an internal part and an external part, wherein a sealed inlet has a first portion (202a') of a signal transmission line located outside the housing, a second portion (202b') of a signal transmission line located outside the housing, and a third portion (202c') of a signal transmission line which connects the two other portions (202a', 202b'), wherein the inlet is characterised by that the first portion (202a') is displaced from the wall to provide a first safe distance d, which is the distance between a first portion (202a) of the signal transmission line located on the surface of a second layer and metal parts of the housing.
EFFECT: providing an inlet which minimises the risk of the multipactor effect and enabling the inlet to operate when transmitting high-power signals.
13 cl, 6 dwg
FIELD: computer engineering and integrated electronics; integrated logic gates of very large-scale integrated circuits.
SUBSTANCE: newly introduced in integrated logic gate that has semi-insulating GaAs substrate, first input metal bus, first AlGaAs region of second polarity of conductivity disposed under the latter to form common Schottky barrier junction, first inherent-conductivity AlGaAs spacer region disposed under the latter, first GaAs region of inherent-conductivity channel disposed under the latter, second AlGaAs region of second polarity of conductivity, second AlGaAs spacer region of inherent conductivity, second input metal bus, output region of second polarity of conductivity, output metal bus, power metal bus, zero-potential metal bus, and isolating dielectric regions are inherent-conductivity AlGaAs tunnel-barrier region, InGaAs region of inherent-conductivity channel, AlGaAs region of second inherent-conductivity barrier, L-section power region of second polarity of conductivity, and Г-section zero-potential region of second polarity of conductivity; first GaAs region of inherent-conductivity channel and InGaAs region of inherent-conductivity channel are disposed in relatively vertical position and separated by AlGaAs region of inherent-conductivity tunnel barrier; output region of second polarity of conductivity is ┘-shaped and ┘-section region.
EFFECT: enhanced efficiency of using chip area, enhanced speed and reduced power requirement for integrated logic gate switching.
1 cl, 3 dwg
FIELD: computer science and integral electronics, in particular - engineering of VLSI integral logical elements.
SUBSTANCE: integral logical element contains semi-insulated GaAs substrate, first input metallic bus, first AlGaAs area of second conductivity type, positioned above aforementioned bus and forming Schottky transition together with it, below it first AlGaAs area of native conductivity spacer is positioned, below it, first GaAs area of native conductivity channel is positioned, second AlGaAs area of second conductivity type, second AlGaAs area of native conductivity spacer, second input metallic bus, output area of second conductivity type, output metallic bus, zero potential metallic bus, metallic power bus, areas of separating dielectric. Integral logical element additionally contains AlGaAs area of native conductivity tunnel barrier, InGaAs area of native conductivity channel, AlGaAs area of second conductivity barrier, zero potential area of second conductivity type with transverse cross-section in form of symbol L, while first GaAs area of native conductivity channel and InGaAs area of native conductivity channel have vertical mutual position and are divided by AlGaAs area of native conductivity tunnel barrier, output area of second conductivity type is L-shaped and has L-shaped cross-section.
EFFECT: decreased efficiency of crystal area usage, increased speed of operation and decreased energy consumed by switching integral logical element.
FIELD: power semiconductor microelectronics.
SUBSTANCE: newly introduced in central part of semiconductor structure that has substrate, semiconductor material with depleted area in its central part enclosed by depleted area in peripheral part of structure, and relevant current-conducting contacts are recessed components of reverse polarity of conductivity with spherical depleted area whose electric field strength is higher than that of depleted areas in gap between recessed components and in peripheral part of structure.
EFFECT: improved power characteristics, enhanced resistance to pulse overcurrents.
7 cl, 1 dwg
SUBSTANCE: invention relates to design and technology of manufacturing semiconductor integrated circuits (IC) and can be used in digital, analogue and memory units in microelectronics. The semiconductor IC has a high-resistance monocrystalline silicon layer grown in form of a hollow cylinder in which there are regions with different conduction type, which form bipolar transistors, resistors and capacitors. On the outer surface of the high-resistance monocrystalline silicon layer there are emitter and base contacts adjacent to corresponding regions of corresponding transistors connected to resistors and capacitors by conductive paths formed on the surface of a dielectric placed on the outer surface of the high-resistance monocrystalline silicon layer, and on the inner surface of the high-resistance monocrystalline silicon layer there is a collector contact in form of a hollow cylinder adjacent to the collector regions of the transistors or the adjacent silicon layer.
EFFECT: higher degree of integration of the IC, reduced feature size of the element, lower level of inter-electrode connections, reduction of power consumption by one switching, increased reliability.
3 cl, 1 dwg
SUBSTANCE: semiconductor structure of the logical element AND-NOT comprising the first and second logical transistors, the first and second injecting transistors and a substrate is made as nanosized with a stepped profile and comprises four collectors, four bases and at least four emitters on the substrate of the first type of conductivity.
EFFECT: reduced consumed power and increased efficiency.
SUBSTANCE: in the integral logical AND-NOT element based on a layered three dimensional nanostructure (the element containing the first and the second logical transistors, the first and the second injecting transistors and a substrate) the logical structure is designed to be nanosized with a stepped profile.
EFFECT: increased response speed and reduced power consumption.
SUBSTANCE: multifunctional microwave monolithic integrated circuit board based on a multilayer semiconductor structure combines functions of several monolithic integrated circuit boards and comprises field-effect Schottky transistors and quasivertical Schottky barrier diodes with high values of boundary frequencies, which are integrated at the same chip and used as active and non-linear elements. Active areas of the field-effect transistors and basic areas of the quasivertical diodes are placed in different epitaxial layers with a low-ohmic contact layer placed between them and ohmic source and drain contacts of the transistors and ohmic cathodic contacts of the diodes are attached to it.
EFFECT: increased degree of integration for the microwave multifunctional integrated circuit board, reduced weight and dimensions for receiving and transmitting modules of antenna arrays, reduced losses related to signals passage between the schemes of functional units, increased boundary frequencies for the Schottky barrier diodes.
SUBSTANCE: in a semiconductor device a diode area and IGBT area are formed at the same semiconductor substrate. The diode area includes a multitude of anode layers with the first type of conductivity open at the surface of the semiconductor substrate and separated from each other. The IGBT area includes a multitude of contact layers of the body with the first type of conductivity open at the surface of the semiconductor substrate and separated from each other. An anode layer includes at least one or more first anode layers. The first anode layer is formed close to the IGBT area at least, and the square area in each of the first anode layers in the direction of the semiconductor substrate plane is more than the square area in each contact layer of the body in direct vicinity from the diode area in the direction of the semiconductor substrate plane.
EFFECT: invention prevents direct voltage growth in the diode area and increased heat losses.
2 cl, 5 dwg
FIELD: process engineering.
SUBSTANCE: invention relates to microelectronics, particularly, to production of solid-state devices by evaporation of metal coating on the substrate back surface. Claimed process consists in that the substrate is flexed in reverse direction before evaporation of metal coating. It differs from known processes in that said coating is evaporated on substrate back surface through stencil with through holes shaped and sized to crystals. Jumpers between said holes in stencil are comparable with the width of division webs made between crystals on substrate face surface.
EFFECT: reduced residual thermomechanical strains at said boundary.