Scheme for transmitting video data on the display

 

(57) Abstract:

The invention relates to video displays and bound them to the driving circuits. The technical result is to increase the reliability of the control circuit for reducing the required number of components on the glass substrate. Scheme for transmitting video data to the display contains the schema demuxing designed for demuxing group of Y columns multiplexed input signals video on the X groups of Y capacitors of image elements, and a control circuit designed for transmission voltage preliminary charge on the Y input lines and columns for transmission of video data on the Y input lines of the columns. 7 C.p. f-crystals, 6 ill.

The invention relates to video displays and associated driving circuits, in particular to the column drivers of the video display on liquid crystals, which are simplified scheme for multiplexing data transmission lines and capacitors of the image elements, which are pre-charged to a selected voltage level before they will receive the video signals so that the selected data line and the capacitor elumalai video in order to increase the efficiency of the display.

Matrix displays typically use a lot of display elements arranged in a matrix consisting of rows and columns, and placed on opposite sides of a thin layer of electro-optic material. With display elements associated switching device, designed to control the application of data signals to the display elements. Display elements include a capacitor element display, the managed switching device transistor. One of the electrodes of the picture elements on one side of the matrix display, and a common electrode for each of the picture elements formed on the opposite side of the matrix display. The above-mentioned transistor is typically a thin-film transistor, which is deposited on a transparent substrate such as glass. The source electrode of the switching transistor is connected to the electrode of the picture element, which is deposited on the same side of the matrix display, and a switching transistor. The drain electrodes of all the switching transistors of a particular column are connected to the same column conductor to which the us with a common conductor line, to which are applied signals breeding lines for switching all of the transistors in the selected row in the enabled state.

By scanning conductor lines with signals breeding lines all the switching transistors in a given row are transferred to an on state, and all rows selectrows consistently. At the same time video data signals are applied to the column conductors in synchronism with the selection of each line. When the switching transistors in the row ofselection using the signal selection line, the video signals applied to the electrodes of the switch transistor, determine the charging rate of the capacitor elements of the image to a level corresponding to the data signal in the Explorer column. Thus, each image element with its electrodes on opposite sides of the display acts as a capacitor. When the signal for the selected row is removed, the charge on the capacitor element of the image is preserved up until the next repetition will be breeding this line ringing selection lines and will not be accumulated new voltage. Thus, image formation on the matrix is tweenie pre-charge capacitors of image elements of a specific row selected up to a certain voltage level before how to apply video signals to the column conductors, as described in the patent application N 971721 filed in the United States November 3, 1992 by the present applicant (corresponding to the N application WO 94/10676). In this implementation, the capacitor element image can then additionally be charged or discharged to the level of a subsequent video signal for a shorter interval of time than would be required if the capacitor element of the image has been charged only video signals. To implement such a function for pre-charging thin-film transistors for pre-charging is applied onto a glass substrate, and each of the drain electrodes is connected to the guide column, all the gate electrodes are connected together with a circuit for pre-charging, and each of the source electrodes is connected to a source of a predetermined voltage.

Therefore, before application of the video signals of the circuit for pre-charging includes each of the thin-film transistor for pre-charging, providing the charging rate of the capacitor elements of the image to a certain level.

In the application EP-A-0417578 described liquid crystal display layout multiplex the scanning.

It should be borne in mind that the use of the term "video" is usually used to refer to television signals, here is applicable to other display devices, and not just for the television images and display indication. Such display devices may include portable gaming device with an LCD display on them moving shapes, etc.

Object of the invention is the creation of a new data driver circuit designed for use with a scanning video display on liquid crystals. In accordance with the invention this task is solved by a scheme for transmitting video data to a display having a matrix of picture elements arranged in rows and columns containing the first and second substrates, at least the first of which is made of glass separated by a layer of electro-optic material, characterized in that it contains Y input lines of columns, placed on one of the substrates, the X groups of Y elements demuxing placed on one of the substrates, and each element demuxing is directly connected to the corresponding Y input lines of the columns, the scheme demuxing, vnih with the X groups of Y elements demuxing, to unlock each of the X groups of Y elements demuxing, and the control circuit, external to the first substrate having the Y output lines connected to the Y input lines of columns for video and voltage preliminary charge on the Y input lines of columns of charge of each picture element in each sequentially selected line to a predetermined level of DC voltage so that the voltage pre-charge was provided on the Y input lines of the columns to video, and the scheme demuxing simultaneously ran each of the X groups of Y elements demuxing while providing a voltage for pre-charging with the subsequent launch of the X groups when submitting a video.

In the present invention using as an example a color portable television devices with 384 240 picture elements elements demuxing made in the form of thin-film transistors on the display to provide a transfer voltage for pre-charging and video data from a source located outside of the glass substrate, placed on it, the capacitor element is plexitube controls the excitation of these groups. Scheme demuxing sequentially and periodically initiates each of the groups of elements demuxing to ensure the charge of the capacitor elements of the image via the video data to the appropriate level. Before submitting a video data control circuit generates a voltage for pre-charging, and the circuit demux initiates each of the groups of elements demuxing at the same time, providing charge all of the capacitors of image elements to a certain level.

Thus, the object of the invention is to provide a simplified means of providing the pre-charge capacitor elements of the image.

In addition, the invention aims to reduce the cost of manufacturing the liquid crystal display by reducing the number of thin-film components required for placement on the display.

And the task of the invention is to provide a more reliable driver circuit column data by reducing the required number of components on the glass substrate.

In Fig. 1 shows a basic block diagram of the new system and the data driver circuit for a thin-film recognita what's with her scanning circuits data made according to the invention; Fig. 3 is a detailed circuit diagram of the matrix lattice and scanning circuits data disclosed in the above jointly filed a patent application, and Fig. 4 - waveforms and timing characteristics corresponding to the invention; Fig. 5 - characteristics of the charge of the capacitor, illustrating a more rapid discharge of the capacitor is compared to his charge; Fig. 6 is a waveform illustrating the advantages in reducing the time when the application is less than complete, the voltage pre-charge V+ or V - to the capacitor elements of the image.

The diagram shown in Fig. 3, described in detail in the aforementioned application for U.S. patent N 971721 from 3 November 1992 (corresponding to WO 94/10676 the Scheme data driver for a liquid crystal display, and is shown here for reference.

In Fig. 1 shows a basic block diagram of the new display system 10, which includes a display device and placed outside the glass substrate of the control circuit 12, which are made separately from the display 14 and connected to control elements. Active matrix zhidkokristallicheskii display shown in Fig. 1 may typically be composed of 200000 or more displays elementaita image. For portable TV devices, for example, the grid may include 384 columns and 240 rows. In this case you need more than 92000 display elements or picture elements. For larger TV devices, of course, the number of items will be more. The transistors used for the excitation of picture elements, are usually thin-film transistors located on the substrate, for example, of glass. Display elements include electrodes, deposited on glass, and elements common electrode on the opposite substrate. Both opposite substrate separated by a layer of electro-optic material. On the substrate 14, which may be made of glass, driver circuit column data 16 excite columns 24 video signals and the voltage pre-charge. Driver selection lines 25 may be of any shape known in the prior art, is preferably as described in co-filed patent application U.S. N 996979 from 24 December 1992 on the Schema driver selection for zhidkokristallicheskogo display". Driver selection lines 25 sequentially excites the image elements in each selected row, and the rows from the first to 240-th vozbujdayut is separate from the display 14, receive data from the circuit input 64 through the shift register 49. The video signals of red, green and blue served with circuit 58 on the gate capacitors 50 in concert with the data shift register 49. Clock signals and synchronization signals horizontally and vertically are formed by the logical control unit 60. The high voltage generator 62 generates the necessary high voltage. The output of the gate capacitor 50 is connected with 64 output amplifiers 52. In turn, the amplifier 52 is connected to the key circuit 53 to control the output video data. A switching circuit 55 is connected to the voltage source 63 and 64, and controls the voltages in lines 57 and 59 to provide the supply voltage for pre-charging to the substrate 14. The control unit 61 key circuits carries out control key circuits 53 and 55 so that at every moment of time as an excuse, only one of the key schemes. Line 57 is connected to each odd-numbered output line D1, D3, . . ., D63, and the line 59 is connected to each even-numbered input line D2, D4, ..., D64.

Thus, if one row of image elements includes 384 display element, 64 line 13 input soybeans substrate 14 after the application of voltage for pre-charging. 64 video output is connected via line 13 to the capacitors 24 columns through the data drivers 16 columns, as will be explained below.

As shown in Fig. 2, lines 104, 106, ..., 130 and 132 from the scheme demux 102 form a 6 line pairs supply enabling signal, which are connected to X (6) groups, designated 66,..., 68 and 70 of Y (64) elements demuxing. These elements designated 108, 110,..., 112 and 114 deposited on glass 14 for demuxing 64 output signals and feeding them successively to X (6) different groups (66, ..., 68, 70) from Y (64) lines 24 columns in the selected row of Z (240) lines on the glass 14. Thus, lines 104, 106,..., 130 and 132 unlock all 384 item demuxing (108, 110, ..., 112 and 114 in each group) at the same time on the time interval before application video to the substrate 14 to provide a preliminary charge of display elements to a specified voltage level. The signal driver selection lines, clock signals and power are transmitted from the control circuit 12 through line 21 to the driver circuit breeding lines 25, as shown in Fig. 1. Driver circuitry breeding lines 25 may be any of the schemes of this type, known from the prior art, but preferably of the type described the driver selection lines 225 ofselection the first line, in the operating mode will be described transistors 278, 280, 282 and 284 in line 1. Then the circuit for pre-charging 316 and driver circuit column data 266, . .., 268 and 270 will produce signals that will make a preliminary charge of each line, column and each of the capacitors of the image elements 294, 296,..., 298 and 300 in the first row driver lines 225 to a predetermined voltage.

Then, when the application of data signals to the column line 224, the capacitor will charge to a value which depends on the level of the data signal applied to the line 224 column. Pre-charge capacitors is used because the capacitors 294, 296,..., 298 and 300 are discharged much faster than charged, as shown in Fig. 5. As can be seen from Fig. 5, for the implementation of the charge of the capacitor from 0 to the value indicated by the position 23, requires a time interval of duration X. However, for the discharge of the capacitor from its maximum value to the same level requires a time interval of duration Y, much lower than X. in Addition, to charge up to full size it takes time t, and for a full charge - time Z, is less than t. Thus, the time intervals of the discharge significantly IU the public selected voltage during the time interval of the input data signal. This can reduce the time required for the time interval of data input.

Thus, as shown in Fig. 3, the circuit for pre-charging 316 generates an output signal on line 318, which is supplied to the gates of all 384 transistors 320, 322, 324, and 326 preliminary charge, each of which is associated with respective of the 384 lines of the columns on the substrate 314. An example of using transistors for pre-charging are shown for group 1, designated as block 266. The drain of the transistor for pre-charging 320 is connected to the voltage source V+, and its source electrode connected to a column D1 of the internal data line. For all odd lines of the columns has such a transistor connected in this way. For example, as shown in Fig. 3, the electrodes are drains of transistors 320 and 324 connected to the source 328 voltage V+. The electrodes are drains of the transistors 322 and 326 in each line, the even-numbered columns are connected with the source 327 V-.

The present invention eliminates the need for the scheme 316 preliminary charge and the transistors 320, 322,..., 324, and 326 shown in Fig. 3, while maintaining the above-described pre-charge to provide its benefits, as it follows from comparison of the m key circuit 55 via the control circuit 61 key schemes to ensure charge lines 57 and 59 from the voltage source 63 and 65 to a certain level during a certain time interval. Then, during the same time interval a switching circuit 55 is switched on, the demux 102 shown in Fig. 2, simultaneously initiates the X groups of Y elements demuxing (108, 110,..., 112 and 114). This ensures that the charge of the capacitors 94, 96, 98 and 100 to a predetermined voltage.

Thus, at the initiation of each row sequentially all the capacitors of the image elements in all groups in the selected row are charged up to a predetermined value and discharged sequentially in X groups, when taken video. Thus, the X groups of Y switching transistors (78, 80, 82, 84) in the Z row is placed on the substrate 14. If the display contains, for example, 384 240 picture elements, on the substrate will have six groups of 64 switching elements 240 lines. This example will be discussed below.

In Fig. 2 shows a more detailed diagram of the substrate 14. And again, the control circuit 12, external to the substrate, provides a voltage for pre-charging and the video signal lines 13 leading to the substrate 14. Driver circuitry lines 25, which may be performed as described above, and includes the TFT Tr is OK as is known from the prior art. Line marked in Fig. 2 in rows 1-Z (shown only the first and last lines). The rest of the strings are identical. As shown in Fig. 2, there is X groups of Y switching element. The switching element includes a transistor and an associated capacitor element of the image. In the first group, identified by the number 72, for simplicity, shows only four switching element 86, 88, 90 and 92. In fact, should be 64 such switching element if the group number is equal to six and the total number of columns is equal to 384. The gates of transistors 78, 80, 82 and 84 constituting the thin-film transistors made on the glass substrate 14 to be connected by means of conductor line with the scheme of driver lines 25. The capacitor element of an image or display element (94, 96, 98 and 100) is connected to the source electrode of the corresponding transistor 78, 80, 82 and 84. The electrode 28 forms a second capacitor plate element image and represents a segment of the ground electrode or the common electrode, which is placed on the opposite side of the display 14.

In contrast to the scheme shown in Fig. 3, the present invention is illustrated in Fig. 1 and 2, the key circuit 53 and unlocks key scheme 55. The control circuit 61 alternately enables and disables the key circuits 53 and 55 so that at any given point in time included only one key scheme. This ensures that the charge odd and even lines D1,..., D64 from the voltage source 63 and 65, respectively. When a switching circuit 55 is open, the circuit demuxing generates clock signals to turn on the transistors 108, 110,..., 112 and 114 in all groups, thereby the charge all the capacitors 94, 96, 98 and 100 in the selected line.

As follows from the above description, the invention allows to exclude 384 thin-film transistor (320, 322, 324, and 326) on the display substrate shown in Fig. 3. This, in turn, reduces manufacturing costs and increases the yield and reliability. A function circuit for pre-charging 316 in the present invention is performed by the control circuit 12 and the circuit demux 102. After the pre-charge is performed, otherwise, operation of the circuit shown in Fig. 3, does not differ from the operation circuit corresponding to the present invention.

As shown in Fig. 2, with regard to the time chart shown in Fig. 4, it is clear that the time interval functional the National Committee on television systems (USA). This time line includes: time to cancel selection (deselection) of the previous line is 8 μs, the time to pre-charge the scan line data transmission - 6 μs, the time on the video transmission by demuxing from the external video source on the X groups of data lines of the display - 42 μs and the time to transition to a stable state image elements - 7 ISS. This is shown in Fig. 4(C). As follows from Fig. 4 (d), during the first 8 MS time deselects previously scanned (n-1)-th line is discharged from the selected level selection, for example +20 to deselect equal to -5, as shown in Fig. 4(e). This allows you to isolate all the capacitors of the picture elements in the (n-1)-th line, so that they retain their charge corresponding to the image data. After a time interval of deselection duration of 8 μs, the signal for pre-charging for the n-th line (Fig. 4(i), (j)) are adjusted to the preselected voltage, for example up to 15 In 6 ISS. As shown in the example of the first pulse (Fig. 4 (g), (h), (i), (j)), during this time pre-charge duration 6 ISS all signals demuxing are set to high level. This leads to the unlocking of transis the data line even numbered D2, D4,..., D384 charge to level V-. In contrast, in the circuit shown in Fig. 3, the signal PF from the circuit for pre-charging 316 must go to the state high level to unlock the transistors 320, 322...324 and 326 so that 6 ISS internal data lines to the odd numbered D1, D3,..., D383 charged to the level of V+, and the internal data lines to the even-numbered D2, D4,..., D384 charged to V-. It can be seen that the first pulse for pre-charging (Fig. 4 (f), (g), (h), (i) and (j)) replace the function PF in the circuit of Fig. 3. It should also be noted that the specialist in the art it should be clear that shown in Fig. 4 (f) single pulse with a duration approximately 13 ISS can be used instead of the two shown successive pulses of pre-charge control signal. This is because the second pulse immediately follows the first pulse so that the equivalent single pulse will provide the same result.

The voltage level of V+ in this example is approximately equal to +5 V, and the voltage level V is approximately equal to 0 C. However, it should be borne in mind that these voltage levels can be changed to improve performance fu the ISS, internal data line and the capacitor element image can be charged up to the value of V+, which is smaller than the maximum voltage of the 5th Century and Then during the time interval 7 ISS for charging the data lines of the capacitor elements of the image to the voltage level of the input data, you will need the same time to V2 is changed from V+ to the maximum voltage of the data signal, and V1 is discharged to a minimum voltage of the data signal. In both cases, the charging time for the V2 and the charging time for V1 can be reduced or optimized. The charging time of the data line and the capacitor element of the image is reduced to the interval of time required to obtain V2, if you need further charge, and, if desired predefined voltage of the data line is less than 5, the discharge time until the desired level is reduced by a time interval equal to the interval of a discharge of V1. Thus, the voltage level of V+ can be optimized so that the difference in time between the charge internal data lines and associated capacitor element image to the maximum level of the input video signal, for example 5 V, and the discharge of internal lignola video for example 0 V, was minimal. Therefore, it requires less time for pre-charging, since the capacitor elements of the image are not charged to the full value of 5 during the period of time for pre-charging. The voltage level V - applies the same analysis to the voltage level V+.

After all the internal data line and the capacitor of the picture elements in the selected row, such as 94, 96,..., 98 and 100, the pre-charged to levels V+ or V-, the incoming video signals (red, green and blue) and an additional for these signals are lines D1 - D64 data entry. In this case, D1, D3,..., D63 correspond to the video signals of positive polarity, and D2, D4,..., D64 - additional signals for polarity them. These voltage signals shown in Fig. 4 (i) and (j) the dotted lines following the preliminary charge. The control signals from the driver circuit, the demux 102 on lines 104 and 106 increase to 25 V and 30 V, respectively, as shown in Fig. 4 (f) for the interval 7 ISS. Each of the remaining X groups of lines of input data, in this case X = 6 has the video data lines 13, supplied to them within 7 μs, as shown in Fig. 4 (f), (g), (h). The reason is tsya scheme of inversion of the polarity of the voltage data. The polarity of the voltage of the data varies between the two fields of a TV frame. The last 7 ISS from the interval duration 63 ISS is used to ensure the best transition to a stable state image elements of the last group, group X.

Transistors demuxing 108, 110,..., 112 and 114 are selected so that the internal data line D1,..., D64 could be discharged to a value within 25 mV of incoming signal levels of the color video data in the allotted time interval, 7 μs in this example. Sequential operations are repeated for each of the schemes multiplexing 66, 68, 70, or all six groups.

At the beginning of the scan operation n-line switching transistors of the picture elements in the n-th row is already fully included (translated in open state). So after scanned (n-1)-th row deselection (shot selection), the picture elements in the n-th row is then pre-charged. If the remaining time of the transfer of the input data duration 49 ISS divided into essentially equal intervals of time 8 μs each, the first unit transistors of the picture elements in the columns of D1 . .., D 64 in the n-th row has all 49 intervals in the 128 has a discharge time of approximately 41 ISS. The third block will be about 33 μs, and so on, the Last block of the transistors of the picture elements in the n-th row will have only 9 ISS provided for the discharge of image elements.

When the selected time interval 7 ISS each of the six groups of image elements and the last 7 ISS on the transition to a stable state image elements, as shown in Fig. 4 (d), sufficient time will be allocated for the discharge of all of the transistors of the picture elements. Small discharge time could cause a voltage error V for the sixth block of picture elements. In order to reduce V and to provide a resolution defined by 256 gray levels, it is desirable to provide an additional 7 ISS as the time interval allotted for the transition of image elements in a stable state. In this case, 14 ISS will be sufficient for the sixth capacitor groups of image elements to ensure they are in a stable state corresponding to the level of the video signal. After (n-1)-th line deselection, as shown in Fig. 4(e), selectively n-th line, and the maximum applied thereto a voltage of 20 V, as shown in Fig. 4(K).

It should be borne in mind that cooet to be optimized or selected a compromise way in accordance with the scope of the respective product. For example, to provide high resolution and/or high quality image you can use a lower coefficient demuxing, so that more than 64 videosignals Explorer group can be introduced into the substrate 14. You can also reduce the large number of input conductors of the price of a smaller number of gray levels or lower speed of formation of the video.

In addition, the present invention provides that the data line and the image elements is pre-charged to a small desired voltage levels, due to the fact that for the transfer of signals used transistors with a channel of N-type, and the data line or the image elements are discharged when the input video signals. So how much easier and faster to discharge them, than to charge for obtaining an accurate signal voltage.

In addition, F1, e, and F1, (lines 104 and 106) can be combined in a single signal line management, supply all the gates of the transistors MUX 108, 110,..., 112 and 114 in group 1. Association signals F1,e and F1, may be performed if the voltage stress on the gate has no snowmaking discharge of internal data transmission lines and capacitors of the image elements. Similarly, other pairs of lines demuxing, such as 130 and 132 to the other five groups, including 68 and 70 in Fig. 2, can be combined into one control line for each pair. In this case, the number of lines of the gate control element multiplexing can be reduced to half.

In the example shown here uses color portable TV with 384 240 picture elements. The number of horizontal picture elements is equal to 384. Transistors demuxing 108, 110,..., 112 and 114 are made in the form of thin-film transistors in the display for a transfer voltage for pre-charging and video data and for interfacing the display directly from the video source. The voltage pre-charge is applied to all columns simultaneously. The video signals from the video source that is external to the display, proceed on a 64 display line data transfer at any given point in time using 1/6 of the time interval allocated for the line. 12 control signals, two for each of the six groups, unlocked transistors demuxing in six different blocks for the serial transfer of incoming video signals at above the 4 internal data lines D1, . .., D64 following 64 video will be transferred to the internal data lines D65, ..., D128. This is achieved by unlocking the second set of control signals demuxing. As noted, each transfer of the video signal occupies 1/6 of the selected time interval. This operation is carried out sequentially for all six schemes demuxing. One complete line of video information is transferred to the internal data lines 42 ISS as part time data entry.

1. Scheme for transmitting video data to a display having a matrix of picture elements arranged in rows and columns containing the first and second substrates, at least the first of which is made of glass separated by a layer of electro-optic material, characterized in that it contains Y input lines of the columns, printed on one of the substrates, the X groups of Y elements demultipleksirovanie deposited on one of the substrates, and each element demuxing is directly connected to the corresponding Y input lines of the columns, the scheme demuxing, external to the first substrate with X money supply enabling signal, the line is to the first substrate, have Y output lines connected to the Y input lines of the columns that is used to send the voltage pre-charge on the Y input lines and columns for transmission of video data on the Y input lines of the columns.

2. The diagram on p. 1, characterized in that it further introduced the X groups of Y switching element for each of the Z lines, each switching element includes a switching transistor and an associated capacitor element image, and each capacitor of the picture element has a first electrode deposited on a first substrate and a common electrode deposited on the second substrate.

3. Scheme under item 1 or 2, characterized in that it further comprises a pair of control lines forming each of X means filing a trigger signal applied to the first substrate, and the first of the pair of control lines connected to each odd element demuxing the corresponding group, and the second of the pair of control lines connected to each even-numbered element demuxing for excitation of the odd-numbered and even-numbered input lines for odd and even number of switching transistors, respectively, in the selected one of the Z lines in each group lane is from her video each element demuxing and each switching transistor is made in the form of a thin film transistor.

4. The diagram on p. 3, characterized in that it is the number of groups X is chosen equal to 6, the number Y is chosen equal to 64, and Z is equal to 240.

5. The diagram on p. 3, characterized in that the video is a TV picture.

6. The diagram on p. 1, wherein the control circuit includes a first voltage source to a predetermined value (V+, V -) connected to the odd-numbered output lines D1, D3,..., D (n - 1) control circuit for providing voltage to them for pre-charging, the second source voltage to a predetermined value (V+, V -) connected to the even-numbered output lines D2, D4, ..., Dn control circuit for providing voltage to them for pre-charging the first key means for selective transmission of video data on the output lines D1, ..., Dn, the second key means for the selective connection of the first and second voltage sources to the output lines D1, . . . Dn and control key means for alternately opening and closing the first and second key means so that at any given mamasa fact, the control circuit is arranged to supply voltage preliminary charge on the Y input of the column lines during the first time interval and feed the video to the Y input of the column lines during a subsequent second time interval, and the circuit demux executed with ability to run each of the X groups of Y elements demuxing during the first time interval and subsequent run Y input lines of the respective of the X groups of elements demuxing in the next second intervals.

8. The diagram on p. 1, characterized in that the display is made in the form of a liquid crystal display.

 

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SUBSTANCE: light source controller, which controls backlight, provides processing which is successively performed for all units SA-a (1) - (16) in the SA-a correction region. Processing includes installation of the SA-a region for four regions SA-a - SA-d as a correction region and providing light emission in unit SA-a (1), which is a unit in the SA-a correction region, and successive emission of light in units SA-b (n) - SA-d (n), which lie in three other regions SA-b - SA-d, except the SA-a correction region, and positions of which, in these regions, correspond to the SA-a (n) unit. The light source controller then repeats similar operations for the remaining three regions SA-b - SA-d, used as correction regions.

EFFECT: possibility of correcting brightness or colour grade of emission light with high accuracy and with low expenses.

9 cl, 17 dwg

FIELD: physics.

SUBSTANCE: liquid-crystal display device recognises every 12 video signal lines (SL1-SLn) in the order of their arrangement as a group and drives the video signal lines with time division in the group in the horizontal scanning period. The order of driving video signal lines in the group for a frame with an even number differs from the order for a frame with an odd number. For each line, the video signal line with an even number is driven first in one frame, and the video signal line with an odd number is driven first in another. The first and last driven video signal lines are specified so that they correspond to blue colour. The number of push-ups, under the effect of which video signal lines fall, is limited to two for the frame with an even number and zero for the frame with an odd number in addition to change of their order, so that the arising of vertical strips at low temperatures is prevented. Additionally, only video signal lines corresponding to the blue colour are specified as having insufficient charge, so that viewers find it difficult to recognise deterioration of image quality due to insufficient charge.

EFFECT: prevention of arising of vertical strips in display devices which perform driving with time division of video signal lines.

13 cl, 9 dwg

FIELD: information technology.

SUBSTANCE: invention is a system for image post-compensation processing. A modified process (2521) for storing brightness/image compensation is aware of the image post-compensation process (2523) and can allow for its influence on an input image (2520). The modified process (2521) for storing brightness/image compensation can generate and apply to the input image (2520) a process which will compensate for the level of backlight selected for the image, and which will compensate for the effect of the image post-compensation process (2523).

EFFECT: compensation for drop in image quality during operation of a display in low power mode.

20 cl, 120 dwg

FIELD: information technologies.

SUBSTANCE: mobile electronic device includes a capacitance sensor, having an electrode layer with non-etched sections and etched sections, and having isolation areas formed on etched areas, and a segmented optical gate arranged on the side of the capacitance sensor, besides, the optical gate includes a liquid crystal layer inserted between an upper absorbing polariser and a lower absorbing polariser, and includes an element of reflective property increase, arranged between the liquid crystal layer and the lower absorbing layer. The reflective property of the element of reflective property increase is selected to reduce the ratio of the reflective property on non-etched areas to the reflective property on etched areas to make the user interface appearance substantially uniform in off condition.

EFFECT: providing the user with various configurations of keyboard buttons required to the user depending on the used mode of the device operation.

20 cl, 4 dwg

FIELD: physics.

SUBSTANCE: presence of change of view in a video sequence is detected. The value of the backlight brightness level of the current frame in said video sequence is determined based on image characteristics in said current frame. Said value of backlight brightness level is filtered by a first filter when change of view is defined as close to said current frame; and said value of backlight brightness level is filtered by a second filter when change of view is not defined as close to said current frame.

EFFECT: filtering the backlight brightness level of a display using an adaptive filter based on presence of change of view near the current frame.

20 cl, 98 dwg

FIELD: information technology.

SUBSTANCE: histogram calculation process calculates an image histogram. A distortion module uses the histogram value and distortion weight in order to determine distortion characteristics for various backlight illumination levels, and then selects the backlight illumination level which lowers or minimises the calculated distortion. After selecting the backlight illumination level, the backlight signal is filtered by a time filter in a filtration module. A Y-amplification projecting module is used to determine the image compensation process. This compensation process involves application of the curve of the tonal range to the brightness channel of the image.

EFFECT: amplification of an image formed by displays which use light radiators, owing to adjustment of pixel brightness and setup of the light source of the display to different levels in accordance with image characteristics.

20 cl, 107 dwg

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