White-noise generator (options)

 

(57) Abstract:

The invention relates to the field of computer engineering and can be used as sasumua devices in different communication channels. Achievable technical result is the development of white-noise generator (in three versions), which allows you to control the parameters of the generated white noise in a wide frequency dynamic range. This is achieved in that the device has m generators reference sequence, which together with driver grid frequency is formed from the outputs of the elements And the bits of the m-digit, in the first and second variants of the pseudo-random number (PN), as in the third embodiment, random (MF). In addition, using the control unit, setting the desired atomicity PCP and MF in the generated sequence, you can adjust the frequency-dynamic parameters of white noise. White-noise generator also includes a persistent storage device, digital to analog Converter and a smoothing filter. 3 S. and 3 C.p. f-crystals, 10 ill.

The invention combined to form a single inventive concept relate to the field of computer engineering and can be used as a pulse type white noise [1, S. 45, Fig. 2.5]. The random event generator includes cascade-connected generator noise, amplifier noise, a nonlinear element and a quantizer, and a generator of periodic pulses, the output of which is connected to the second input of the quantizer. The output of the quantizer is the output of the random event generator. However, this device has a low dynamic range of the output white noise, because its technical essence is a single-bit sensor binary numbers. Additionally, the generator - similar to not allows you to manage the settings of the output random process.

Closest to the proposed variants of the claimed device to the technical essence is a known generator of white noise [2, C. 44, Fig. 3.3] , containing the shift register, the feedback circuit that includes a combinatorial logic circuit, tabular persistent storage device, a noise generator, a discriminator and digital to analogue Converter. D / a Converter is a proper d / a Converter and a smoothing filter whose output is the output of this block and its input - input digital-to-analog Converter whose output is connected is connected to the clock input of the combinatorial logic circuit. The outputs of the shift register simultaneously connected to the same inputs of the combinatorial logic circuit and tabular permanent storage device whose outputs are connected to corresponding inputs of digital-to-analog Converter. The yield of the latter is the output of the generator white noise.

However, this generator has a number of disadvantages.

First, in the known device it is impossible to adjust the parameters generated by the random process is white noise.

This is because to obtain the noise used reference m-digit sequence of pseudo-random numbers (PCP), which is formed by the method of parallel retrieval of a PCP with n-cells of the shift register (where n is the length of the shift register). However, it is known [3, S. 259] that the maximum bit width of m-bit PN, generated by the parallel method, may not exceed the shift register, i.e., m n. Consequently, when the fixed length of the shift register can generate an m-digit sequence PCP capacity not greater than n. Otherwise, when m > n, the symbol digit m-digit sequence of a PCP will be linearly dependent and therefore will not meet the static properties of the m-EIT is th operation at high frequency to generate white noise.

With this method of building m-digit reference sequence PCP increases the number of inputs of the adders modulo two and the number of them [3, S. 256]. So, when n = 20, you can get a m-digit sequence PCP capacity of not more than 20. The average number of 20 vchodove adders modulo two reaches 10, and the total number of inputs 200. Such a number of feedbacks and inputs of the adders modulo two in conditions of high clock frequency of formation of the white noise will inevitably lead to failure of the generator and the General instability of the operation of the device as a whole. This is called the problem of "race", including logical elements in such cases [4, S. 149-164].

Thirdly, the complexity of the design of such generators.

When implementing a generator of white noise problems with its design or synthesis, when the number of cells of the shift register reaches 20 or more. In this case, finding the best feedback, which must be connected to the inputs of the modulo two (or optimal structure) in order to obtain the required m-digit sequence of a PCP, has no analytical solution [3, S. 257].

The purpose of the proposed objects of the invention is the white noise in a wide frequency, dynamic range, while improving the sustainability of their operation.

The goal in the first embodiment is achieved by the well-known white-noise generator comprising a generator of the reference sequence, a persistent storage device, the outputs of which are connected to the respective outputs of the digital to analogue Converter, the output of which is connected to the input of the smoothing filter whose output is the output of the generator of white noise added to the pulse generator, driver grid frequency, m elements And, where m is 2,3,.. m - 1 generators of the reference sequence and the control unit. The output of the pulse generator is connected to the input of the shaper grid frequency, the i-th output driver grid frequency, where i = 1,2,..., m, is connected to the input of the i-th generator of the reference sequence and to the second input of the i-th element I. the Outputs of m elements And connected to the corresponding m inputs permanent storage device. The I-th output control unit connected to the third input of the i-th element, And the output of the i-th generator of the reference sequence is connected to the first input of the i-th element And.

The I-th generator of the reference sequence contains a shift register and modulo two. the inputs of the adders modulo two. The output of the adder modulo two is connected with the information input of the shift register whose output and clock input are respectively the output and the input of the generator of the reference sequence.

Due to the above mentioned essential features of the proposed device enables the generation of a random process is white noise with required parameters, due to the receipt of m linearly independent reference sequences of pseudo-random binary numbers and the ability to regulate the capacity of the generated m-digit pseudo-random numbers. In addition, the generator, by simplifying the hardware implementation is more stable operation at higher frequency the formation of white noise.

The goal in the second embodiment is achieved by the well-known white-noise generator comprising a generator of the reference sequence, a persistent storage device, the outputs of which are connected to corresponding inputs of digital to analog Converter, the output of which is connected to the input of the smoothing filter whose output is the output of the generator of white noise added to the pulse generator, the driver set the shaper of the grid frequency. The I-th output driver grid frequency, where i=1,2,..., m are connected to the second input of the i-th element And the i-th input element OR. The output element OR is connected to the input of the generator of the reference sequence. The generator output of the reference sequence is connected to the first inputs of the m elements GI of the I-th output control unit connected to the third input of the i-th element And the outputs are connected to the m inputs of the permanent storage device.

The generator of the reference sequence contains a shift register and modulo two. The outputs of the j-th where l=2,4,..., and l-th bits of the shift register generator reference sequence connected respectively to first and second inputs of the modulo two. The output of the adder modulo two is connected with the information input of the shift register whose output and clock input are respectively the output and the input of the generator of the reference sequence.

Due to the above mentioned essential features of the proposed device enables the generation of a random process is white noise with required parameters, due to the formation of linearly-independent reference sequences of pseudo-random binary numbers and the ability regi implementation, is more stable operation at higher frequency in the formation of white noise.

The goal in the third embodiment is achieved by the well-known white-noise generator comprising a generator of the reference sequence, a persistent storage device, the outputs of which are connected to corresponding inputs of digital to analog Converter, the output of which is connected to the input of the smoothing filter whose output is the output of the generator of white noise added to the pulse generator, driver grid frequency, the element OR m elements And, where m=2,3,..., and the control unit. The output of the pulse generator is connected to the input of the shaper grid frequency. The I-th output driver grid frequency is connected to the second input of the i-th element And, where i= 1,2, . . . m to the i-th input element OR. The output element OR is connected to the input of the generator of the reference sequence. The generator output of the reference sequence is connected to the first inputs of the m elements GI of the I-th output control unit connected to the third input of the i-th element And the outputs are connected to the m inputs of the permanent storage device. To the control input of the generator support posledovatelnostei contains the latch instantaneous values of voltage, information the input of which is connected to the output of the noise source and the output to the first input of the first comparator. Generator linearly-varying voltage, the output of which is connected to the second inputs of the first and second Comparators. The first input of the second comparator is a control input of the generator of the reference sequence. The output of D-flip-flop is the output of the generator of the reference sequence on the D-input and C output of which is connected respectively to the outputs of the elements And and NOT. To the clock input of latch instantaneous values of voltage, the generator input linearly-varying voltage and the input element is NOT connected to the generator input reference sequence. The outputs of the first and second Comparators are connected to the inputs of the element I.

Due to the above mentioned essential features of the proposed device enables the generation of a random process is white noise with required parameters, due to the formation of linearly-independent reference sequences of random binary numbers and the ability to regulate the capacity of m-digit random numbers. In addition, the generator, by simplifying the hardware implementation has a higher resistance functionless level of technology has allowed to establish, that analogues characterized by a set of characteristics is identical for all features of the proposed generator white noise, no. Therefore, the claimed invention meets the condition of patentability - novelty."

Search results known solutions in this and related areas of technology in order to identify characteristics that match the distinctive features of the prototype of the characteristics of the claimed invention, have shown that they do not follow explicitly from the prior art. Of certain of applicant's prior art there have been no known impact provided the essential features of each of the claimed inventions transformations on the achievement of the technical result. Therefore, the claimed invention meets the condition of patentability - "inventive step".

The inventive generator white noise is illustrated by drawings, in which: Fig. 1 presents a diagram of the inventive generator in the first embodiment, and Fig. 2 diagram of the reference oscillator in the first embodiment, and Fig. 3 - scheme driver grid frequency; Fig. 4 is a timing diagram explaining the principle FSC; Fig. 5 is a diagram of the control unit of Fig. 6 presents a diagram saleemul the outline of the proposed generator according to the third variant; in Fig. 9 diagram of the reference generator according to the third variant of Fig. 10 is a timing diagram explaining the principle of generator reference sequence according to the third variant.

The inventive device according to the first embodiment includes (Fig. 1) the pulse generator (GI) 1, driver grid frequency (FSC) 2, m generators reference sequence (GOP) 3.1-3. m, m elements And 4.1-4.m, digital to analog Converter (DAC) 5, a persistent storage device (ROM) 6, and a smoothing filter (SF) 7 output 8 which is removed generated white noise, the control unit (cu) 9. Input SF 7 is connected to the DAC output 5. The outputs of the ROM 6 is connected to the same inputs of the DAC 5. To the inputs of ROM 5 connected to the same outputs of m elements And 4.1-4.m. The output SF 7 is the output of the generator white noise. Exit GI 1 is connected to the input FSC 2, the i-th output FSC 2 is connected to the second input of the i-th element And 4.1-4.m and the input of the i-th GOP 3.1-3.m. The outputs of the i-th GOP 3.1-3. m connected to the first input of the i-th element And 4.1-4.m. The output BU 9 is connected to the third input of the i-th element And 4.1-4.m. The outputs of the m elements And is connected to the m inputs of the ROM 5.

The I-th GOP 3.1-3. m in the first embodiment includes (Fig. 2) shift register (RS) 3.1-3. m. 2 and modulo two (SMD) 3.1.1-3.m.1. The outputs of the k-th and (n+1)-th bits of the RS 3.2.1-speed RS 3.1.2-3.m.2, which output and clock input are respectively the output and the input of the generator of the reference sequence.

GUY 1 in the first embodiment is designed to generate pulses with a duty cycle T/t=2, where T is the period of the pulse and t is the pulse duration. Such generators are known and described, for example, in [3, S. 240, Fig. 7.9] .

FSC 2 in the first embodiment is designed to generate, depending on the input pulse repetition rate F=1/T duty cycle 2, at its m outputs pulses with repetition rates

F,F2,F4,...,F2(m-1). (1)

Scheme of VSC 2 in the first embodiment, handles such tasks in the inventive device shown in Fig. 3 and consists of blocks of doubling (blue) 2.1-2. m. Each block of doubling 2.1-2.m contains: delay components (EZ) 2.12-2. m2, 2.18-2. m8, the items are NOT 2.11-2.m1, 2.13-1.m3, 2.17-1.m7, elements, And 2.14-2.m4, 2.15-2.m5, 2.19-2.m9, elements OR 2.16-2.m6.

ROM 5 in the first embodiment is designed to convert the input sample m-digit sequence of a PCP with a uniform law of their distribution in m-digit sequence of a PCP with the normal law of distribution. Scheme and principle of operation of the ROM 5 are known and described, for example, in [3, S. 290, Fig. 10.7].

SF 7 in the first embodiment is used for suppression of "outliers" in the output analog signal of the white noise caused by the finite time clock frequency DAC output 6. Schematic principle of operation and design of such filters is well known and described, for example, in [1, C. 66, Fig. 4.11].

BU 9, in the first embodiment, is designed to control the parameters of a random process: dynamic range and boundary frequency spectrum of the generated white noise. Scheme BU 9 given tasks can be implemented as a set of radio buttons A9.1-9.m, switching on the third inputs of elements And 3.1-3.m (4.1-3.m, 5.1-5.m) the voltage level of the logical unit (Ulog"1") (Fig. 5).

The inventive device, for example, the first option works as follows.

Output KI-1 sequence of pulses, the duty cycle T/=2 is fed to the input FSC 2 (Fig. 3). Each Blue 2.1-2.m is the doubling of the pulse repetition rate with saving duty cycle - 2 (Fig. 4 (b). In blue 2.1 doubling the repetition rate of the input sequence of pulses is as follows. The sequence impulselike delayed and inverted. At the time of the simultaneous presence of both inputs of the element And 2.14 at its output will be generated pulse (Fig. 4 g). A similar pulse is formed and the output element And 2.15 at the time of the presence of the first input sequence is inverted and delayed pulses from input blue 2.1 and the input sequence of pulses (Fig. 4 (a). The output element OR 2.16 will be generated twice the pulse repetition rate of the sequence of pulses received at its input from the outputs of the elements And 2.14 and 2.15 (Fig. 4 (b). If the repetition rate of the input sequence of pulses is equal to F=1/T, and a duty cycle equal to 2, the output is twice the pulse frequency will be the sum of the sequence twice the duty cycle with the same pulse repetition rate,

T/(0,5 t)+T/(0,5 t)=2(T/0,5 t)

where

F=1/2T, 2F=1/T.

The generated sequence of pulses doubled repetition rate duty cycle 2 at the same time is supplied to another input blue 2.2 and to the inputs of the elements is NOT 2.17 and EZ 2.18, which in the last two elements, respectively, is inverted (Fig. 4 x) and delayed (Fig. 4 y). At the moment the simultaneous presence on the inputs of the element And 2.19 of these pulses will be: open predestine delay time in EZE 2.19 tLsthat is sufficient to generate pulses at the output of element And 2.19 and their use as pulses of clock frequency when the function generators reference sequences IR 3.1-3.m.

The principle of operation of the following units doubling 2.2-2.m is similar to the above. Thus, the input sequence of pulses at the input FSC 2, will be converted to a grid of frequencies (1).

It is known [4, S. 191] that if the sequence of random binary numbers g(t), generated with a frequency F, to form the m-basic sequences of random binary numbers with the following repetition rates

g1(t) 20F, g3(t) 21F, g3(t) 22F, ... , gn(t) 2n-1F (4)

in which

m-th bit (the elder) is formed with a frequency of 2n-1F, (m-1)-th bit with a frequency of 2n-2F and so on, and 1-th digit (the youngest) with a frequency of 20F, then the result is m-valued sequence of random binary numbers

< / BR>
with uniform distribution.

The autocorrelation function R() m-valued sequence of random binary numbers to meet the requirement of ravnomernost and equals VZ)2i-1with coefficients equal to the square of the weight, the corresponding digit of the number

(6)

where

i - number of the reference sequence, forming the corresponding i-y the category of m-valued sequence of random numbers.

From (3) to (6) it follows that for the higher digits are required to present the highest demands of the "randomness", and to the youngest - low without compromising the quality of the m-digit random numbers with a uniform distribution.

Therefore, m-digit sequence of a PCP is formed from the m reference sequences of a PCP, as follows.

The sequence of clock pulses with frequencies (1) with the respective outputs FSC 2 are received at the clock inputs GOP 3.1-3.m and second input elements And 4.1-4. m. Given that the GOP 3.1 contains the i-cells, and each subsequent GOP 3.2-3. m on 2 cells more previous generator reference sequence, their outputs will be generated reference sequence of a PCP with the following periods

iT,(i+2)T,..,(i+l)T. (7)

Time generating sequences of pseudo-random numbers each GOP 3.1-3. m will be the same, because the repetition rate of clock pulses with respect to the input is doubled from the first Ha from Junior level to the senior will be determined by (1) and obey according to (6). Then each discharge exits GOP 3.1-3.m is transferred to the ROM 5 through the elements And 4.1-4.n allows the signal received at the second input from the corresponding FSC 2. Thus, at the input of the ROM 5 will be formed, with a frequency of F2(m-1)m-digit sequence of a PCP with uniform distribution.

Next m-digit sequence PCP arrives at the inputs of the ROM 5, where the transformation of the statistical properties of the uniform distribution law m-digit IR in normal law. The algorithm for this conversion is known and is described in detail in [2, S. 178-179]. Received m-digit sequence of a PCP with the normal distribution are fed to the inputs of the DAC 7, the output of which is removed analog random signal is white noise. For smoothing "outliers" in the white noise on the DAC output 5 enabled SF 7.

To control the output parameters of white noise in the claimed generator has a control unit 9. When turning on the switches P 9.1-9.m in position "1" on the third inputs of m elements And 4.1-4.m is the voltage level of the logical unit (Ulog."1". In this case, is formed of m-valued sequence of a PCP. After successive transformations in P frequency spectrum and dynamic range.

If, for example, to turn on the switches P 9.1-9.(m-j) in position "1", the voltage level of the logical unit (Ulog."1") will be submitted only on the third inputs (m-j) elements And 4.1-4.(m-j). In this case, will be formed (m-j)-digit sequence of a PCP and after similar transformations on the output SF 7 will be white noise with different parameters. The boundaries of the frequency spectrum and dynamic range of the white noise will be less. This is because (m-j)-digit sequence of a PCP is formed with a clock frequency of 2(m-j)F and period (m-j)t

Compared with the prototype of the proposed generator in the first embodiment can generate at its output white noise with the given parameters, the cutoff frequency of the frequency spectrum of a random process and its dynamic range. The use of more simple way to form the m-digit sequence PCP allows the generator to operate at higher clock frequencies more stable, which allows the use of such generators as sasumua device communication channels. In addition, the design and implementation of such generators with greater output capabilities much easier as it does not cause Proc. of the attachment of the optimal structure of the generators [4].

The inventive device according to the second variant contains (Fig. 6) the pulse generator (GI) 1, item OR 2, the generator of the reference sequence (GOP) 3, driver grid frequency (FSC) 4, m elements And 5.1-5.m, a persistent storage device (ROM) 6, a digital-to-analogue Converter (DAC) 7, a smoothing filter (SF) 8, with output 9 which is removed generated white noise, the control unit (cu) 10. Sign SF 8 is connected to the DAC output 7. The outputs of the ROM 6 is connected to the same inputs of the DAC 7. The output SF 8 is the output of the generator white noise. The outputs of the ROM 6 is connected to the corresponding inputs of the DAC 7, the output of which is connected to the input of SF 8. The output SF 8 is the output of the generator white noise. Exit GI 1 is connected to the input FSC 4, the i-th output of which is connected to the second input of the i-th element And 5.1-5.m to the i-th input element OR 2, and the output of the OR element 2 to the input of the GOP 3. The output of GOP 3 is connected to the first inputs of the m elements GI of the I-th output BU 10 is connected to the third input of the i-th element And 5.1-5.m, the outputs of which are connected to the m outputs of the ROM 6.

GOP 3 according to the second variant contains (Fig. 7) shift register (RS) 3.2 and modulo two (SMD) 3.1. The outputs of the j-th l-th bits of the RS 3.2 connected respectively to first and second inputs CMD 3.1. Output 3.1 MD connected with in the CLASS="ptx2">

Schemes, the appointment of KI-1, FCC 4, ROM 6, the DAC 7, SF 8 and BOO 10 in the second embodiment is similar schemes and assignments KI-1, FCC 2, the ROM 5, the DAC 6, SF 7 and BU 9 in the first embodiment.

The inventive device in the second embodiment operates similarly to the device in the first embodiment, except that in the second embodiment, GOP 3 forms only one reference sequence of pseudo-random binary numbers, and m-digit sequence of a PCP is formed as follows.

The sequence of clock pulses with frequencies (1) with the respective outputs FSC 4 go to corresponding inputs of the OR element 2. With the release of the latest total sequence of clock pulses with a frequency of F2(m-1)arrives at the clock input GOP 3 the output of which is formed by a sequence of pseudo-random binary numbers. At the same time the sequence of clock pulses with frequencies (1) with the respective outputs FSC 4 arrive at the second input elements And 5.1-5.m. Alternately switching the output of GOP 3 to the corresponding inputs of the ROM 6 to the act (1). With a frequency of F2(m-1)at the input of the ROM 6 is formed of m-valued sequence of a PCP with uniform distribution.

Compared with the prototype of the m output white noise with the given parameters, the cutoff frequency of the frequency spectrum of white noise and dynamic range. Allows you to create a reference sequence of a PCP of any valence, the generator is not complicated and works more smoothly in high clock frequency. In addition, the design and practical implementation of such generators with greater output capability is not a problem, because unlike the prototype, there are significant challenges for the synthesis of m-valued reference generator of a PCP, and the absence of rigorous analytical solutions for finding the optimal structure [4] distinguishes from the prototype.

The inventive device according to the third variant contains (Fig. 8) the pulse generator (GI) 1, item OR 2, the generator of the reference sequence (GOP) 3, driver grid frequency (FSC) 4, an adjustable reference voltage (ION) 5, m elements And 6.1-6.m, a persistent storage device (ROM) 7, a digital-to-analogue Converter (DAC) 8, a smoothing filter (SF) 9 output 10 which is removed generated white noise, the control unit (cu) 11. Exit GI 1 is connected to the input FSC 2, the i-th output of which is connected to the second input of the i-th element And 6.1-6.m to the i-th input element OR 2, and the output of the OR element 2 to the input of the GOP 3, the output of which is connected to the first inputs of m elements And 6.1-6. m. The I-th output BU 11 the GOP 3 is connected to the output ION 5.

GOP 3 according to the third variant contains (Fig. 9) noise source (ISH) 3.1, the latch instantaneous values of voltage (FMN) 3.2, generator linearly-varying voltage (CLAY) 3.3, 3.4 first and second 3.5 Comparators, element And 3.6, D-trigger 3.7 and the item is NOT 3.8. GOP 3 contains FSN 3.2, information whose input is connected to the output ISH 3.1, and the output to the first input of the first 3.4 comparator. The output of CLAYS 3.3 connected to the second inputs of the first 3.4 and 3.5 second Comparators. The first input of the second 3.5 comparator is a control input GOP 3. The output of D-flip-flop 3.7 is out GOP 3. On the D-input C-input D flip-flop 3.7 respectively connected to the outputs of the elements And 3.6 and NOT 3.8. At clock input FSN 3.2, the input of CLAYS 3.3 and the input element is NOT 3.8 plugged GOP 3, the outputs of the first 3.4 and 3.5 second Comparators are connected to the inputs of the element And 3.6.

Scheme and purpose of the KI-1, FCC 4, the ROM 7, the DAC 8, SF 9 and BU 11 in the third embodiment, similar to the schemes and assignments KI-1, FCC 2, the ROM 5, the DAC 6, SF 7 and BU 9 in the first embodiment.

ION 5 is designed to generate at its output a controlled value reference voltage. Schemes such controlled reference voltage sources are known and described, for example, in [6, page 78, Fig. 2.31 a].

The inventive device in the tray GOP version 3 generates only one reference sequence of random binary numbers (PSDC), and m-digit sequence PSDC is formed as follows.

In the third embodiment, GOP 3 generates a reference of m-valued sequence PSDC as follows (Fig. 9).

The generated sequences of clock pulses with frequencies (1) with the respective outputs FSC 4 go to corresponding inputs of the OR element 2. With the release of the latest total sequence of clock pulses with a frequency of F2(m-1)arrives at the clock input GOP 3. With clock input GOP 3 sequence of clock pulses fed to the control input FMOH 3.2 (Fig. 10 d). In the FMOH 3.2 remembered voltage (Fig. 10 (b), appropriate at this point in time the instantaneous value of the voltage noise at the output ISH 3.1 (Fig. 10 (a). At the same time starts CLAYS 3.3. At the moment of equality of the voltages at the outputs of CLAYS 3.3 and FMOH 3.2 (Fig. 10 c,b) triggers the first comparator 3.4. As a result, the output of the first comparator 3.4 formed pulse (Fig. 10 (e) to the voltage level equal to a logical unit. The duration of the resulting pulse is evenly distributed in the time interval ]0,T[. This is because the sampling instantaneous values of the voltages of the realization of a random process ISH 3.1 ravnomerno is and the second input of the second comparator 3.5 (Fig. 10 (f) at the time of his equality with the level of the linearly-varying voltage on the first input, the output pulse will be generated. The duration of this pulse is proportional to the level of the reference voltage and lies in the interval ]0,T[.

Let the level of the reference voltage is selected so that the duration of the pulses generated at the output of the second comparator 3.5 is equal to T/2. Then the probability of coincidence in time of the pulses from the output of the first comparator 3.4 with the pulses received from the second comparator 3.5 will be equal to 0.5. In this case, the probability can be interpreted as the ratio measures the duration of the generated pulse T/2 to the duration T, which formed the duration of the pulse with uniform distribution t [5, S. 17-18]

P = (T/2) / T = 0.5 IN.

If you reduce the duration of the pulse at the output of the second comparator 3.4, and will decrease the likelihood of the generated random sequence at the output of GOP 3.

To obtain a binary random sequence of signals is D-flip-flop. The sequence of random signals from the output element And 3.6 arrives at the D-input D flip-flop which is toggled by the inverted clock signal at its C-vedavalli random signals the likelihood of which can be adjusted by changing the voltage level at the output ION 5 (Fig. 10 u).

Compared with the prototype of the proposed generator in the third embodiment is the same as the device in the first two variants, can generate at its output white noise with the given parameters, the cutoff frequency of the frequency spectrum of white noise and dynamic range. Allows you to generate the reference sequence PSDC any valence, greatly simplifies and allows you to operate the generator is more stable at higher clock frequencies. In addition, the design and implementation of such generators with greater output capabilities much easier because it is not associated with the difficulties of synthesis of m-digit reference generator PSDC and finding simple analytical solutions when determining their feedback [4].

Sources of information

1. Bonev M. P. Generating random signals. M: Energy, 1971, 240 S.

2. Denda Century Noise as a source of information: Per. with it. -M.: MIR, 1993. -192 C., Il.

3. Potemkin, I. C. Functional units of digital automation. -M.: Energoatomizdat, 1988. -300 C., Il.

4. Yakovlev centuries Stochastic computing machine. -L.: engineering, 1974, S. 191.

5. Kanevsky H. M. Probabilistic problems in radio engineering (B-ka on radioles is in and other -M. : Radio and communication, 1983 - 272 C., Il. - (Mass reliability; vol.1070).

1. White-noise generator comprising a generator of the reference sequence, a persistent storage device, the findings of which are connected to corresponding inputs of digital to analog Converter whose output is connected to the output of the smoothing filter whose output is the output of the generator white noise, characterized in that it additionally introduced the pulse generator, driver grid frequency, m elements And, where m = 2, 3,... and m-1 generators of the reference sequence, the control unit, the output of pulse generator connected to the input of the shaper grid frequency, the i-th output driver grid frequency, where i = 1, 2,...,m, is connected to the input of the i-th generator of the reference sequence and to the second input of the i-th element And outputs m elements And each connected to the m inputs of a permanent mass storage device, the i-th output control unit connected to the third input of the i-th element, And the output of the i-th generator of the reference sequence is connected to the first input of the i-th element And.

2. Generator under item 1, characterized in that the i-th generator of the reference sequence contains a shift register and modulo DV is pout and second inputs of the modulo two, the output of the adder modulo two is connected with the information input of the shift register, the output of which and its clock input is respectively the output and the input of the generator of the reference sequence.

3. White-noise generator comprising a generator of the reference sequence, a persistent storage device, the outputs of which are connected to corresponding inputs of digital to analog Converter, the output of which is connected to the input of the smoothing filter whose output is the output of the generator white noise, characterized in that it introduced additional pulser driver grid frequency, the element OR m elements And, where m = 2, 3..., the control unit, the output of pulse generator connected to the input of the shaper grid frequency, the i-th output driver grid frequency, where i = 1, 2,..., m, connected to the second input of the i-th element And the i-th input of the OR element and the output element OR to the generator input reference sequence, the generator output of the reference sequence is connected to the first inputs of m elements And the i-th output control unit connected to the third input of the i-th element And the outputs are connected to the m inputs of the permanent storage device.

4. The generator according to the two, moreover, the outputs of the j-th (where j = and l = 2, 4,..., and l-th bits of the shift register generator reference sequence connected respectively to first and second inputs of the modulo two, the output of the adder modulo two is connected with the information input of the shift register whose output and clock input are respectively the output and the input of the generator of the reference sequence.

5. White-noise generator comprising a generator of the reference sequence, a persistent storage device, the outputs of which are connected to corresponding inputs of digital to analog Converter, the output of which is connected to the input of the smoothing filter whose output is the output of the generator white noise, characterized in that it additionally introduced the pulse generator, driver grid frequency, the element OR m elements And, where m = 2, 3,..., a control unit, the output of pulse generator connected to the input of the shaper grid frequency, the i-th output driver grid frequency is connected to the second input of the i-th element, And where i = 1, 2,..., m, and the i-th input of the OR element and the output element OR to the generator input reference sequence, the generator output of the reference sequence is connected to the first inputs m m inputs permanent storage device, to the control input of the generator of the reference sequence is connected to the output of the adjustable voltage reference.

6. Generator under item 5, characterized in that the generator of the reference sequence contains a latch instantaneous values of voltages, information whose input is connected to the output of the noise source and the output to the first input of the first comparator, the oscillator linearly-varying voltage, the output of which is connected to the second inputs of the first and second Comparators, the first input of the second comparator is a control input of the generator of the reference sequence, the output of D-flip-flop is the output of the generator of the reference sequence on the D-input C-input D flip-flop connected respectively to the outputs of the elements And NOT, to the clock input of latch instantaneous values of voltage, the generator input linearly-varying voltage and the input element is NOT connected to the generator input reference sequence, the outputs of the first and second Comparators are connected to the inputs of the element I.

 

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FIELD: cryptography.

SUBSTANCE: method includes generating random numbers with use of displacement register with check connection, elementary digit of which is a q-based symbol (q=2l, l - binary symbol length) at length of q-based digits register, in check connection networks nonlinear two-parameter operations on q-based symbols F (ub, ud) are used, on basis of random replacement tables, for generating next random number values z1=F(ui, uj), z2=F(ut, um), zg=F(z1, z2) are calculated, where ui, uj, ut, um - values of filling of respective register digits, value of result in check connection networks zg is recorded to g digit of displacement register and is a next result of random numbers generation, after which displacement of register contents for one q-based digit is performed.

EFFECT: higher speed and efficiency.

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