The wireless link with the amplitude-photomanipulating noise-like signals

 

(57) Abstract:

The invention relates to the field of radio and can be used in communication systems operating in an uncertain noise. The aim of the invention is to develop a radio that can improve the throughput of the radio link with AFM PSS in an uncertain noise conditions. The purpose of the invention is achieved due to the fact that the wireless link with AFM PSS additionally introduced a communication channel consisting of a source 2 information, the phase modulator 4 and the modulator 5 signals the four FM and at the reception demodulator 20, a multiplier 22, amplifier 24, the integrator 26, a casting device 28 and the receiver 30 by use of a dual phase manipulation of the reference oscillation information signals while maintaining a pseudorandom amplitude manipulation of the output signal. When implementing the added elements,similarly available in the prototype, the throughput of the radio link is increased by 2 times. Theoretically proposed wireless link has a coding gain in comparison with the previously known radio links using afss and FM PSS from 2.5 to 3 dB, and has a bandwidth SP to be used in communication systems, functioning in an uncertain noise.

Famous radio link using on-off photomanipulation pseudonoise signals (FM PSS) with a constant amplitude to improve noise immunity, (ed.St. USSR N 489254 CL H 04 27/18,1973, N 509194, CL H 04 B 9/00,1974, N 563730,CL H 04 B 7/00,1967, U.S. patent N 3665472,CL H 04 B 1/38,1972). However, due to the impact of the worst interference of unknown structure and limited average power (for example, when the ripple of the power level of interference) immunity of links with FM PSS significantly reduced.

Also known radio link using amplitude photomanipulation signals (afss), with the aim of improving the noise immunity of the introduction of mnogopartiinosti phase and amplitude (UK application N 1356179,CL H 04 27/00,1974, application Germany N 2153376,CL H 04 27/18,1976, Japan's bid N 55-24826, CL H 04 27/00,1976, application Germany N 3322954,CL H 04 27/00,1985, application Germany 3243373, CL H 04 27/00,1985). However, the rules used switching phases and amplitudes do not allow for high noise immunity due to the impact of the worst interference of unknown structure and limited average power.

Of wireless links with afss and FM PSS closest to the stated technical sunoto United source of information, phase modulator, modulator, amplifier, power amplifier and transmitting antenna. The generator carrier frequency, its output connected to a second input of the modulator and connected in series to the synchronization unit, the pseudo-random sequence generator, shift register, n+1-th outputs of which are connected to respective inputs of the storage register, and n outputs of the storage register is connected to n inputs of the decoder, the n outputs of which are connected to corresponding inputs of digital to analog Converter whose output is connected to the second input of the amplifier. The first output of the synchronization unit in addition to the connection to the pseudo-random sequence generator is also connected to a clock input of the shift register, the second output of the synchronization unit is connected to the clock input of storage register, n+1-th output of which is connected to a second input of the phase modulator. At the receiving side of the wireless link, the prototype contains a receiving antenna, which is connected to series-connected mixer, intermediate frequency amplifier, multiplier, amplifier, integrator, a crucial device to input the recipient's information. The output of the integrator is also connected to the input unit with the th input to the mixer. The second output of the synchronization unit is connected to a second input of a casting device, the third output with a clock input of the shift register and the pseudo-random sequence generator and the fourth output of the synchronization unit is connected to a clock input of the storage register. The output of a pseudorandom sequence generator connected to the information input of the shift register, which is n+1-mi outputs connected to corresponding inputs of the storage register, the n outputs of which are connected to n inputs of the decoder, and n+1-th output of the storage register is connected to the second input of the multiplier, n outputs of the decoder are connected respectively with n inputs digital to analogue Converter, the output of which is connected to the control input of the amplifier.

This wireless link is the prototype can improve the noise immunity radio under the influence of interferences with reduced average power. Theoretically, the energy vyigrash in the radio link with the specified quality requirements can achieve 3 dB.

However, the disadvantages of radio link of the prototype are low immunity and insufficient throughput of the radio link in the transmission of information from two sources, in terms of violini prototype is not possible to combine the signals from two sources, with their subsequent transfer to and separate signals at the receiving point.

The aim of the invention is to develop a radio that allows to increase the throughput of the radio link with pseudonoise photomanipulating signals in an uncertain noise conditions.

This goal is achieved by the fact that the radio link with the AMF PSS containing on the transmission side connected in series source of information, a phase modulator, modulator, amplifier, power amplifier and transmitting antenna and the generator carrier frequency, its output connected to a second input of the modulator. And consistently connected to the synchronization unit, the pseudo-random sequence generator, shift register, n+1 outputs of which are connected to respective inputs of the storage register, and n outputs of the storage register is connected to n inputs of the decoder, the n outputs of which are connected to corresponding inputs of digital to analog Converter whose output is connected to the second input of the amplifier. The first output of the synchronization unit in addition to the connection to the pseudo-random sequence generator is also connected to a clock input of the shift register, the second output unit of synchronizator, added: the second source of information, the second phase modulator, the inverter and the modulator is replaced by the modulator signals of the four modulation. The newly introduced second source information and the second phase modulator connected in series. The output of the second phase modulator connected to the second input of the modulator. The control input of the second phase modulator is connected to an inverted output of the inverter, whose input is connected to the n+1-m output storage register, and a direct output of the inverter is connected with the control input of the first phase modulator first input of which is connected to the output of the first source of information. The third input of the modulator is connected to the output of the generator carrier frequency, the output of the modulator is connected to the input of the amplifier, as in the prototype. At the receiving side in the radio link containing the receiving antenna, connected to the mixer, whose output is connected to the intermediate frequency amplifier, the output of which is connected to the input of the multiplier. The output of the multiplier is connected to the input of the amplifier, the output of which is connected to the input of the integrator. The output of the integrator is connected to the input of the synchronization unit and to the input of a casting device. The output of a casting device connected to the input of the Nene with a second input of the mixer. The second output of the synchronization unit connected to the second input of a casting device. The third output of the synchronization unit is connected to a clock input of the shift register and the input of the pseudorandom sequence generator. The fourth output of the synchronization unit is connected to a clock input of the storage register. Moreover, the output of a pseudorandom sequence generator connected to the information input of the shift register, which is n+1-mi outputs connected to corresponding inputs of the storage register, the n outputs of which are connected to n inputs of the decoder, and n+1-th output of the storage register connected to the second input of the multiplier. The decoder its n outputs connected to n inputs of the digital to analogue Converter, the output of which is connected to the control input of the amplifier, added: demodulator, an inverter, a second multiplier, a second amplifier, a second integrator, the second critical device and the second recipient of the information. The newly introduced second multiplier, a second amplifier, a second integrator, the second critical device and the second receiver are connected. The input of the demodulator is connected to the output of the intermediate frequency amplifier, the first output of the demodulator is connected to the PE the cerned multiplier. The control input of the second multiplier is connected to an inverted output of the inverter, whose input is (inverter) connected to the n+1-m output storage register, and a direct output of the inverter is connected to the control input of the first multiplier. The second input of the second amplifier connected to the output of the digital to analogue Converter, and the second input of the first amplifier. The second input of the second casting device connected to the second output of the synchronization unit.

The increase in throughput is due to the fact that the wireless link with AFM PSS introduced additional channel of information transmission through the use of two-phase manipulation of the reference oscillation information signals while maintaining a pseudorandom amplitude manipulation of the output signal. Based on game-theoretic methods in [5,6], it is shown quasioptimality on the minimax criterion amplitude-phase-shift keyed (AFM) signals when exposed to uncertain interference with reduced average power. Theoretically, the energy gain in the radio link with AFM PSS under specified quality requirements can achieve 6 dB. Because continuous pseudo-random change of the amplitude of the FM signal in accordance with the backside of eznim discrete set, including the m values of the amplitudes FM PSS. The value of m is limited by the size of the device formation and processing of AFM PSS and implemented dynamic range of the receiving and transmitting circuits of the radio link. In addition, the accuracy of the numerical representation of the values of the amplitudes and probabilities of their use in practice are nite and can be evaluated to some value

< / BR>
where xi-the desired value of the amplitude or probability;

yi-implemented value.

The use of digital devices for forming AFM SRP involves the representation of data values in the form of n-bit binary numbers, where n is log2nlog2r.

For the formation of a given discrete set of probabilities = {1,2,...,m} the appearance of random events Aiwhere the event Aiis the i-th amplitude FM PSS, you can use a geometric representation of the set in the form of a single segment, with m parcel size m1,2,...,mat the same time . When using a random numbers generator (RNG) with a uniform distribution on the interval [0,1] the result of each random testing will be getting a random number (Sterowania midrange with a uniform probability distribution on the interval [0,1] with the accuracy of a sequence of n equiprobable binary digits, to generate which it is expedient to apply a pseudo-random sequence generator (gpsa). In this case, given the need to generate a random amplitude during a single clock cycle pseudorandom sequence (SRP), clock speed gpsa for the formation of AFM PSS should be increased to n+1 times in comparison with a clock speed of gpsa FM PSS.

In Fig.1 shows a structural diagram of the inventive radio amplitude - photomanipulating PSS; Fig.2 is a structural diagram of the phase modulator of Fig.3 block diagram of the modulator of Fig.4 block diagram of the inverter;

Declare the wireless link with the amplitude photomanipulating signals shown in Fig.1, contains on the transmission side two sources of information 1, 2, two phase modulator 3,4,modulator 5, the amplifier 6, the amplifier 7 power, transmitting antenna 8, the generator 9 of the carrier frequency, the inverter 10, block 11 sync generator 12 pseudo-random sequence (gpsa), the register 13 of the shift register 14 of storage, the decoder 15 and the digital-to-analog Converter 16 (DAC). Information sources 1,2 their outputs connected to first inputs of the phase modulators of 3.4. The output of the first phase modulator 3 is connected Sciez the input of the modulator 5 is connected to the output of the generator 9 of the carrier frequency. The output of the modulator is connected to the input of the amplifier 6, the output of which is connected to the input of the amplifier 7 power, whose output is connected to the transmitting antenna 8. Unit 11 synchronize the first output is connected to the input of gpsa 12 and a clock input of the register 13 of the shift. The output of the gpsa is connected to the information input of the register 13 of the shift, n+1 outputs of which are connected to respective inputs of the register 14 of storage. The clock input of register 14 storage connected to the second output unit 11 synchronization, n+1-th output of the storage register 14 is connected to the input of the inverter 10, and the outlet of which is connected to the second input of the phase modulator 3, and the inverted output to the second input of the phase modulator 4. The remaining n output register 14 storage connected to n inputs of the decoder 15. The decoder its n outputs connected to the respective n inputs of the DAC 16. The DAC output is connected to the control input of the amplifier 6. At the receiving side of the wireless link with AFM PSS contains connected in series receiving antenna 17, the mixer 18, the amplifier 19 of the intermediate frequency demodulator 20. And two, the multiplier 21, 22, two amplifiers 23, 24, two integrator 25, 26, two computing devices 27, 28, two receivers 29, 30. In addition, at the receiving side with SOS the work, register 35 of the shift register 36 storage, the decoder 37 and a digital-to-analog Converter 38. The demodulator its first output is connected to a circuit connected in series between a first multiplier 21, the first amplifier 23, the first integrator 25, the first deciding device 27 and the first receiver 29 information, and the second output of the demodulator is connected to a second circuit connected in series between a second multiplier 22, a second amplifier 24, a second integrator 26, the second deciding unit 28, and the second receiver 30 information. While the second control input of mixer 18 is connected to the output of the local oscillator 31, the inlet of which is connected to the first output unit 33 synchronization, the input connected to the output of the integrator 25. The second output unit 33 synchronization is connected to the second control inputs of the first and second computing devices 27, 28. His third output unit 33 synchronization is connected to the input of gpsa 34 and a clock input of the register 35 shift, the output of the gpsa is connected to the input of the register 35 offset. The shift register n+1-mi outputs connected to respective inputs of the register 36 storage. The clock input of the storage register is connected to the fourth output unit 33 synchronization, and n+1-th output of the register storage is and its inverted output to the second input of the second multiplier 22. The register 36 storage, its n outputs connected to corresponding inputs of the decoder 37, the n outputs of which are connected to n inputs of the DAC 38, the output of which is connected to the control inputs of the amplifiers 23, 24.

Source 1, 2 and the receiver 29, 30 can be used any device that allows you to shape and to process the digital sequence received via the digital interface, for example, through the interface S1-FL-BI (GOST 24174-80, GOST 26532-85). Characteristics of the junction are given in [13,14]

An embodiment of the phase modulator 3 shown in Fig.2, where the input unit 1 3.1 (logical EXCLUSIVE OR element) receives information from the first source of information on input 2 unit 3.1 comes pseudo-random sequence, through the inverter 10 and through the n+1-th output of the register 14 of storage. Output 3 unit 3.1 is connected to 1 and 2 inputs of the block 3.2(a logical element AND-NOT). Inverted output 3 3.2 block connected to the first input of the modulator 5. Similarly implemented phase modulator 4. Both the phase modulator 3 and 4 can be performed on an Assembly of logic elements on one chip, for example blocks 3.1, 4.1 on-chip CLP, 3.2, 4.2 K155LAZ.

The option of constructing modulator 5 four-FM representation is OR NOT) and the first input unit 5.2 (0-180 phase modulatoro). Inverted output of block 5.1 is connected to a second input of block 5.2. The third entrance 5.2 is connected to the output of the generator 9 of the carrier frequency (GNC). The output of block 5.2 is connected to the input of 5.3 (Phaser 90o), the output of which is connected to the first input unit 5.4 (adder). The output of the phase modulator 4 is connected with the first and second inputs of the block 5.5 (OR NOT) and the second input unit 5.6. The second input of the adder 5.4 connected to the output 5.6 (0-180 phase modulatoro). The first input unit 5.6 is connected to the inverse output unit 5.5. The third input unit 5.6 is connected to the output GNC 9. As the element OR NOT 5.1 and 5.5 can be used, for example, logic elements,proposed in [3, Fig. 1.27(b), S. 40-50] as the phase modulator 5.2 and 5.6, you can use the device shown in Fig.2; as the phase shifter 90o5.3 can be used part of the line (coaxial cable or waveguide) with a length that provides a phase delay of the signal on the 90oin the adder can be used logical EXCLUSIVE OR element [3, Fig. 1.34(a), S. 56]

As a demodulator 20 may be used in the demodulator signal four-FM, described in [7, Fig. 11.12,S. 280] However, as the outputs of the demodulator neobhodimosti weekend agreed filters and detectors characters (SF, DS).

As the inverter 10, 32 you can use the device shown in Fig. 4. Unit 10.1 is a logical element AND-NOT and can be performed on the chip corresponding series.

As amplifiers 6,23,24 in Fig.1 are typical differential wideband amplifiers, for example [2, Fig. 2.2 (d),C. 26-40] as a multiplier products 21, 22 in Fig. 1 can be used multiplier products, for example, described in [4, Fig. 4,S. 203]

As a casting device 27, 28 in Fig.1 you can use the integrated comparator described in [1, C. 363-371] for example, a scheme based on the AIS comparator [1, Fig. of 11.15,S. 369]

The mixer 18 in Fig. 1 can be used, for example, analog multiplier described in [11, S. 151-159] block diagram is presented in [11, Fig. 5.12,S. 153]

As an integrator 25, 26 in Fig.1 can be used, for example, proportionally integrating the filter presented in [11, Fig. 6.6 (d), S. 191]

As the intermediate frequency amplifier 19 and the local oscillator 31 in Fig.1 you can use an amplifier circuit,presented for example in [2, Fig. 2.2 (g) and Fig. 2.2 (C), S. 27, respectively

As the power amplifier 7 in Fig.1 can be ispolzuemogo device can be used, for example, the generator circuit included in the series C, 219, 224, 237, 245, and PS, HA, CUV.

Options block 11,33 synchronization in Fig.1 is described, for example, in [8,S. 266 328] with varying degrees of detail depending on the illustrated book features search and synchronization PSS. In application, the invention provides a simplified depiction of the synchronization unit 11,33. The third output synchronizes the gpsa added in connection with the replacement of the matched filter at the correlator, which is logical for all schemes receivers PSS with correlators (e.g., [8] Fig. 1.9,S. 18; Fig. 15.3, S. 269; Fig. 17.1,S. 297). Moreover, as can be seen from Fig. 1.12,S. 20, and Fig. 2.5 C. 26 [8] Pets simplified image correlator without specifying circuits reset the integrator. The fourth output of the synchronizer added for a more detailed view of changes in the scheme of the radio receiver, requires synchronization unit only one additional functions: dividing the repetition rate of clock pulses received at the input gpsa 34 and the register 35 offset) n+1, where n is the bit width binary representation of the probability of selection of different amplitudes AFM PSS, and supply these pulses to the input of register 36 storage.


The embodiments registers 13,35 shift is given in [1, 208-210 C., for example, Fig. 5.4 ()]

The embodiments of the registers 14, 36 storage found in [1, 208-210 C., for example, Fig. 5.4 (a)]

The option of constructing the applied decoders 15, 37 in Fig.1 is described in [2, C. 119-135] and can be implemented on an elemental basis, depending on the desired number of digits (n), for example according to [2, Fig. 3.17 (b),S. 133]

The option of constructing digital-to-analog converters 16, 38 in Fig.1 is described in [2, C. 185-193] and can be performed according to the scheme of the digital-to-analog Converter presented in [2, Fig. 6.10,S. 193] depending on the desired number of bits (n).

The device operates as follows. In the transmitting part from the source 1, (2) a sequence of binary symbols 1 and 0 with rate R= 1/T (T is the duration of information packages) is fed to the input of the phase modulator 3, (4). From the generator 12 pseudo-random sequence, with n+1-th output of the register 14 storage through the inverter 10 to the second input of the phase modulator 3, (4) receives the binary signal duration where N is the number of pulses. The repetition period of the pulses at the output gpsa 12 is equal to (n is an integer). Signaling pulse output gpsa 12 are recorded in the register 13 of the shift, and then the signals from the second output unit 11 synchronization, the following frequency-in the case 14 of storage. From the first output register 14 storing n bits of binary random numbers and arrive at the n inputs of the decoder 15. On the n outputs of the decoder 15, you receive the n-bit binary number equal to the value of one of the m pseudo-random amplitudes, the corresponding number of the plot, which gets a random number of a/2n. Digital-to-analog Converter 16 converts the input binary combination in an analog signal corresponding to one of the m pseudo-random amplitudes. Output DAC 16, the signal at the control input of the amplifier 6. Unit 11 synchronization generates two pulse trains with frequencies f and (n+1)f. The PSS sequence, transferring information symbols, is supplied to the first and second inputs of the modulator 5, which is the phase modulation of the carrier wave received at the third input of the modulator 5 from the generator 9 of the carrier frequency. Photomanipulating pseudonoise signal output from the modulator to the input of the amplifier 6, the gain of which varies depending on the signal level at the control input. From the output of the amplifier 6 AFM PSS is fed to the input space.

In the receiving part of the radio signal, adopted by the receiving antenna 17, passes through the mixer 18 is transferred through 31 to an intermediate frequency and amplified in the amplifier 19 intermediate frequency (if amplifier). Output amplifier 19, the signal fed to the demodulator 20, where it is split into two sequences PSS, which come in two branches of transformations. From the output of the demodulator 20, the signal at the first input of the multiplier 21, (22), to the second input of which the reference signal from gpsa 34 through n+1-th output of the register 36 storage and inverter 32. The result of the multiplication of the input and reference signals supplied to the first input of the amplifier 23, (24), the gain of which depends on the level of the signal received at the control input of the amplifier 23,(24) from the output of the DAC 38. The formation of the signal at the DAC output 38 through the block 33 synchronization, gpsa 34, the register 35 of the shift register 36 storage, decoder 37 similar to the formation of the output signal of the DAC 16. From the output of the amplifier 23,(24) the signal at the input of the integrator 25,(26) and then to the block 33 synchronization and decisive 27,(28) device. Block 33 synchronization generates two pulse trains with frequencies f and (n+1)f, controlled slave is the frequency of the block 33 synchronization rebuilds the local oscillator 31. After finding and entering into synchronism at the outlet of a casting 27,(28) block of an information sequence in the form of binary characters, which is passed to the receiver 29,(30) information.

When implementing the added elements, similarly available in the prototype, the throughput of the radio link is increased by 2 times. This may reduce the noise immunity of receiving digital signals. To estimate the loss of noise immunity can use Fig.2.9 [9] where it is easy to establish that the loss in noise immunity of the proposed radio compared to the prototype is not more than 0.5 dB for the given requirements on the probability of error per bit.

However, the proposed wireless link as the prototype has a coding gain in comparison with the previously known radio links using afss and FM PSS from 2.5 to 3 dB, and has a capacity of 2 times higher than that of the prototype.

Sources of information:

1. Alekseenko, A., Sagarin And. And. Microcircuitry. M. Chapman and hall, 1982,S. 414.

2. Batashev Century A. Circuits and their application. M. Chapman and hall, 1983.with. 217.

3. Shyla Century Popular HP digital chip. M Radio and communications, who's algorithms of generating and receiving signals. -Problems of information transmission, 1986, I. XXII, vol.4,S. 49 54.

6. Chudnov A. M. the correlation Immunity of a reception pseudo-random signals, modulated in amplitude and phase //radio engineering and electronics, 1987,I. XXXII, No. 1,S. 62-68.

7. J. Spilker. Digital satellite communications. M. Link, 1979,592 C.

8. Varakin L. E. communication Systems with noise-like signals. M Radio and communication, 1985,384 C.

9. Banquet Century A. Dorofeev C. M. Digital techniques in satellite communications. M. Chapman and hall,1988,213 S.

10 U. Titze, K. Schenk. Semiconductor circuitry: a reference guide. M World, 1982,512 C.

11. A receiving device, Ed. L., Barulin. M. Chapman and hall, 1984. 272 C.

12. Kaganov Century. And. microwave semiconductor transmitters. M. Chapman and hall, 1981, 400 S.

13. Macaw A. A. szczerba Century, the Interfaces of the data processing systems. M. Chapman and hall, 1989, 416 S.

14 Powders O. N. Digital interface based on the relative iimpulse signal. Telecommunications, 1989, N12, 10 C. 15.

The wireless link with the amplitude-photomanipulating noise-like signals with the transmitting first information source, the output of which is connected to the information input of the first phase modulator, modulenode, loaded to the transmitting antenna, the oscillator carrier frequency, the output of which is connected with the control input of the modulator and connected in series to the synchronization unit, the pseudo-random sequence generator, shift register, n + 1 (n 2, 3) outputs of which are connected to the corresponding inputs of the storage register, and n outputs of the storage register with n inputs of the decoder, the n outputs of which are connected to corresponding inputs of digital to analog Converter, the output of which is connected with the control input of the amplifier, in addition, the first output of the synchronization unit is connected to the clock input of the shift register, the second output of the synchronization unit is connected to a clock input of the storage register, and at the receiving point, mixer, and high-frequency heterodyne input of which is connected respectively receiving antenna and the output of the local oscillator and the mixer output is connected to the input of the amplifier intermediate frequency and connected in series on the information inputs of the first multiplier, the first amplifier of the first integrator, the first critical device and the first receiver, and the output of the first integrator is also connected to the input of the synchronization unit, the first, second, third and fourth of the disorder, clock input of the shift register and the clock input of the storage register, and a third output of the synchronization unit is connected to the input of the pseudo-random sequence generator, and its output is connected to the information input of the shift register, which is n + 1 outputs connected to corresponding inputs of the storage register, the n outputs of which are connected to the respective n inputs of the decoder, the n outputs of which are connected to n inputs of the digital to analogue Converter, the output of which is connected to the control input of the first amplifier, wherein in the sending item is entered inverter, a second information source, the output of which is connected to the information input of the second phase modulator, the output of which is connected to the second information input of the modulator, and the control input of the second phase modulator is connected to an inverted output of the inverter, and the control input of the first phase modulator with direct output of the inverter, whose input is connected to the n + 1-m output storage register, with the first information input of the modulator is connected to the output of the first phase modulator, and at the receiving point entered the demodulator, the inverter and connected in series on information input the information input of the second multiplier connected to the second output of the demodulator, control inputs of the second and first multiplier products connected respectively to the inverse and the direct outputs of the inverter, whose input is connected to the n + 1-m output storage register, a second control input of the second amplifier connected to the output of the digital to analogue Converter, and the control input of the second casting device connected to the second output of the synchronization unit, and the input of the demodulator is connected to the output of the intermediate frequency amplifier and the first output of the demodulator is connected to the information input of the first multiplier, and the modulator and demodulator in the form of modulator and demodulator signal four-phase modulation.

 

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34 cl, 6 dwg

FIELD: physics.

SUBSTANCE: method of relaxed solution for demodulating a received signal α+iβ with quadrature amplitude modulation (QAM) involves deriving several values of a conditional probability vector, where each is a relaxed solution value which corresponds to the position of a stiff solution bit, using a function which includes an operation for conditional definition from the quadrature phase component and inphase component of the received signal. The method of solving for the conditional probability vector for demodulation of the first half of the complete number of bits is identical to the solution method for demodulating the remaining half of bits, and is determined by replacing the value of the quadrature phase component and the value of the inphase component with each other.

EFFECT: more accurate processing a received signal.

29 cl, 15 dwg

FIELD: information technologies.

SUBSTANCE: method is realised using the following facilities, where a DVB-T modulator comprises serially joined units, an interface, a randomiser, a Reed-Solomon encoder, a convolution interleaver, a convolution coder, a bit interleaver, a symbol interleaver, a QAM shaper, a calculator of reverse quick Fourier transform (RQFT calculator), a digital to analogue converter (DAC), a high-frequency unit (HF unit) and a shaper of pilot signals at the inlet of the QAM shaper, and also the following units are additionally introduced: a unit of packets breakdown, receiving information from the interface and sending it to the randomiser and a control unit, a register receiving signals from the randomiser and sending a signal to the Reed-Solomon coder and the convolution interleaver, the control unit receiving information from the unit of packets breakdown, and outlets are connected to all modulator units.

EFFECT: reduced requirements to a computing device due to optimisation of processes of synchronising operation of all units in whole, using less efficient computing devices.

1 dwg

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