Vector generator

 

(57) Abstract:

The invention relates to computing, and in particular to processing or image formation, in particular the proposed vector generator can be used to generate test images. The aim of the invention is to develop a vector generator that allows you to extend the class generated random realizations. The aim is achieved in that in the known vector generator comprising a generator of noise and digital filters connected to the first input of the adder, inputs of n multiplexers 4, the random number generator 6, n blocks of serial adders 3, the control unit 7 and the device of visual output 5. Thus the outputs of the noise generator 1 is connected to n blocks of digital filters 2, the outputs of the latter are connected with the inputs of the n blocks of the serial adders 3. The outputs of the n blocks of the serial adders 3 is connected to the n multiplexers 4, the outputs of the latter are connected with the device of visual output 5. The operation of the vector generator is provided from the control unit 7 by the operator. Each digital filter 2-1 from a block of digital filters 2, on each successive adder 3-1 of the block members is moreover, in the control unit 7 has two control pairs, consisting of a register 7-1 and 7-2 encoder to control the operation of the noise generator 1 and the random number generator 6. For synchronous operation of the device generally uses a master oscillator 7-3 in the control unit 7. The outputs of the master oscillator 7-3 associated with all registers 7-1 control unit 7, with blocks of serial adders 3, with the random number generator 6. 1 C.p. f-crystals, 7 Il.

The invention relates to computing, and in particular to processing or image formation and, in particular, the proposed vector generator can be used to generate test images.

There is a method of generating vector signals (see, for example, application Japan N 60-73788, CL G 06 F 5/62, publ. 1987). A device that implements a method of generating a vector signal contains connected in series random number generator, the adder, the buffer memory. In addition, the random number generator are mutually connected to one buffer memory.

However, the specified device is capable of generating narrow class of vector signals defined constant line width that is gatorage connected to the input block vector processing, the output of which is connected to the buffer memory [1]

The disadvantage of this vector generator is the low accuracy of the synthesis vector signal, through the use of overlay codes.

Closest to the present invention is a vector generator [2] contains a noise generator, an adder, a delay element for one clock cycle, multiplier. Thus the output of the noise generator connected to the first input of the adder, the output of which is connected to the delay elements in one clock cycle, the output of which is connected to the multiplier, and the output of the latter is connected with the second input of the adder.

This device is suitable for fitting many encountered in practice, deterministic and stochastic processes with discrete time.

The disadvantage of the prototype is limited to the static properties of the formed image which is determined only by the class of Gaussian probability densities and correlation functions, which is explained by the linearity of the selected model generating filter and Gaussian nature of the generating noise.

The aim of the invention is to develop a vector generator that allows you to extend the class generated random implementations.

The control unit contains two groups of ns in each of the registers and encoders, two additional register and encoder and master oscillator. The outputs of each encoder is connected to the input of the corresponding register. The outputs of the first group of ns registers are a group of outputs of the control unit, the outputs of the second group of ns registers are the second group of outputs of the control unit. The outputs of the first and second registers are respectively the first and the third additional outputs of the control unit. The first and second outputs of the oscillator are respectively the second and fourth additional outputs of the control unit, and a third output of the master oscillator is connected in parallel to additional inputs of each register.

Thanks to a new combination of existing signs and, in particular, with the introduction of the n multiplexers, random number generator, n blocks of serial adders, a control unit and device of visual output and the relationships between them, as shown in Fig.1, with the control vector generator, which is controlled from a control unit, and is expanding class generated random implementations.

Vector generator (Fig.1) contains the noise generator 1, n blocks of digital filters 2, n blocks of serial adders 3, n multiplexers 4, the device of visual output 5, the random number generator 6, the control unit 7; i-I (i=1,2,n) the group of outputs of the noise generator 1 s (s1) outputs in each group are connected to the corresponding first s-inputs of the i-th unit of the digital filter 2, to the second s-input of which is connected to the corresponding s-outputs of the i-th group of the first output control unit 7; s-outputs of the i-th group of the second outputs of the control unit 7 are connected with the corresponding first s inputs of the i-th block of the serial adders 3, 's second input of which is connected to the corresponding s outputs of the i-th block of digital filters 2; s-outputs of the i-th block of the serial adders 3 are associated with the corresponding s-inputs of the first multiplexer 4, the n outputs of the multiplexer 4 is connected to the respective n inputs of the device of visual output 5. The first (a) second (b) third (C) additional outputs of the block at the tea numbers 6, and the fourth auxiliary output (d) of the control unit 7 connected in parallel with the additional inputs of each block of the serial adders 3; i-s blocks of digital filters 2 and serial adders 3 contain, respectively, s narrowband digital filters 2-1 and s serial adders 3-1.

The control unit 7 can be implemented according to the scheme shown in Fig. 2, and includes 2 groups of ns registers 7-1 in each, 2 groups of ns encoders 7-2 in each, in addition, the control unit 7 has an additional 2 register 7-1 and 2 encoder 7-2 oscillator 7-3 and the switch block 7-4. Thus the output of master oscillator 7-3 connected in parallel to the inputs of all the registers 7-1. To the other three inputs of each register 7-1 connected to the corresponding three output of each encoder 7-2. The control voltage through the switch block 7-4 are fed to the inputs of all encoders 7-2.

The scheme of connection of each of the registers 7-1 and encoders 7-2 structurally shown in Fig. 3. In addition, in Fig.3 also shows the master oscillator 7-3 and the switch block 7-4. Thus the outputs of each of the encoders 7-2 is connected to the inputs of each register 7-1 D0, D1, D2, respectively. The output of the master oscillator 7-3 data inputs of each encoder 7-2.

Block digital filter 2 can be implemented according to the scheme shown in Fig.4. Each unit of the digital filter 2 consists of s digital filters 2-1, and each of s digital filters 2-1 includes a delay element (register), multiplying device and the adder (Fig.5). In Fig. 5 shows that the input signal (from block 1) and the output of multiplier devices are connected to the inputs of the adder, the output of which removed the timing of the output signal (block 3). The output of the adder connected to the input of the delay element, the output is connected to the first input of a multiplier unit and the second input is the last input control voltage from block 7.

Unit serial adders 3 can be implemented according to the scheme shown in Fig. 6, and includes s-serial adders 3-1. Each successive adder 3-1 consists of adder 3.1.1. trigger 3.1.2. (Fig. 7). The yield of Cnadder is connected with the D input T (trigger), the Q output of the trigger associated with Cn+1the adder. The output of the adder S is the output amount.

The control unit 7 can be made on the basis of the known elements, so register 7-1 can be performed on the serial chip-TO-155 ER (Shyla C. L. Popular digital circuits is adresine parallel downloads are not used. Encoder 7-2 can be performed on the serial chip KM 555 YVES 1 (ibid, Fig. 1.100, S. 138). At enable input voltage ban is not served, in addition, two additional outputs (group signal) and (permission from the output) not used. The address inputs voltage low level switch control unit, which can use any serial switches ( e.g. MT-1). The master oscillator 7-3 can be built on any of inverting elements, such as described in the book Potemkin, I. C. Functional units of digital automation. Moscow: Energoatomizdat, 1988, Fig. 7.9(a), S. 240. Thus the output of master oscillator 7-3 in parallel connected to the blocks 1, 3, 6 and encoders 7-1.

Each digital filter 2-1 from a block of digital filters 2 can be made on the basis of serial delay elements, duplicating devices and adder according to well-known schemes, such as described in the book Goldenberg L. M. Matyushkin B. D. Polyak M. The Handbook. M. Chapman and hall, 1985, Fig. 2.2, S. 48-49.

Each serial adder block of serial adders can be performed on a repetitive elements known schemes Shyla Century Popular HP digital chip. Celebi the summand B, the sum of the amounts not used. Serial inputs 1 shown in Fig. 1.114 the above books are used as the inputs from blocks 2 and 7 in the proposed device.

Each multiplexer 4 may be made on the basis of serial circuits. For example, in the book Shiloh Century Popular HP digital chip. Chelyabinsk: metallurgy, 1989, Fig. 1.102, including 140-141 shows the multiplexer on the chip TO 155 KP1, while at the enable input E high voltage level is not served and the address inputs S0, S1, S2, S3 superalliance.

As the device of visual output 5 you can use the PC monitor.

The random number generator 6 may be made under the scheme (ed. St. USSR N 1345191, CL G 06 7/58, publ. 15.10.78). Thus the inputs 9, 10 and 11 outputs1.11kshown in the diagram describing this invention, are respectively K, M inputs and outputs of the random number generator 6 in the proposed device (Fig.1).

The noise generator 1 can be made on the basis of serial chip (for example, on the chip TO 155 LAZ).

Vector generator works as follows. The noise generator 1 selects the noise where n is the dimension of the field of values of a random noise, Sn-number of outputs of the signal is that is provided from the control unit 7 signals , unlike the prototype, where the signal from the noise generator is fed to the first input of the adder. Due to the fact that each s digital filter consists of a delay element, a multiplier unit and an adder, the output of the adder connected to the input of the delay element, the output of which appear detained on the sampling interval timing, and a variable multiplier multiplier device provides the operator with control unit 7, due to randomization (under the randomization refers to the random nature of choice of many alternatives according to some set of discrete probability distribution) of the generated random field at the output of each s digital filters 2-1 produces signals that are computed for each i-component, j-components as follows:

< / BR>
where v is the number of coordinates of the field;

i component values of the field;

j a randomized component of the mixture;

Kv-Kthcount v-coordinates of the vector random field.

The signals from the outputs of digital filters 2 are received at the first inputs of the serial adders 3. For the extension of the generated random realizations of the proposed is of Materov 3 using signals of trend shifts (at trend offset refers to the offset amount of metal out process) from the control unit 7. Thus, the second input of the serial adders 3 receives signals of trend shifts from the control unit 7. In addition, from the master oscillator 7-3 control unit 7 to each of the serial adders 3-1 input C trigger 3.1.2. the signal clock rate for synchronous operation of the serial adders.

Additionally, for the extension of the generated random realizations of the proposed device, the control of the control unit 7 by a random number generator 6, and he, in turn, controls the operation of multiplexer 4. Outputs of the serial adders 3, signals are sent to corresponding multiplexers 4, are managed by using a random number generator 6 signals using the signals received from the random number generator 6, each multiplexer 4 selects from all the input s of sequences coming from the serial adders 3, only one (defines the operator using the unit 7-4 control unit 7)nsequence.

From outputs of respective multiplexers signalsnreceived by the device of visual output 5.

what I am 7. The outputs of the master oscillator 7-3 associated with all registers 7-1 power supply unit 7, with blocks of serial adders 3, with the random number generator 6.

Each digital filter 2-1 from a block of digital filters 2, on each successive adder 3-1 from a block of consecutive adders 3 in the control unit 7 has a control pair, consisting of a register 7-1 and 7-2 encoder. In addition, the control unit 7 has two control pairs, consisting of a register 7-1 and 7-2 encoder to control the operation of the noise generator 1 and the random number generator 6.

The operation of the vector generator in General, provides the operator with a switch block 7-4 control unit 7.

Thus, a vector random field (image) with an arbitrary set from outside (from control unit), static characteristics, allowing to extend the class generated random implementations.

Elements of the proposed device are typical and can be technically implemented in real time using existing components.

1. Vector generator comprising a generator of noise and digital filters connected to p is s numbers n consecutive blocks adders, the control unit and the device of visual output, i-I (i 1, 2, n) the group of outputs of the noise generator on s (s 1) outputs in each group are connected to the corresponding first s-inputs of the i-th block of digital filters, second s-input of which is connected the corresponding s outputs of the i-th group of the first output control unit, and s outputs of the i-th group of the second outputs of the latter are connected with the corresponding first s-inputs of the i-th block of the serial adders, the second s input of which is connected to the corresponding s-outputs of the i-th block of digital filters, s outputs the i-th block of the serial adders are connected to the corresponding s-inputs of the first multiplexer, the n outputs of the multiplexers are connected to the corresponding n-input device, a visual output, the first, second and third outputs of the control unit connected respectively to the input of the noise generator, the first and second inputs of the random number generator, and the fourth auxiliary output control unit connected in parallel with the additional inputs of each block of the serial adders, moreover, the i-th blocks of digital filters and serial adders contain, respectively, s narrowband digital filterit two groups of n's in each of the registers and encoders, two additional register and encoder and master oscillator, the outputs of each encoder is connected to the input of the corresponding register, the outputs of the first group of n s registers are the first group of outputs of the control unit, the outputs of the second group of n s registers are the second group of outputs of the control unit, the outputs of the first and second registers are respectively the first and the third additional outputs of the control unit, and first and second outputs of the oscillator are respectively the second and fourth additional outputs of the control unit, and a third output of the master oscillator is connected in parallel to additional inputs of each register.

 

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FIELD: technology for processing and producing images, in particular, device can be used for forming random vector field with given statistical characteristics of synthesized realization.

SUBSTANCE: known vector generator, having noise generator, digital filters, connected to first input of adder, multiplexers, random numbers generator, n blocks of serial adders, control block, device for visual output, additionally has analysis block. Outputs of analysis block are connected to inputs of control block. Outputs of noise generator are connected to n blocks of digital filters, outputs of the latter are connected to inputs of n blocks of serial adders. Outputs of n blocks of serial adders are connected to n multiplexers, outputs of the latter are connected to device for visual output.

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SUBSTANCE: three-dimensional map is displayed on screen, and text data are displayed with varying density levels in accordance to distances from observation point of displayed three-dimensional map to assemblies, where text data are going to be displayed. Further, it is possible to display text data with use of local adjustment of density of text data on screen.

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FIELD: technologies of data processing in microprocessor systems, in particular, generation of visual data displays in automated expert systems, possible use in systems for visual analysis and prediction of variable multi-parameter states of systems or processes, including individual conditions of certain person.

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8 cl, 2 dwg

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FIELD: systems and methods for editing an image.

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FIELD: computer engineering.

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