Device for transmitting and receiving information using a linear-frequency-modulated signals in multipath propagation

 

(57) Abstract:

Usage: in electronics, namely radio systems for the transmission of discrete information. The inventive device includes a transmitting-side element is NOT 1, items 2, 3, two pulse shaper 4, 5, two forming the chirp filter 6, 7, the adder 8, the transmitter 9, at the receiving side of the receiver 10, the two agreed, the chirp filter 11, 12, the adder 16, a clock synchronizer 21, the first comparator 25. To improve noise immunity when multipath propagation is introduced at the transmitting side: a code Converter 29, the generator meander 28, the multiplier 30, and at the receiving side the first, second multiplier products 13, 15, the first, second delay lines 14, 17, first, second low pass filters 18, 19, the first, second keys 20, 22, first, second integrators 23, 24, the second comparator 26, the multiplexer 27. 1 C.p. f-crystals 2 Il.

The invention relates to electrical engineering and can be used in radio systems for the transmission of discrete information.

It is known device [1] contains at the sending end source discrete messages, the trigger, the decoder, the first and second pulse generators, the first, second thesis is the multiplier, the radio, clock, analog source messages, the unit sample and hold, analog multiplexer, a frequency modulator, the oscillator, the second multiplier, the first and second frequency dividers, and at the receiving side chronister, the deciding unit, the recipient of discrete messages, the first, second and third multiplier products, the unit of sampling and storage, bandpass filter, a pseudorandom sequence generator, decoder, driver pulses, a radio, a clock, a low-pass filter, the first and the second dispersive delay line, the first and second envelope detectors, the first and second keys, generator meander, block search, fotoemulsii demodulator, the adder, the receiver analog messages.

However, this device has poor immunity due to the presence on the transmission side additional frequency modulation, which causes a mismatch in frequency in foster agreed filters and hence energy loss.

The closest in technical essence and the problem at hand is the device [2] priyate for the prototype.

However, this device does not provide sufficient robustness with multipath propagation, as the decision on the transmitted symbol being at one of the correlation spike during the period of the parcel, i.e. there is no accumulation mode power signal, which includes the energy of the reflected rays.

The purpose of the invention increased robustness with multipath propagation.

In Fig. 1 shows a structural diagram of the inventive device

The proposed device has on the transmission side: the element is NOT 1, the first element 2, the second element And 3, the first pulse shaper 4, a second pulse shaper 5, the first forming the chirp filter 6, the second forming the chirp filter 7, the adder 8, the transmitter 9, the generator meander 28, code Converter 29, a multiplier 30, at the receiving side: the receiver 10, the first coherent chirp filter 11, a second coherent chirp filter 12, the first multiplier 13, the first delay line 14, a second multiplier 15, an adder 16, the second lyst 21, the second key 22, the first integrator 23, the second integrator 24, the first comparator 25, the second comparator 26, the multiplexer 27.

In Fig. 2 shows the structural diagram of the clock synchronizer (TC) 21, which contains recirculator 31, the first low pass filter 32, the first comparator 33, a divide-by-two 34 key 35, a second low pass filter (LPF) 36, a second comparator 37, the differentiator 38, the PLL block 39, the pulse shaper (PHI) 40, and the controller 31, the first low-pass filter 32, the first comparator 35 are connected in series, sequentially connected by the key 35, the second low-pass filter 36, a second comparator 37, the differentiator 38, block PLL 39, LPF 30, at the entrance of the recirculator 31 is input TC 21, and the output of the recirculator 31 connected simultaneously to the input of divide-by-two 34 and the input key 35, the other input of which is connected to the output of the first comparator 33, the other input of which is connected to the output of the divide-by-two 34, and the output of the first comparator 33 is the first output of the vehicle 21, the output PHI 40 is a second output TC 21, and the output unit FAN 39 is the third release of TC 21.

The inventive device for transmitting and receiving information works as follows.

At the first input element And 2, combined with the entrance of elemenata 28, the first form, the chirp filter 6 generates a signal with decreasing chirp, and when the logical "zero", the current generator output meander 28, the second forming the chirp filter 7 generates a signal with increasing chirp. The signals from the output of the first 6 and second 7 forming the chirp filters are summed in the adder 8, and is converted into a continuous sequence of chirp signals.

An information signal from a source of discrete message is received at the input of the code Converter 29, which is an information input device, to another input, which is the clock input of the receive clock, the chirp pulse.

Code Converter 29 converts the direct source code discrete messages in the relative. The generated signal with relative encoding is fed to the input of the first multiplier 30. To another input of the first multiplier 30 is fed a continuous sequence of chirp signals. As a result, the output of the first multiplier 30 are formed in the sequence of chirp signals, manipulated in phase in accordance with the symbols of the transmitted message.

At the receiving side is demodulated transmitted signal with increasing chirp. The signals from the outputs of the first 11 and second 12 agreed chirp filters are the inputs of the autocorrelation of demodulator signals with a relative phase shift keying. A demodulator connected to the output of the first matched filter 11, contains the second multiplier 13, the first delay line 14, the first low-pass filter 18. A demodulator connected to the output of the second coherent chirp filter 12 includes a third multiplier 15, a second delay line 17 and the second low-pass filter 19. The signals from the outputs of the first 18 and second 19 low-pass filters are received at the respective inputs of the adder 16, the output of which the signal arrives at the clock input of the synchronizer 21, which controls the moments include the first and second integrator 23, 24 in the accumulation mode, and determines when to reset these integrators, i.e., the time savings of primary energy and the detained rays. The signals from the outputs of the memory devices of the first and second integrators 23, 24, if they exceed the threshold, respectively, the first and second Comparators 25, 26, proceed to corresponding inputs of a multiplexer 27, the output of which is formed restored the original transmitted discrete message.

Clock synchronizer 21 remotetype to the input of the recirculator 31. Recirculator 31 performs the accumulation of the correlation bursts of the primary and reflected rays. The first low-pass filter 32 performs smoothing of the sequence of waltzes. This signal is then fed to the input of the first comparator 33. The same signal through a divide-by-two 34 is supplied to another input of the first comparator 33, defining a threshold level signal of the first comparator 33. In this case, the first comparator 33 produces pulses during the time when the signal level exceeds twice its average value. The pulses from the output of the first comparator 33 at the bottom of the key 35 and the output signal from the recirculator 31 passes to the input of the second low-pass filter 36, which also carries out the averaging sequence of pulses generated at the output of the key 35. The output signal of the first comparator 33, which is the first output 21 of the clock synchronizer causes the first and second keys 20, 22 of the device, including first and second integrators 23, 24 of the device in the accumulation mode.

The output signal of the second low-pass filter 36 is fed to the input duplex of the second comparator 37, the sign at the output of which gives the value of the received information symbol. The signal is then fed to the input of the differentiator 38, which allocates points changes polemos the Yu, under which adjusts the PLL block 39. The output signal from the PLL block 39, which is the third exit 21 clock synchronizer, at the end of each parcel drains of the first and second integrators 23, 24 of the device. From the same signal driver 40 generates pulses supplied to the second input of the multiplexer 27.

It should be noted that the accumulation of energy in the first and second integrators 23, 24 of the device is not all the time the parcel, but only during the time when the output signal from the recirculator 31 two-fold higher than its average level. This allows decoherence to put in these integrators energy of several powerful enough rays backward from each other in time by not more than a value approximately equal to 2/3 the length of the parcel.

1. Device for transmitting and receiving information using a linear frequency modulated (chirp) signals in multipath propagation, containing on the transmission side connected in series to the first element And the first pulse shaper, the first forming the chirp filter, connected in series, a second element And a second pulse shaper, the second forming the chirp filter,also the transmitter, the first input of the first element And is connected to the input element, the output of which is connected to the first input of the second element And a second input connected to the second input of the first element And is clocked by the input device on the receiving side of the receiver, the output of which is connected to the inputs of the first and second agreed, the chirp filter, the adder, the output of which is connected to the clock input of the synchronizer and the first comparator, characterized in that on the transmission side entered generator meander, code Converter, a multiplier, moreover, the oscillator output waveform is connected to the first input of the first element And the clock inputs of the generator waveform and the code Converter is clocked by the input device, information input which is the input of the code Converter, the output of which is connected to one input of the multiplier, the other input of which is connected to the output of the adder, the output of the multiplier is connected to the input of the transmitter, at the receiver side entered sequentially connected to the first multiplier, the first lowpass filter, the first key and the first integrator, connected in series, a second multiplier, a second lowpass filter, the second key, second oglasavanja the chirp filter connected to the first input of the first multiplier and the second input of the delay line, the output of the second coherent chirp filter connected to the first input of the second multiplier and the input of the first delay line, the output of which is connected to the second input of the first multiplier, the output of the second delay line connected to the second input of the second multiplier, the outputs of the first and second low-pass filters are connected to respective inputs of the adder, the first output clock synchronizer is connected to the control inputs of the first and second keys, the second output clock synchronizer connected to the second input of the multiplexer, and the third output clock synchronizer is connected to the second inputs of the first and second integrators, and third multiplexer input connected to the output of the first comparator, the inlet of which is connected to the output of the first integrator and the output of the multiplexer is the output device.

2. The device according to p. 1, wherein the clock synchronizer contains connected in series recirculator, the first lowpass filter and the first comparator, connected in series key, the second lowpass filter, a second comparator, differentiator, the unit phase-locked loop frequency and the pulse shaper, and the input recirculate is, the other input of which is connected to the output of the first comparator, the other input of which is connected to the output of the divider by two, the output of the first comparator is the first output clock synchronizer, the output of the pulse shaper is the second output clock synchronizer, a third output which is the output of a phase-locked loop.

 

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