# A device for converting rectangular coordinates to polar

(57) Abstract:

The invention relates to information-measuring technique and can be used in navigation systems. The purpose of the invention is the expansion of the dynamic range. This goal is achieved by the fact that the approximation is carried out after the preliminary analysis of the angle. The device has an amplitude selector, two adder, managed adder unit and a controlled voltage divider. 2 C.p. f-crystals, 3 ill. The invention relates to information-measuring technique and is designed to convert rectangular coordinates to polar, in particular, it can find application in various navigation systems, as well besfiltrovye the spectrum analyzer for converting the sine and cosine components of the spectrum of the signal in amplitude and phase spectra, when you work in a large dynamic range with high performance.A device converting rectangular coordinates to polar [1] contains two unit connected to the first inputs with a source of rectangular coordinates and the second inputs to the outputs of the sine-cosine preobresti units of the division. After equilibration of the projections of the change in the value of the argument is the angle corresponding to the counter value, and a module, the value of which corresponds to the output signal of one of the units of the division.The drawbacks are the low speed and accuracy while reducing the amplitude of one of the signals.Know another device [2] contains one connected to the first comparator, a counter, sine-cosine Converter, two unit, a second comparator and a switch.Compared to [1] this device has the advantage, as when different ratios of the signals at the output of the switch determines the module is equal to x/cosF when x > y or Y/sinF when y > x. However, both these devices have poor performance.It is known device [3] to convert rectangular coordinates to polar, containing quadrature generator, two balanced modulator, an adder and a Comparer. The amplitude at the output of the adder corresponds to the desired module, and the time interval of the pulse at the output of the Comparer is proportional to the desired phase (the argument of the module).The device is simple in execution, but obedient in the polar [4] contains two unit, the first inputs which are input devices, two block multiplication, two adder and the third block division using feedback.The device compared to [1-3] has high performance, but the use of multiple multipliers and units of the division limits the dynamic range of the device and increases the instrumental error when changing the ratios of the input signals.The purpose of the invention the expansion of the dynamic range of the investigated signals while maintaining high performance.The purpose of the device the conversion of rectangular coordinates into polar, containing two adder and the power division is achieved by the fact that it further comprises the amplitude selector, controlled voltage divider, the voltage reference and managed the adder, and the first and second input devices are connected to the corresponding inputs of the amplitude selector, the first and second outputs of which are connected to the first and the second input unit, respectively, the output of which is connected with the control input of the control voltage divider and the first inputs of the first adder and managed adder, the second inputs of the two latter coupled to the third output of the amplitude selector and the output controlled adder connected to the first output device, the first output of the amplitude selector connected to the first input of the second adder and the second output through a controlled voltage divider connected to the second input of the second adder, the output of the latter is connected with a second output device; amplitude selector contains a block allocation of maximum, minimum and the unit of comparison, and the first and second inputs of the amplitude selector connected to pairs connected to the first and second inputs allocation unit maximum, minimum and block comparison, respectively; two output unit selection minimum, maximum, and the output of the Comparer is connected to the first, second and third outputs of the amplitude selector, respectively; managed the adder contains the key and managed the subtraction unit, and the first input of the control adder connected to the first input of the control unit of the subtraction, and the second input of the control adder via a dongle connected to the second input of the control unit subtraction, the output of which is connected to the output of the controlled adder, the third and the fourth (control) inputs of the latter is connected to the control inputs of the key and managed subtraction unit, respectively.The invention is in the determination of the argument vector of the I values of arctan(x/y) in the angle range from N/4 to N/2, when y x, then use the value arctan(x/y)= /2-arctan (y/x) and the approximation is carried out for values of arctan(y/x).This method definitions of the values of arctan(x/y) allows to significantly simplify approximating the function with a high accuracy approximation and write this function in the following form:arctan(x/y)=Kf(K)

for K=X/Y if X-Y

and

arctan(x/y)= /2-arctan (y/x) for a

k=y/x if x y, (1)

where f(K)=A-aK f(K) < 1,

f(K)=1 for f(K) 1;

A, A the coefficients are chosen from the condition of minimization of the approximation error.In Fig. 1 shows a structural diagram of a device for the conversion of rectangular coordinates to polar. It consists of the amplitude selector 1, the unit 2 controlled voltage divider 3, the first adder 4, the managed adder 5, the second adder 6, the voltage reference.Blocks in the device converting rectangular coordinates to polar are connected as follows. The first and second input devices are connected to the corresponding inputs of the amplitude selector 1, the first and second outputs of which are connected to first and second inputs of unit 2, respectively. The output of the latter is connected to the control input of the control voltage divider 3, the first is the source U

_{op}the reference voltage. The third and fourth (control) inputs managed adder 5 is connected to the third output of the amplitude selector 1 and the output of the first adder 5, respectively. The output controlled adder 5 is connected to the first output device. The first output of the amplitude selector 1, corresponding to the maximum output signal, connected to the first input of the second adder 6. The second output of the amplitude selector 1 corresponding to the minimum signal that is connected through a controlled voltage divider 3 to the second input of the second adder 6. The output of the second adder 6 is a second output device.Structural diagram of the amplitude selector 1 shown in Fig. 2. It consists of block 7 allocation of minimum, maximum, and block comparison 8. Blocks in amplitude selector 1 is connected as follows. The first and second inputs of the block 7 to the selection of the minimum, maximum, and Comparer 8 pairs are interconnected and connected to the first and second inputs of the amplitude selector 1, respectively. The first and second outputs of the block 7 to the selection of the minimum, maximum, connected to the first and second outputs of the amplitude selector 1, respectively. The output of the Comparer 8 is connected to the t is shown in Fig. 3. It consists of a managed unit 9 subtraction and the key 10, which are connected as follows. The first input of the control unit 9 of the subtractor is connected to the first input of the control adder 5, the second input is connected to the output of the key 10, the first input of which is connected to the second input of the control adder 5. The third and fourth inputs of the latter is connected to the second (administrator) input key 10 and the third (the Trustee) to the input of the control unit 9 subtraction, respectively. The output of the controlled unit 9 subtraction is connected to the output of the controlled adder 5.A device for converting rectangular coordinates to polar works as follows.The input voltage U

_{x}and U

_{y}corresponding to the values X and Y are received at first and second inputs of the amplitude selector 1, and accordingly, block 7 allocation of minimum, maximum, and Comparer 8. It is considered the principal value of the angle for the first quadrant, the input signals have the same signs. Unit 7 the selection of the minimum, maximum, allocates, for example, on his first maximum output of the two voltage U

_{1-1}and the second minimum voltage U

_{1-2}that is, for example, in which the first input unit 2, which is the input signal of the divider.Thus, at the output of unit 2 receives the voltage U

_{2}is proportional to (U

_{1-2})/(U

_{1-1})=K 1. That is, the use of the amplitude selector 1 provides the unit 2 in the range of K values lying in the interval 0 K 1. The voltage U

_{2}will change linearly with changes in the values of K. Hence, we can write

U

_{2}=U

_{op}, (2)

where K=x/y=U

_{x}/U

_{y}when U

_{x}U

_{y}and K=U

_{y}/U

_{x}when U

_{y}U

_{x}.Consider first, how do you get the signal, proportional to the value of arctan K, i.e., get the value of the argument vector.The voltage U

_{2}supplied to the first input of the control adder 5 and respectively controlled unit 9 subtraction, and also to the first input of the first adder 4. The second input of the latter is supplied voltage from the voltage reference.The output of the first adder 4 receives the voltage U

_{4}that depends on the voltage U

_{2}. Voltage 4 output of the first adder 4 controls the gear ratio at the first input of the control adder 5. This voltage U

_{4}is defined by the following dependence is

_{4}=U

_{4}

_{max}for all other values of U

_{2},

where U

_{c}= AU

_{4}

_{max}and C=aU

_{4}

_{max}/U

_{0}the coefficients a, and from (1) U

_{4}

_{max}the voltage at which the gear ratio at the first input of the control adder 5 is equal to the unit. In this case, for simplicity, let us assume U

_{4}

_{max}=U

_{op}.The condition U

_{4}U

_{4}

_{max}you can perform equal ways, for example, using the output stage with a limitation in the unit 2 or in the first adder 4, so cascade constraints in the structural diagram is not shown and not a separate unit.Thus, it is possible to imagine U

_{4}as follows:

U

_{4}=U

_{4}

_{max}A-(aU

_{4}

_{max}/U

_{0})U

_{2}. (3)

Given from (2) that K=U

_{2}/U

_{0}you can write:

U

_{4}=U

_{4}

_{max}(A-aK). (4)

This voltage 4 is supplied to the fourth (control) input of the control adder 5, and on his third (control) input from the third output of the amplitude selector 1 receives the logical signal U

_{1-3}for controlling the operation of the key 10, which connects to the second input of the control unit 9 subtracting a voltage equal to zero.Block comparison of the output signals of block 7 allocation of maximum minimum (so it is part of the amplitude selector and not a separate unit).When U

_{x}U

_{y}on the third output of the amplitude selector 1 is installed, for example, a logical "0", which connects to the second input of block 9 subtracting a voltage of zero. In this case, the first and second inputs of the block 9 subtracting the received voltage U=U

_{2}and U=U

_{0}respectively.Transfer ratio of the first input unit 9 subtraction is controlled using the voltage U

_{4}coming from the output of the first adder 4. This voltage has a value in accordance with expressions (3), (4), so the output voltage from the first output device can be written as follows:

U

_{o}

_{1}U

_{5}U

_{2}f(K), (5)

where U

_{2}U

_{0}K and f(K) A aK.When U

_{y}U

_{x}to the second input of the control unit 9 subtraction connects voltage from the reference voltage, and this voltage is chosen twice the voltage U

_{0}, that is, U

_{op}2U

_{0}and managed adder 5 get:

U

_{o}

_{1}U

_{5}U

_{op}U

_{2}f (K) 2 U

_{0}U

_{2}f(K).Therefore, received >YH=2U

_{o}-kU

_{o}f(k)= /2-arctan(y/x) K y/x if x y, (6)

where f(K) A-aK f(K) <1;

A, A the coefficients are chosen from the condition of minimization of the approximation error.The approximation error of q can be obtained from the following expression:

q 1 [K(A aK)/arctan K] for K 1.For example, when A 1,075 and a 0.29 error q depending on 0 K 1 will be changed from 0 to 0.3, hence, the truncation error will be equal to q/2, i.e. 0,15

^{o}.Thus, using a simple mathematical dependences it is possible to constrict the methodological error in the determination of the argument vector. Instrumental error of the proposed device will not exceed the truncation error, provided that the total error in the device will have a value of not more than 0.3% of that for this implementation is not difficult.Consider now the receive signal, proportional to the value of the modulus of the vector.The voltage U

_{1-1}from the first output of the amplitude selector 1, corresponding to the maximum signal is supplied to the first input of the second adder 6, and the voltage U

_{1-2}with the second output of the amplitude selector 1, sootvetstvuu. The gain controlled voltage divider 3 is controlled by the voltage U

_{2}and decreases proportionally with the increase in the value of the coefficient K 1. We will adopt the notation K 1/K

_{c}or K

_{c}1/KTherefore, taking into account the adopted notation, the first and second inputs of the second adder 6 receives a voltage of the same sign U

_{1-1}and (U

_{1-2})/K

_{c}accordingly, where these voltages are summed with certain factors.We show that the sum of these voltages with certain coefficients will correspond to the square root of the sum of the squares of the input voltages U

_{x}and U

_{y}:

< / BR>

We write the equality

< / BR>

where K

_{c}(U

_{1-1})/(U

_{1-2}).Equate U

_{Z}and , we define the coefficients K

_{c}and from this equation:

< / BR>

where get

< / BR>

.K

_{c}changed arbitrarily, so put for simplicity, K

_{c}1 and from (10) we define the ratio: and 0,4142. With this value of K factor

_{c}and will equal:

< / BR>

Below is the error estimation calculation of the square root of the sum of the squares of the voltages U

_{x}and U

_{y}when the selected testing the equation (9)

.From equation (12) determine the value of K

_{c}at which the error j is the maximum absolute value for which the derivative j' equate to zero and get

TO

_{the extras}0,4142/ (1 1,8284) 1,5536.For K

_{the extras}1,5536 there is an error of j

_{the extras}-1,48% On the whole range of changes in K

_{c}from 1 to K

_{the extras}the error will vary from 0 to a value equal to -1,48% then K

_{the extras}to infinity, the error will again tend to zero.Error j -1,48% means that the voltage at the output of the second adder 6 is less than the true value of U

_{z}maximum 1,0148 times. To get a methodological error in the determination of U

_{z}a different sign, but smaller in size, i.e., to obtain j 0,74%, enough to increase the output signal 1,007 times, in this case the curve of error in the expression (6) will move up along the ordinate axis 0.74%

Such correction of the output signal and sets the ratio and are the choice of the resistances of the resistors in the feedback of the second adder 6:

the transmission coefficient adder first input with the maximum signal K

_{1}R

_{10}/R

_{8}1,007;

the transmission coefficient adder second input resistor and the feedback resistor of the second adder 6, respectively.In the inventive device the unit 2 and a controlled voltage divider 3 will not contribute additional instrumental error, as it is no requirement of high accuracy. To ensure error j 0,74% for these units acceptable error of not more than 1.0% which is easily done in practice.Another advantage of the proposed device is the ability to work in a large dynamic range that is achieved by using devices with a transfer rate of not more than 1. When implementing more complex functions to maintain a ratio of not more than 1 difficult.The device is implemented using a conventional links, known in the literature [5]

the amplitude selector 1: block 7 allocation of minimum, maximum, [5A] Comparer 8 [5B]

the block division 2 [5V]

managed the voltage divider [5g]

the first and second adders 4 and 6 [5D]

managed the adder 5, the managed unit 9 subtraction [5D] key 10 MS series 590;

the control according to the first input of the control unit 9 of the subtraction is carried out either by changing the resistor on the input with voltage, or by using the using the Zener diode in the feedback circuit or similar [5e]

Sources of information:

1. French patent N 2209147, CL G 06 G 7/22, 1974.2. Auth. St. USSR N 729597, CL G 06 G 7/22, 1980.3. Auth. St. USSR N 624363, CL G 06 G 7/22, 1978.4. Auth. St. USSR N 980107, CL G 06 G 7/22, 1982.5. Alexenko A., particularly E. A. Starodub, And. the Use of precision analog ICS. M. Owls. radio, 1980: (a) S. 177; b) S. 168-174; C) S. 100-101; g) S. 63; D. 77; e) S. 195-196. 1. A device for converting rectangular coordinates to polar, containing two adder and the unit, characterized in that it introduced a source of reference voltage, managed adder, a controlled voltage divider and the amplitude selector, the first and second inputs of which are the same input device, the first output of the amplitude selector connected to the same input unit and the first adder, the second output of the amplitude selector connected to the same input of the unit and to the input of the control voltage divider, the output of which is connected to a second input of the first adder, an output unit connected to the control input of the control voltage divider and to the first inputs of the second adder and managed adder, a second input controlled adder, vtoroe adder connected to respective control inputs of the controlled adder, the output of which the output of the first adder are the outputs of the device.2. The device under item 1, characterized in that the amplitude selector contains a block allocation of maximum, minimum and the unit of comparison, the first and second inputs which are connected to the same inputs of the amplitude selector and block allocation maximum, minimum, first and second outputs which output block are respectively first, second and third outputs of the amplitude selector.3. The device under item 1, characterized in that the managed adder contains the key and managed subtraction unit, the first input and the input key is connected with the first and second inputs of the controlled adder, the control inputs of which are connected respectively to the control inputs of the controlled unit and subtraction key, the output of which is connected to the second input of the control unit subtractor whose output is the output controlled adder.

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