# Trigonometric converter

(57) Abstract:

The invention relates to the field of computer engineering and can be used in measurement and information systems. The purpose of the invention is the expansion of the dynamic range. This goal is achieved through the implementation of the approximation after parsing the value of the angle. The device has an amplitude selector block division, the adder and managed adder. 2 C.p. f-crystals, 3 ill. The invention relates to computer technology and can be used in information-measuring systems, as well as in various automated devices that require the determination of the values of arctan (x/y) with a high speed, low accuracy and ease of implementation in a large dynamic range.A device for determining the argument of the vector [1] contains a logarithmic function generators, power summation and subtraction of the voltage, the memory block, the block nonlinear correction, switches, and flow calibration. Its work is based on the approximation argument functions, logarithmic functions, orthogonal components.The device is quite difficult to implement, has low bestrode the two resistors with zeropressure conductivity, the resistor zeropressure resistance and an operational amplifier.The device has a small truncation error of approximation taken a mathematical expressionarctan x (a1x Friday + A3x

^{3})/(b

_{0}+ x

^{2})

where the coefficients must be determined with very high accuracy, less than 0.02%

The device requires the use of complex digital devices, which in combination with the analog signals irrational.Known trigonometric functional converters time-pulse action based on the formation time intervals using a harmonic reference signal, for example, similar to the device [3] in which to obtain the output signal, proportional to the value of arctan (z/x), use two balanced modulator, an adder and a comparator.The device is quite simple in execution, but has low speed.The closest General technical characteristics is a device for trigonometric transformations [4] contains the adders and blocks dividing by logarithmic amplifiers connected to the subtraction unit, the output of which is connected with antilogarithmic block. It is high performance, however, this type of approximation gives a large error 0.7

^{o}.Similarly, you can implement more complex mathematical dependence, similar to [2] using a multiplier-divider device and summation blocks. In this case, the device will have a high performance, low methodological error, however, to have limited dynamic range and quite a lot of instrumental error, because error several nonlinear devices will determine the overall error.The purpose of the invention the expansion of the dynamic range, reduce the instrumental error while maintaining high performance.The essence of the invention lies in the fact that if x y, then the approximation is carried out in the range from 0 to /4 arctan (x/y), and to obtain the value of arctan (x/y) in the angle range from p/4 to /2/2, y x, use a ratio of arctan(x/y) = /2-arctan(y/x)/2, and the approximation is carried out for values of arctan (y/x).This method definitions of the values of arctan (x/y) allows to simplify essentially approximating the function with a high accuracy approximation and write the function as

arctan (x/y) K f(K) for K x/y if x-y

and

arctan(x/y) = /2-arctan(y/x)/2 K y/and the approximation error.The purpose of the device containing the block division and two adder, is achieved by the fact that it further comprises the amplitude selector and a reference voltage, and one of the adders is made manageable, and the first and second input devices are connected to the corresponding inputs of the amplitude selector, the first and second outputs of which are connected to the first and the second input unit, respectively, the output of which is connected with the first inputs of the adder and managed adder, a second input which is connected to the reference voltage, the third and the fourth (control) inputs managed adder connected respectively with the third output of the amplitude selector and the output of the adder, and the output controlled adder coupled to the output device; amplitude selector contains a block allocation of maximum and minimum and the unit of comparison, and the first and second inputs of the amplitude selector connected respectively to pairs connected to the first and second inputs of blocks selection of maximum and minimum unit of comparison, two outputs block selection of maximum and minimum and the output of the Comparer is connected to the first, second and third outputs of the amplitude selector, respectively; otklyuchen to the first input of the control unit subtraction, and the second input of the control adder via a dongle connected to the second input of the control unit subtraction, the output of which is connected to the output of the controlled adder, the third and the fourth (control) inputs of the latter are connected respectively to the control inputs of the key and managed block subtraction.In Fig. 1 shows a structural diagram of trigonometric Converter. It includes:

the amplitude selector 1;

the block division 2;

the adder 3;

managed the adder 4;

the voltage reference.Blocks in trigonometric Converter is connected as follows. The first and second inputs of the amplitude selector 1 is connected to first and second inputs of unit 2, respectively. The yield of the latter is connected to the first input of the adder 3 and to the first input of the control adder 4, to the second inputs of which are connected to a source U

_{op}the reference voltage. The third and fourth (control) inputs managed adder 4 is connected to the third output of the amplitude selector 1 and the output of the adder 3, respectively. The output controlled adder 4 is output trigonometric Converter.The structural scheme of Implenia 6. Blocks in amplitude selector 1 is connected as follows. The first and second input unit 5 selection of maximum and minimum unit 6 comparison pairs are interconnected and connected to the first and second inputs of the amplitude selector 1, respectively. The first and second outputs of unit 5 selection of maximum and minimum are connected to first and second outputs of the amplitude selector 1, respectively. The output of the Comparer 6 is connected to the third output of the amplitude selector 1.Structural diagram of a managed adder 4 is shown in Fig. 3. It consists of a managed unit 7, subtraction and key 8, which are connected as follows. The first input of the control unit 7 of the subtractor is connected to the first input of the control adder 4, the second input is connected to the output of the key 8, the first input of which is connected to the second input of the control adder 4. The third and fourth inputs of the latter is connected to the second (administrator) input key 8 and the third (the Trustee) to the input of the control unit 7, subtraction, respectively. The output of the controlled unit 7 subtraction is connected to the output of the controlled adder 4.Trigonometric Converter operates as follows.Wodnego selector 1, and, accordingly, unit 5 selection of maximum and minimum unit 6 comparison. It is considered the principal value of the angle for the first quadrant, the input signals have the same signs. Unit 5 selection of maximum and minimum allocates, for example, on his first maximum output of the two voltage U

_{1-1}and the second minimum voltage U

_{1-2}that is, for example, to the second input of unit 2, which is the input signal-dividend. The maximum voltage U

_{1-1}supplied to the first input unit 2, which is the input signal of the divider.Thus at the output of unit 2 receives the voltage U

_{2}is proportional to (U

_{1-2}/(U

_{1-1})=K 1. That is, the use of the amplitude selector provides the unit 2 in the range of K values lying in the interval 0 K 1. The voltage U

_{2}will change linearly with changes in the values of K. Hence, we can write:

U

_{2}=U

_{0}K (2)

where k=X/Y=U

_{x}/U

_{y}when U

_{x}U

_{y}and K=U

_{y}/U

_{x}when U

_{y}U

_{x}.The voltage U

_{2}supplied to the first inputs of the controlled adder 4, and respectively controlled unit 7, subtraction, and that the CLASS="ptx2">At the output of the adder 3 receives the voltage U

_{3}that depends on the voltage U

_{2}. The voltage U

_{3}from the output of the adder 3 controls the gear ratio at the first input of the control adder 4. This voltage U

_{3}is defined by the following dependency:

U

_{3}=U

_{c}-c U

_{2}for all voltages U

_{2}when U

_{3}< U

_{3}

_{max}< / BR>

and

U

_{3}=U

_{3}

_{max}for all other values of U

_{2},

where U

_{c}=A U

_{3}

_{max}and c=a U

_{3}

_{max}/U

_{op}the coefficients A,and from (1);

U

_{3}

_{max}the voltage at which the gear ratio at the first input of the control adder 4 is equal to the unit. In this case, for simplicity, let us assume U

_{3}

_{max}=U

_{op}.The condition U

_{3}U

_{3}

_{max}can be performed in different ways, for example by using the output stage with a limitation in the unit 2 or in the adder 3, so cascade constraints in the structural diagram is not shown and not a separate unit.Thus, it is possible to imagine U

_{3}so:

U

_{3}=U

_{3}

_{max}A (a U

_{3}

_{max}/U

_{0})U

_{2}. (3)

Given from (2) that K=U

_{2}/U

_{0}you can write:

U

_{3}is on his third (control) input from the third output of the amplitude selector 1 receives the logical signal U

_{1-3}for controlling the operation key 8, which connects to the second input of the control unit 7 or subtracting a voltage of zero or the voltage U

_{op}.Unit 6 comparison can be built in different ways when compared to one of the input signals to another input or any output unit 5 selection of maximum and minimum (so it is part of the amplitude selector and not a separate unit).When U

_{x}< U

_{y}on the third output of the amplitude selector 1 is installed, for example, a logical "0", which connects to the second input unit 7 subtracting a voltage of zero. In this case, the first and second inputs of the block 7 subtracting the received voltage U=U

_{2}and U=U

_{0}respectively.Transfer ratio of the first input unit 7 subtraction is controlled using the voltage U

_{3}coming from the output of the adder 3. This voltage has a value in accordance with expressions (3), (4), so the output voltage can be written as follows:

U

_{o}=U

_{2}f(K), (5)

where U

_{2}=U

_{0}K and f(K)=A-aK.When U

_{y}U

_{x}then to the second input of the control unit 7 subtraction connects the voltage is and the output controlled adder 4 get:

U

_{o}=U

_{op}-U

_{2}f(K)= 2U

_{0}-U

_{2}f(K).Consequently, the received expression in accordance with (1)

U

_{o}=arctan(X/Y)=K U

_{0}f(K) for K=x/y if x-y

and

for k=y/x if x y, (1)

where f(K)=A-aK f(K) < 1,

f(K)=1 for f(K) 1,

A, A the coefficients are chosen from the condition of minimization of the approximation error.The approximation error of q can be obtained from the following expression: q= 1-[K(A-aK)/arctgK for K 1.For example, if A=1,075 and a=0.29 error q depending on 0 K 1 will be changed from 0 to 0.3

^{o}therefore, the truncation error will be equal to q/2, i.e. 0,15

^{o}.Thus, using a simple mathematical dependences it is possible to constrict the methodical error. And the ease of implementation provides a small amount of instrumental error. For example, the instrumental error for implementing features similar to [2], will contribute to the errors of the eight transmission ratios, and offer the device a total of four. Instrumental error of the proposed device will not exceed the truncation error, provided that the total error in the device will have a value of not Barista is the ability to work in a large dynamic range, that is achieved by using devices with a transfer rate of not more than one. When implementing more complex functions to keep the gear ratio is not greater than one difficult.The device is implemented using a conventional links, known in the literature:

the block division 2 [5A]

the adder 3 and block 7 subtraction [5B]

the cascade limit the Zener diode in the feedback circuit of the operational amplifier unit, division or adder can [5V]

the control according to the first input of the control unit 7, subtraction is effected either by changing the resistor on the input with voltage, or using a controlled voltage divider as in [5g]

unit 5 selection of maximum and minimum [5D]

the Comparer 6 [5e]

key 8 series KN.The sources of information.1. U.S. patent N 3792246, CL 235-186, 1974.2. Auth. mon. USSR N 1300504, CL G 06 G 7/22, 1987.3. Auth. mon. USSR N 624363, CL G 06 G 7/22, 1978.4. Handbook of nonlinear schemes./Ed. by D. Sheingold. M. Mir, 1977, S. 176 (prototype).5. A. G. Aleksenko and other precision analog ICS. M. Owls. radio, 1980: (a) S. 100-101; b) S. 77; c. 195-196; g) S. 63; d) S. 177; is the action scene themes that he entered the amplitude selector and the reference voltage, one of the adders is made manageable, and the first and second inputs of the Converter are the same inputs of the amplitude selector, the first and second outputs of which are connected to the same input unit, the output of which is connected with the first inputs of the adder and managed adder, a second input which is connected to the reference voltage, the third output of the amplitude selector and the output of the adder is connected to control inputs of the controlled adder whose output is the output of the Converter.2. The device under item 1, characterized in that the amplitude selector contains the block comparison and block allocation of maximum and minimum, the first and second inputs which are connected to the same inputs of the amplitude selector, Comparer, the first and second outputs block selection of maximum and minimum and the output of the Comparer connected respectively with the first, second and third outputs of the amplitude selector.3. The device under item 1, characterized in that the managed adder contains the managed subtraction unit and the key input and the first input of the control unit subtracting connection is managed block subtraction, control inputs key and managed subtraction unit are the control inputs of the controlled adder.

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**FIELD: computer engineering; automation, data processing and measurement technology.**

**SUBSTANCE: proposed converter has two registers, NOT gate, angle-code-to-sine/cosine-code functional conversion unit, two digital-to-analog converters, reference voltage supply, pulse generator, counter, two capacitors, subtracting amplifier, two modulators, threshold unit, two selector switches, two buffer followers, threshold voltage supply, comparison circuit, D flip-flop, and reference code shaper; all these components enable functional control of converter during recording pulse time and supply of signal indicating normal or abnormal operation of converter to user thereby essentially raising its self-control ability and yielding profound and reliable information.**

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