# Device for linearization characteristics of transducers

(57) Abstract:

Device for linearization characteristics of transducers applies to automatics and computer engineering and can be used in a multi-channel measuring systems with different types of nonlinear transducers. The device contains an analog-to-digital Converter (ADC), input by the information input device, connected in series counter, a memory unit and switch the bus input code transducer connected to the senior address inputs of the memory block. Introduction to device clock frequency, block, subtracting and adding pulses, selector duration of second stage of integration of the ADC, as well as the implementation of the ADC in ADC double integration ensures high measurement accuracy and stability of the device settings without periodic calibration. 1 Il. The invention relates to automatic control and computer engineering and can be used in a multi-channel measuring systems with different types of nonlinear transducers.A device for correcting the non-linearity is rivny counter, software unit, the unit delay elements AND, OR, NOT, interconnected in a certain way [1]A disadvantage of the known device is a low speed, due to the fact that the linearization of sensor characteristics is performed after receiving the code of the measurement result on the output of the ADC.Another disadvantage of the known device lies in its limited operational capabilities, because the device allows for the correction of nonlinearity of only one type of sensors. This is due to the fact that used in the arrangement diagram of the formation of the corrective pulses is performed on the logical elements, as well as changing the type of sensor requires changing the correction, it entails and the schema change. In addition, the device is complex in implementation.Closest to the invention is a device for linearization characteristics of transducers containing a transducer similar number of pulses, the entrance of which is an information input device, connected in series counter, the memory block and the switch [2] In this device, the group of address inputs of the memory block connected to the analogue is a high performance, due to the fact that the linearization of the characteristics of the sensor signal is produced in the measurement process. The second advantage is the ability to measure programme linearization characteristics when changing the sensor type, because the memory block includes a selection field with another program linearization by a code change addresses.The disadvantage of the prototype is that to ensure high measurement accuracy required periodic calibration of the device, due to the dependence of the parameters, in particular parameters of the ADC, the climatic conditions and stability of parameters over time.When creating a device task was to develop a scheme that would ensure his performance is not worse than the prototype, but would have a high measurement accuracy and stability, device settings, and would not require periodic calibration.The technical result is achieved due to the fact that the device for linearization of the characteristics of the transducers, as a prototype, contains an analog-to-digital Converter, the input of which is an information input device, connected in series counter, a memory unit, commutato however, unlike the prototype, the device further comprises a clock generator frequency, the unit subtracting and adding pulses, the selector duration of second stage of integration of the ADC, and the ADC in the inventive device is designed as ADC double integration, the generator output clock frequency is connected to the first input of the subtracting and adding pulses, a second input connected to the second output of the memory block. The third input of the subtracting and adding pulses coupled to the output switch, the second input is connected with the younger bits of the counter. The clock input of the counter combined with a clock ADC input and is connected to the output of the subtracting and adding pulses, and control outputs of the ADC are connected to the outputs of selector duration of second stage of integration of the ADC, the output of which, in turn, is connected to the third input of the switch.It was the introduction of the device clock frequency, block, subtracting and adding pulses, selector duration of second stage of integrating ADC in conjunction with the performance of the ADC in ADC double integration and the corresponding relationships between the elements allowed us to obtain high accuracy and stability of employment.The device has connected in series generator 1 clock frequency, block 2 subtracting and adding pulses and the counter 3 outputs high-order bits of which is connected with the younger bits of the address input unit 4 memory, the older the address input of which is connected to the bus 5 input type code sensor, the first output unit 4 memory connected to the first input of the switch 6, the second input connected to the outputs of the least significant bits of the counter 3, the second output unit 4 memory connected with the second input device 2 subtracting and adding pulses, a third input connected to the output of the switch 6, analog input 7 device is the ADC input 8, a clock input connected to the output device 2 subtracting and adding pulses, control outputs of the ADC 8 is connected to the inputs of the selector 9 duration of second stage of integration of the ADC, the output of which is connected to the third input of the switch 6.The device operates as follows. In the initial state, the frequency of the generator 1 through the block 2 subtracting and adding pulses supplied to the clock input of the ADC 8, switch 6 is closed by the signal from the selector 9 duration of second stage of integration ADC pulse sequence with the gene for the initial state (connection, designed for the installation of the meter 3 in original condition, not shown) and the signal from the selector 9 duration of second stage of integration ADC permit the passage of corrective pulses through the switch 6. The number of correction pulses to the site of linearization is indicated by a code block 4 memory, with him on the block 2 subtracting and adding pulse signal that determines the mode of subtracting or adding pulses.During the time of second stage of integration to the ADC 8 is supplied adjusted pulse sequence and to code the output of the ADC 8 is formed in the result of measurement in the units controlled by the sensor parameter. Depending on the number of sensors set in the code on bus lines 5, selects the unit volume 4 memory in which is recorded the program linearization of the characteristics of the respective sensor. If the measured value can be both positive and negative, the signal sign ADC output 8 should be submitted in one of the address inputs of the block 4 memory. The main characteristics of the device do not depend on the operating conditions, in particular from changes in ambient temperature,which is confirmed by Lanjouw frequency f

_{t}and to the ADC 8, in particular on the result of the conversion and the time constant of integration.Unit 2 subtracting and adding pulses, the counter 3, block 4 memory switch 6, the selector 9 duration of second stage of integration of the ADC are performed on digital logic elements, so their parameters are not independent of changes in ambient temperature do not affect the accuracy of the device as a whole.The two-stroke principle of integration (Gutnikov C. C. Integrated electronics in the measuring devices. L. Energoatomizdat, 10.1; 10.2), the output code of the ADC is equal to:

< / BR>

where f

_{t}the frequency of clock pulses;

T

_{2}duration of second stage of integration;

T

_{1}the duration of the first stage of integration;

N

_{1}the number of pulses identifying the first cycle of integration;

U

_{op}reference voltage;

U

_{I}the input voltage.As can be seen from the formula, the frequency of clock pulses does not affect the conversion result of the ADC, it is necessary only to ensure consistency of this frequency during the measuring cycle as when setting the duration of the first stage of integration, and in the measurement of duration of second stage INTACTO one measurement cycle clock frequency is almost the same.Based on the above formulas and in accordance with the terms defined in the mentioned book. C. S. Gutnikov (page 260), we can assume that the time constant of the ADC 8 in the first approximation does not affect the result of the conversion.The proposed device can be used in devices designed for measuring non-electrical quantities, for example, to measure temperature in various environments, pressure, humidity, etc. depending on the sensor type.Analog-to-digital Converter (ADC) 8 performed on the chip CREW BRP. 348.432-TO with the external reference clock frequency. The clock frequency is executed according to the scheme shown in Fig. 3.12 in the book. Gutnikov C. C.Unit 2 subtracting and adding pulses made by the author.St. N 1568222.The counter 3 is performed on the chip CIE (series C BRP.348.457 TU).The switch 6 is executed on the logical elements AND NOT CLA.The selector 9 duration of second stage of integration of the ADC is performed on a logical XOR CLP and Comparators CSA.Unit 4 memory implemented on the chip CRRT BRP.348.322-TU.The independence of the main characteristics of the device, such as precision of different climatic zones.Additionally, one of the main advantages of this device is the high temporal stability, which enables the operation to exclude the calibration device and the frequency metrological verification, it may be increased.The ease of implementation of devices allowed in a short time to create a digital multi-meter CR working with various temperature sensors used in the automotive kislorodozawisimae stations. Device for linearization characteristics of transducers containing analog-to-digital Converter (ADC), input by the information input device, connected in series counter, a memory unit and switch the bus input code transducer connected to the senior address inputs of the memory block, wherein the ADC is executed as the ADC double integration, and in the device entered the oscillator clock frequency, the unit subtracting and adding pulses and the selector duration of second stage of integration of the ADC, the output clock frequency is connected to the first input of the subtracting and adding pulses, the second input of which is connected to W is, the Torah an input connected to the outputs of the least significant bits of the counter, the clock input of which is combined with a clock ADC input and is connected to the output of the subtracting and adding pulses, control outputs of the ADC are connected to the inputs of the selector duration of second stage of integration of the ADC, the output of which is connected with the third input switch bit ADC output is an output device.

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