Wave hydroelectric

 

(57) Abstract:

Usage: to hydropower, namely, wave power plants and can be used in wave power plants. The inventive wave power plant comprises a support 1, piezoresistor 2, the rack 3, the hinge 4, the lever 5, the float 6, clamping the shield 7, electronic keys 8, 9, the voltage divider 10, analog-to-digital Converter 11, a counter 12, the reversible counters 13 and 14, numeric Comparators 19 and 20, the logical elements 21, 22, 23, 24, 25 and NOT 28, the trigger 26, the generator 27. Wave power plant allows to produce the specified voltage with high accuracy for its regulation. 1 C. p. F.-ly, 5 Il.

The invention relates to hydropower, namely, wave power plants and can be used in wave power plants.

Known wave power plant that converts wave energy into electrical energy through the use of oscillatory movement of the float of heat, resulting in action piston pump, from which the pressure fluid to the turbine, generating electricity.

The lack of such facilities is the high complexity and Nevis, containing the pontoon with piezo, buried under the water level and anchored to the bottom, and a float of two parts, connected by means of rods and hinges with the pontoon. The unit is adopted as a prototype.

Its disadvantage is the low quality of electricity, depending on the force of the waves.

The objective of the invention increase the efficiency of power plants.

The technical result is achieved by the fact that in the wave power plant containing a support mounted on it with piezogenerators, reliance is placed on the platform), and it installed rack with axes, each of which is fixed raznoliki the lever, the greater the leverage is set to the float, but on a smaller clamping the shield above piezoresistors and piezoresistor composed of N sections, separated by dielectric spacers, and each section has peopleco placed between the upper and lower substrates, additionally, the thickness of piezoplate in the i-th section shall be adopted in accordance with the expressioni=12i-1; where1the thickness of piezoplate the first section, and the output clip of one polarity is connected through the N series-connected shunt keys with wihiii through the i-th sectional electronic key, in addition, the lower substrate is connected with the output shunt key of the i-th section, the control electrode through which the i-th logic element is NOT connected with the corresponding output of the second reversible counter associated corresponding outputs with the control electrodes of the respective sectional keys, and summing the input to an output of the fourth logic element And the first input connected to the output of MORE third numeric comparator, associated with an output SMALLER than the first input of the third logic element And discharges the first input with the corresponding bits of the output setting register, and the bits of the second input with the corresponding bits of the output of the memory register and gatherings source of the first reversible counter, the input of the original account number of which is connected to the input of the write memory register, the second inputs of the third and fourth logic elements And fault input trigger and output of the first differentiator, whose input is connected to the output GREATER than the first number of the comparator, connected: the bits of the first input with the corresponding bits of the output of the counter and the input of the memory register; bits of the second input with the corresponding bits of the output number is which logic element, And the output of which is connected to the counting input of the counter, fault input associated with a single input trigger fault input of the second reversible counter, the bus RESET and the output of the second differentiator, the input connected to the output is LESS than the second numeric comparator associated with the bits of the first input with the corresponding bits of the output of the first reversible counter, and the output is MORE with the second input of the first logic element And connected to the subtractive input of the first reversible counter, a first input connected to the output of the generator is stable pulses and the first input of the second logic gate And the third input to inverse trigger output, single output connected to the third input of the second logic element And, in addition to the output terminals of the generator is connected to the voltage divider, the slider of which is connected to the input of analog-to-digital Converter and the output of the third logic element And subtractive input of the second reversible counter.

Clamping the shield provides simultaneous effect immediately on the whole area of piezoresistor. The lever attached to the rack mounted on a support, allows to increase the pressure acting on film.

iV12i-1where V1the voltage of the first section. This allows you to have on output terminals of the power plant any required voltage and to ensure its stability depending on the load station and force of the waves by varying the amount included in the sections.

Shunt and sectional electronic keys managed by the second reversible counter, provide the switching sections in the voltage regulation. The voltage divider and an analog-to-digital Converter are measuring body diagram of voltage regulation. The first numeric comparator, a counter, a second logical element And the generator stable pulses and the first differentiator provide code generation voltage amplitude which is stored in the memory register. The second numeric comparator, the first reversible counter, a second differentiator and the first logical element And serve to return the circuit to its original state for formation of the next code amplitude. The third numeric comparator, a memory register that specifies the register, the third and fourth logic elements And form a regulating effect on the second reversible counter for increasing or decreasing the voltage p is a device and the control circuit piezoresistors; in Fig. 4 is a block diagram of a system for automatic regulation of the voltage of Fig. 5 is a plot of the signals at the outputs of the main elements of the regulation.

Wave power plant comprises a support 1, piezoresistor 2, the rack 3, the hinge 4, the lever 5, the float 6, clamping the shield 7, shunt electronic keys 8 1, 8 N sectional electronic keys 9 1, 9 N, the voltage divider 10, analog-to-digital Converter 11, the pulse counter 12, the first 13 and second 14 reversible counters, the first 15, second 16 and third 17 numeric Comparators, the memory register 18, the first 19 and second 20 differentiator specifying register 21, the first 22 and second 23, the third 24 and fourth 25 logical elements And the trigger 26, the generator stable pulse 27, the logical elements NOT 28 1, 28 N. Piezoresistor 2 consists of N sections, each of which contains the top 30 N and the lower 32 N substrate with electrodes, peopleco 31 N and the dielectric spacer 33 n

The power plant operates as follows. With the approach of the wave float 6 rises and larger lever arm 5 impact force. The lever rotates on the axis 4 and the presser shield 7 affects piezoresistor 2, on output terminals which receive the electromotive force. After passing voltara 2. When you approach the next wave cycle repeats.

The voltage divider 10 is connected to bus piezoresistors 2. Output AC voltage is input to analog-to-digital Converter 11. Code of the instantaneous voltage supplied to the second input of the numeric comparator 15. On its first input connected to the output of the pulse counter 12, which will be formed code voltage amplitude. Until the code is instantaneous values of the voltage more code at the output of the pulse counter 12, the signal is present at the output is LESS than the numeric comparator 15, which prepares the logical element And 23 to the second input. From pulse generator 27 via the first input of logic element And 23 receives the pulses to the counting input of the pulse counter 12. Code at its output increases and in case of equality codes at the inputs of the comparator 15 logical element And 23 is locked, the pulse counter 12 does not arrive until the moment when the code at the output of analog-to-digital Converter 11 increases. This process continues until it reaches the amplitude value of the instantaneous voltage. After instantaneous value of the voltage becomes less than the amplitude, the code at the output of the counter 12 becomes more code at the output of the Ala differentiator 19 generates a pulse to the input of the write memory register 18, where code is logged in the amplitude of the voltage output of the pulse counter 12. Simultaneously, the pulses from the differentiator 19 trigger 26 is reset to zero state and the logical element And 23 is closed by the third input. The same signal in the reversible counter 13 is filled in with code voltage amplitude from the output of the memory register 18. This code is supplied to the first input of the comparator 16, and at its second input receives the code of the instantaneous voltage that is smaller at this time, the amplitude value of the voltage, so the output is MORE of comparator 16. This signal is a logical element And 22 prepared by a third input signal from the inverted output of the trigger 26 is prepared on the second input and the generator 27 is starting to get a pulse on the subtractive input of the reversible counter 13. Code at its output decreases. This process continues until the instantaneous value of the voltage reaches a minimum, then the code on the second input of the comparator 16 becomes greater than the first input and a signal output is LESS than the comparator 16. This signal is differentiated by the differentiator 20 and fed to a single output of the trigger 26, which changes its state and prepares for the third vevee state. The code on the first input of the comparator 15 becomes less code instantaneous voltage and begins the process of measuring the amplitude of the next wave voltage whose code is written in the memory register 18. This code is supplied to the second input of the comparator 17, to the first input of which the output setting register 21 filed code of the given voltage amplitude.

If the current amplitude of the output voltage is less than specified, you receive the output signal MORE of the comparator 17, this signal prepares the first input of the logical element And 25 after the code is generated, the amplitude of the voltage from the differentiator 19 passes the pulse to a summing input of reversible counter 14. A signal at the output of the first discharge. When this control signal to the sectional electronic key 9 1 the first section of piezoresistor. Simultaneously supplied through the logic element is NOT 23 1 low shunt on the electronic key, 8 1, which is closed. When this output terminals connects the first section of piezoresistor 2.

According to the results of the second cycle of measuring the amplitude of the voltage will be introduced in the second section of piezoresistor 2 with one degree higher voltage is the voltage amplitude in the work will be introduced additionally, the first section of piezoresistor 2. In this section keys 9 1, 9 2 will be included, and shunt 8 1, 8 2 will be turned off.

As a result, the voltage each time increases by one step. This process will continue until such time as the voltage amplitude reaches specified, then the logical element And 25 is closed by the first input.

If the amplitude of the voltage to increase and become more defined, then to receive the output signal is LESS than the comparator 17 preparing for the first input element And 24. After the formation of the next code in the amplitude of the voltage from the differentiator 19 through the logical element And a 24 receives a pulse to the subtractive input of the reversible counter 14 and the partition switching the voltage at the terminals of piezoresistor 2 is reduced by one step.

Changing the settings, wave or load on the terminals of piezoresistor will be supported by a specified voltage through the respective switching sections piezoresistor.

Due to the expansion of the range of changes in the pressure acting on piezoresistor, the invention allows to increase its efficiency in the 2 to 5 times. The proposed wave power plant allows to produce any given napryazhennostyakh allows you to ensure that the control deviation is not more than 0.004 percent. Performance is determined by the frequency generator. When the frequency of the pulse generator 18 20 kHz and the eight elements of the circuit setting the output voltage from zero to rated can be carried out by 1.25 x 10-3C. When increasing the number of digits and the speed of the generator accuracy can be increased. To enhance the power station and the stability of the generated voltage wave section can contain multiple units installed side by side and working on a common load.

1. Wave hydroelectric containing support with fixed thereto piezoelectrically, float, kinematically associated with the pressure shield above piezoelectrically, characterized in that the reliance placed on the Bank or the platform it is installed racks with axes, the kinematic connection of the float is made in the form raznolikogo lever mounted on the axles, a float attached to a larger shoulder and clamping the shield to a smaller, while piezoelectronic recruited from the located one above the other sections, separated by dielectric spacers, each section is made of piezoplate placed between the upper and lower substrates, moreover, the thickness of peoplechange first top section;

2the thickness of piezoplate the i-th partition.

2. The wave power plant according to p. 1, characterized in that the output clip of one polarity is connected through the N series-connected shunt keys to the output terminal of the other polarity, and the upper substrate of the i-th section is connected to the input shunt key of the i-th section through the i-th sectional electronic key, in addition the lower substrate is connected with the output shunt key of the i-th section, the control electrode through which the i-th logic element is NOT connected with the corresponding output of the second reversible counter associated corresponding outputs with the control electrodes of the respective sectional keys and summing the input to an output of the fourth logic element And the first input connected to the output of the "More" third numeric comparator associated with the release of "Less" to the first input of the third logic element And discharges the first input with the corresponding bits of the output setting register, and the bits of the second input with the corresponding bits of the output of the memory register and the input source of the first reversible counter, the input of the original account number of which is connected to the input of the write memory register, the second iator, the inlet of which is connected to the output of the "More" first numeric comparator associated with the bits of the first input with the corresponding bits of the output of the counter and the input of the memory register, the bits of the second input with the corresponding bits of the output of the analog-to-digital Converter and the second input of the numeric comparator output is Less than the second input of the second logic gate And whose output is connected to the counting input of the counter, fault input associated with a single input trigger fault input of the second reversible counter, the bus Reset and the output of the second differentiator, whose input is connected with output Less than the second numerical comparator, associated discharges the first input with the corresponding bits of the output of the first reversible counter, and the output of "More" with a second input of the first logic element And output connected to the subtractive input of the first reversible counter, a first input connected to the output of the generator is stable pulses and the first input of the second logic element, And the third to inverse trigger output, single output of which is connected to the third input of the second logic element And, in addition to the output terminals of the generator is connected to the divider element And subtractive input of the second reversible counter.

 

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