The finisher characters

 

(57) Abstract:

The use of technical means of information and computer science, can be applied to solve problems in the compilation of dictionaries, reference books, as well as creating databases, in particular, to organize the stream of characters in alphabetical order. The inventive device is counting the number of identical symbols. When issuing array of devices, each character is assigned in accordance with the receipt of the indication mark. Characters that have values of high-order bits, are arranged independently from each other. The finisher characters contains the input channel, the block encryption and specify the address, the switch, the first finisher, the second finisher, block frequency symbols, unit organization, lookup the control unit. 8 Il., table 1.

The invention relates to means for Informatics and computer technology and can be used to solve problems in the compilation of dictionaries, writing books, and creating databases.

It is known Device for sorting numbers" (and.with. N 1304015, 1987, bull. N 14) allow to sort an array of integers, how to increase the N 46), allow to sort numbers in ascending and descending order.

As a prototype of the selected Device for the implementation of the normal algorithm Markov" (and.with. N 1455345, 1989, bull. N 4), which allows you to handle the flow of information and data arrays of text and numeric characters in accordance with normal algorithms.

Was tasked with reducing the time spent on sorting device for implementing normal Markov algorithm, as well as simplify the hardware implementation of the device of the sort.

The invention will increase the processing speed of information flows and data arrays of the text character.

The device will significantly reduce hardware, which leads to simplification of combinational circuits of the device.

Known algorithms to arrange the words of a certain array of words, for example, on the basis of the alphabetical order, as it takes place during the formation of dictionaries. Also known universal device for the implementation of lookup formulas in the form of Markov algorithms [1]

Under the Markov algorithm is understood as a finite sequence of formulas, representing with

The formula "substitution" over the word lies in the detection of this fragment, which coincides with the sample, and change the position of the detected fragment on the word-substitution. Therefore, in the case where the processed word can be represented in the following form:

< / BR>
where the sign graphics equality, R1, R2 any words in a fixed alphabet, then the result of the formula will be:

< / BR>
The detection of a fragment that matches the pattern is from left to right on the processed word. Whenever the detected first left the occurrence of the sample, then the substitution is performed and navigates to the lookup formula, the number of which is determined by the label belonging to the active formula. Such algorithms are called Markov marked.

Marked algorithm Markov to organize the array of words would be:

< / BR>
The above proposed algorithm for Markov ordering reflects only part of the ordering process on the first book of words, but the arrangement of this algorithm under the scheme cycle allows you to implement the entire process. Naturally, the implementation of the algorithm on the device /1/ oriented univote "overflow" letters through the entire array of words, be ordering the first, second, etc. letters. It is therefore advisable to implement hardware support for parts of the ordering algorithm, which will lead to a significant gain of time spent on the task.

In Fig.1 shows a block diagram of the finisher characters.

In Fig.2 shows a variant of the technical implementation of the block encryption and definitions addresses.

In Fig.3 shows a variant of the technical implementation on the switch.

In Fig.4 shows a variant of the technical implementation unit of the first sort.

In Fig. 5 shows a variant of the technical implementation unit frequency characters.

In Fig. 6 shows a variant of the technical implementation unit of the organization lookup.

In Fig.7 meaningful GAW operation.

In Fig.8 marked GAW operation.

The finisher characters (Fig.1) contains the input channel 1, block 2 encryption and definitions addresses, block 3 of the switch unit 4 frequency characters, the first sorting unit 5, the second block 6 sorting unit 7 organization lookup, the control unit 8.

This is CLASS="ptx2">

2. HRH the command permissions entries in the matrix multiplier block BE.

3. The CPC team operations;

4. CWR team of issuance of the matrix multiplier block BE.

5. GI stream of clock pulses 1.

6. SIH the synchronization signal 1.

7. SOB signal resetting first at the input of counter SC and SC unit BOCHS.

8. LC/SC signal recording/reading OSU unit BOCHS.

9. BK1 signal chip select OSU unit BOCHS.

10. GI stream of clock pulses 2.

11. SOB signal reset register-counter unit BOCHS.

12. CED sign of presence information in OSU unit BOCHS.

13. GUISE stream of clock pulses 3.

14. SIH the synchronization signal 2.

15. SOB signal reset SC and SC block BS.

16. LC/SC signal recording/reading OSU unit BOCHS.

17. BK2 signal chip select OSU unit BOCHS.

18. GI stream of clock pulses 4.

19. SOB signal reset SC and SC block BS.

20. LC/SC signal recording/reading OSU block BS.

21. VC signal chip select OSU block BS.

22. KOI sign of presence information in OSU block BS.

26. VC signal chip select OSU block BS.

27. BPS is a sign of the buffer memory OSU block BS empty.

28. GI stream of clock pulses 7.

29. GI stream of clock pulses 8.

30. SOB signal reset SC and SC block BS.

31. LC-SC signal recording-reading OSU block BS.

32. VC signal chip select OSU block BS.

33. GI stream of clock pulses 9.

34. GI stream of clock pulses 10.

35. LC/SC signal recording-reading OSU block BS.

36. VC signal chip select OSU block BS.

37. KPI sign of presence information OSU block BS.

38. BSP is a sign of the buffer memory OSU block BS EMPTY.

39. PMC control command block BOP.

40. GI stream of clock pulses 10.

41. A setting signal to zero counter midrange unit BOP.

42. CRC command receive register RS block BOP information from the switch block.

43. SYN sync signal of the register RG block BOP.

44. The ARC command issuance of the register RG block BOP.

45. KBC command issuing characters block BOP.

46. GLC code characteristic of the symbol.

47. UMC ordered Massi is ASS="ptx2">

50. ASV address of the second symbols.

51. TSA address characters first.

52. UMW an ordered array of symbols of the second block BS.

53. SAR ordered array of symbols of the first block BS.

54. The NPV of the repetition frequency of the characters in the block BOCHS.

55. PKM is a sign of the end of the character array.

56. DKS binary code symbols, the information output of the encoder unit BSA.

57. FAS formation address account counter SC unit BOCHS.

58. ASF address of the frequencies of the symbols.

59. Desm output frequencies of the symbols of OSU unit BOCHS.

60. Its modified frequency of the symbols, the input data OZU unit BOCHS.

61. ADN address data OZU unit BOCS, the output of the counter SC.

62. The START signal start.

63. The RESET signal reset.

64. PPB sign blank memory buffers.

65. BSP is a sign of the buffer memory OSU block BS empty.

66. ACC address reading symbols from OSU block BS, the information output of the counter SC.

67. GVA output symbols from OSU block BS.

68. ABC address fetch characters from OSU block BS.

69. R sign multiple of the Lok 2 (Fig.2) contains the encoder 9, D-trigger 10, a matrix multiplier 11, a decoder 12.

Switch 3 (Fig. 3) contains a group of elements I, a group of elements 14.

Unit 4 (Fig.4) contains the operational storage device 15 (RAM), operational storage device 16, (RAM), a register-counter 17 (RF-Lo), the counter 18 (SCH), a reversible counter 19 (cr), a group of items OR 20, item, OR 21.

The sorting unit 5 (Fig.5) includes operational storage device 22 (RAM), operational storage device 23 (RAM), the counter 24 (MF), reverse counter 2 (MF), a group of items OR 26, item 27, item OR NOT 28.

Unit 7 (Fig.6) contains the register 29, the counter 30, the D-flip-flop 31 of the sign, item OR 32, the first group of elements And 33, a second element group And 34, the group of elements 35.

The control unit 8 is synthesized on the basis of GSA control algorithm (Fig. 7) in a known manner (2). Tagged GAW operation of the control unit 8 shown in Fig.8 (refer to Fig.8 are shown in the table at the end of text).

Description of the control algorithm.

Meaningful GSA control shown in Fig.7 and reflects the operation of the control unit (Fig.1).

On signal "DOE" and "START" (blocks 37-39 graph-scheme of algorithm) lake 40 algorithm is recording the zero information in OSU unit BACS (Fig. 4). Input ("RFP-SC" served unit, the input of "VK" is zero, the information inputs OSU served D/O) commands "PO/SC:1", BK1: 0", OSW: n/a"). These commands are pre-loaded.

In block 41 is filing characters from the input channel to the input of the encoder (SM) (Fig.2).

In block 42 is the analysis of the sign of the end of the array "PCM".

If you come to the end of the array (special code),then transitions to block 50 of the algorithm. If this attribute on the input information is not available, it checks the next character and, accordingly, sorting, depending on the sign of the symbol.

In block 43 is the analysis of the sign of the sign of the symbol "CS". If LC=0" (the symbol of the positive), then download this character in OSU block BS (Fig.5). If LC=1 (sign symbol negative), then download this character in OSU block BS.

In block 44 command: "PO/SC:1", "WK:0" to supply control signals from the control unit to the input OSU block BS, which corresponds to the recording mode. Command: "ASU:DIA", OSW:SU" to load in OSU block BS the next symbol, the sign of which is equal to one, corresponding to this is the control unit to the input OSU block BS (Fig.5), this corresponds to the recording mode. Command: "ASU:TSA", "OSU:SU" to load in OSU block BS the next symbol, the sign of which is equal to zero, corresponding to this symbol address (Fig.5).

In block 46 algorithm command: "PO/SC:1, "BK1:0" to supply control signals from the control unit to the input OSU unit BACS (Fig.4), which corresponds to the recording mode. On the command "OSU:AU" to load OSU unit BACS (Fig.4) the next information block BSA (Fig.1).

In block 47 of the algorithm is the analysis of the sign "P". This characteristic corresponds to the multiple entry of the same symbol. If "P=0" in the changeover algorithm on the block 7. If "P=1", then reads the information from OSU unit BACS (Fig.4).

In block 48 algorithm command: "PO/SC:0". "BK1:0:" to supply control signals from the control unit to the input OSU unit BACS (Fig.4), which corresponds to the reading mode of OSU information. On the command "GO:1" supplied to the input of the register-counter unit BACS (Fig.4) clock pulses. On the command "WG-SC:desm" is receiving a register-counter information of OSU block 4.

In block 49 algorithm command: "PO/SC:1", "BK1:0" proishodi in OSU, on the command "OSU:ICS" is an entry in OSU unit 4 information "ICS" at the same address that was read from RAM. This operation is necessary to count the number of identical symbols. In OSU block 4 contains information about the number of identical symbols: when this "ICS:desm+1". A sign of the same symbol is an appeal to OSU unit at the same address. The data on the number of the same symbols are incremented by one.

In block 50 of the algorithm is the analysis of the sign of empty buffers "FSP". If the buffers OSU unit 5 and OSU unit 6 is empty, then this is a sign of the end device, this will navigate to 68 block algorithm. If the buffer RAM blocks non-empty, it means the presence information, this implies the continuation of the operation.

In block 51 algorithm command: "SIH:1", "SIG:1" supplied clock-inputs of the counter device (Fig.1,4,5).

In block 52 of the algorithm is the analysis of the sign "CED" there is information in OSU unit 4 (Fig.4). If "THD:0", the buffer OSU block is empty, this will navigate to the block 53 of the algorithm. If "THD:1", the buffer OSU unit 5 non-empty, with proishodzdenie memory device.

In block 55 algorithm command: "GO:1" is supplied from the control unit to a summing input of the counter SC unit 4 (Fig.4), the clock pulses CW/CC:0", "BK1:0" to supply control signals from the control unit to the input OSU unit 4, which corresponds to the read mode information from OSU.

In block 58 algorithm command: "GHIS:1" is fed to the summing input of the counter SC unit 4, the clock pulses CW/CC:1", "BK2:0" is fed to the control inputs OSU unit 4 signals from the control unit, which corresponds to the recording mode information, "OSU:desm"- this command has been supplied to the input data OZU information "DES", if this information is recorded in OSU block. When this occurs, the transition to the block 52 of the algorithm.

In block 53 of the algorithm is the analysis of the sign "KOI" there is information in OSU unit 5. If "KOI=0, then there is a further reading of information from OSU if "KOI=1", then this is the recording of this information in OSU unit 5 (Fig.5).

In block 56 algorithm command:"GO:1" occurs: supply from the control unit to a summing input of the counter SC unit 5 (Fig.5) clock pulses, "LC/SC:0", "WK:0" to feed control signals to Komanda: "GI:1" is fed to the summing input of the counter SC unit 5 (Fig.5) clock pulses, "LC/SC:1", "WK: 0" is fed to the control inputs OSU unit 5 signals that corresponds to the recording mode information in OSU block, the command "OSU:GVA" is filing the information signal "GVA" input data OZU, when this information is recorded in OSU block.

In block 54 of the algorithm is the analysis of the sign "KPI" there is information in OSU unit 6. If "KPI=0", then transitions to block 61 of the algorithm (all information with OSU in OSU unit 6 rewritten). If "KPI=1", it means that OSU is more information and it is necessary to rewrite in OSU block.

In block 57 algorithm command: "GO:1", "PO/SC:0", "WK:0" is the supply of clock pulses to a summing input of the counter unit 6, OSU block is in the read mode information from memory.

In block 60 algorithm command: "GO:1", "PO/SC:1", "WK:0", "OSU: add" is fed to the summing input of the counter clock pulses. OSU is in the recording mode information. Input data memory receives information signal "add", this information is recorded in OSU unit 6.

In block 61 algorithm command: "CRC:1, SYN:1" to supply enabling signal on reception informatic control unit.

In block 62 of the algorithm is the analysis of the sign "CUE" command (control switch). If "KUP=0", then the register RG unit 6 BOP information is loaded symbols having the characteristic mark of zero. If "KUP=1", then the register RG block BOP information is loaded symbols having the characteristic sign of the discharge unit.

In block 63 algorithm command: "RG:UPM", "GLC:0" is loaded in the register RG unit 7 characters with sign sign zero. The trigger characteristic HRC block BOP is set to be zero.

In block 64 algorithm command: "RG:WMV", "GLC:1" is loaded into the register RG unit 7 characters with characteristic unit. The trigger of this characteristic TZN BOR is set to be a unit.

In block 65 of the algorithm on the command "SC:NPV" is loaded into the counter midrange unit 7 information from unit 4, which contains information about the number of identical symbols received from the input unit (Fig.4).

In block 66 register commands: "GO:1", "ARC:1", "UMS:RG", "GLC:PMC" is the supply of clock pulses to the subtractive input of the counter midrange unit 7, the supply to the input data output from the register RG enabling signal, information from the register RG is fed to an information output device, to the ptx2">

In block 67 of the algorithm is the analysis of the sign "FAC" information counter in the midrange unit 7. If "FAC:0", then the transition occurs at block 62 of the algorithm. If "FAC-1", it means that the counter is non-empty and is displaying the characters up until the counter is not reset to zero.

The device is sort of characters is as follows.

External control signals "START" and "RESET" are received in the control unit 8. The input channel of the device is the interface on which it receives the characters that you want to rearrange. The input data are simultaneously supplied to the units: coded and determine the address, sort - first, sort the second.

The basic idea of the device is as follows: on input device for sorting characters entered character information in the block encryption and definitions addresses is the multiplication of the input symbol with a constant. The constant is chosen in advance. The result of the multiplication is a memory address which will be written to the input symbol. As the memory is used efficiently-access memory (RAM). RAM address work character and constants. Data RAM character. If the input device receives n is sakovych characters. When issuing an ordered array of symbols, each symbol is as many times as was recorded in block 4 frequency characters. In the first position of the symbol contains the information about the sign of the symbol. If the first bit is "0", then this symbol is recorded in the finisher first. If the first bit is "1", then this symbol is recorded in the second finisher.

Unit 2 encryption and determine the address runs as follows.

The input information is fed to the input of the encoder, the output of the encoder is binary information. The first bit of the character received at the input of D-flip-flop and sets it down depending on the sign of the symbol. The zero output symbol is the sign sign zero, the unit output symbol is the sign of the sign unit.

The signal "CS" (the output of D-flip-flop) characteristic symbol to the input of the control unit. This signal is the beginning of the operation. Upon arrival of the control unit 8 (Fig.1) the command "HRH" command permissions record is written to the binary code of the character in the matrix multiplier. On the command "KOP" command, the operation is the multiplication of the binary code symbol with a pre-recorded in a matrix multiplier konstepidemin address. The decoder determines the sign of the end of the character array. The signal "RMB" terminator array of characters coming into the control unit, is rewriting information from OSU in OSU blocks: sort first (Fig.5), sorting the second frequency characters (Fig.4). The signal "CS" to the input of the switch 3 (Fig.1).

Switch 3 operates as follows.

Group elements And work in key mode. Managing input elements is an information signal "TSA" received at the address input OSU finisher first (Fig.5). If LC is equal to unity, the output switch is information signal "Dia", coming on the address input OSU finisher second. For informational inputs items And enters information signal "AC" from the block encryption and definitions addresses.

Block frequency characters (Fig.4) works as follows.

Preliminary entry OSU is recording the zero information. The work unit is counting the number of identical symbols. If the same characters are sent to the input device repeatedly, every time read the information on the number of receipt of a character from OZ the Nala "as" from the block encryption and definitions addresses, through the scheme, OR supplied to the address input OSU block. Upon arrival of signals from the control unit 8 "inq"/SC:0" and "BK1:0" is read information about the number of received characters "DES". On arrival signal "SUB=0" of the block control register-counter RF MF has previously been reset to zero. On arrival signal "GI=1" from the control unit is the sum of information "DES" with the unit. Information signal "ICS:desm+1". The modified signal ICS" is fed to the input data OZU and recorded at the same address in memory. The joining unit 8 management of end-of-character array "PCM" from the block 2 encryption and determine the address is rewriting information from OSU and OSU unit for compact storage and for the accelerated reading information from OSU. Upon arrival of the unit 8 of the control signal "SUB=0", the counter 18 has previously been reset to zero. The counter 18 is synchronized with the signal "SIG" from the control unit. On coming out of the block control signal GI=1" is formed by the counter 18 address read "FAS" through the circuit OR1 information from OSU. When the control signals "PO/SC=0", "BK1=0, which corresponds to the read mode. On arrival signal CED-1" in block 8 of control occurs, the record information is WLAN. The counter 19 is synchronized with the signal "SIG". On arrival signal "GHIS= 1" is the formation of an address-of-record in OSU. "LC/SC=1", BK2= 0, which corresponds to the recording mode. Information output OSU "DES" is fed to the input data in OSU, coming from unit 8 of the control signal "GI= 1" reads information from OSU. "LC/SC=0", "BK2=0". The reading mode of OSU occurs simultaneously from all RAM blocks: sort-first, sort the second frequency characters. The information output unit 4 frequency characters "NPV" entered in block 7 of the organization substitutions (Fig.1).

The finisher works as follows.

In this block 5 is the recording of characters corresponding to each symbol addresses. At the entrance of the finisher of the first received symbols, the first level which is equal to zero. The information signal VS supplied from the input channel to the input data RAM finisher first. The address inputs OSU unit receives an information signal "TSA" through the element OR1. Upon arrival of the unit 8 control signals CW/SC=1", "VK=0, which corresponds to the write mode, the data is "sun" written by its address "TSA" in OSU, the joining unit 8 control (the key first (Fig. 5). To do this, the signal SOB" from the control unit 8 pre-counter addresses SO was zeroed. To the input of counter SC do sync "SICH" from the control unit 8. On arrival signal "GI=1" occurs, the supply of clock pulses from the control unit 8. "CC/SC=0", "VK=0, which corresponds to the mode of reading data from OSU. On the basis of information in the output OSU "KOI=1", write data in OSU block. On the command "SOB" from the control unit 8 pre reversible counter SC was zeroed. On With the meter inlet SC do sync "SICH". On arrival signal "GI=1" at the summing input of the counter SC receives clock pulses from the control unit 8 (Fig.5). These signals are "inq"/SC=1", "VK= 0, which corresponds to the write mode, write data "GVA" from OSU in OSU. If the overwriting is completed, it is coming from the block 8 control signals CW/SC=0", "VK=0, which corresponds to the mode of reading data from OSU. On arrival at the subtractive input of the counter SC signal GI=1" read data from OSU finisher first (Fig.5). Information signal "USP" is an output signal of the block. The element OR NOT determines the sign of "BPS= 1" that the memory buffer is empty. All data in the logical block of the second sort. The difference lies only in the fact that the block sorting arranges the second character, the first bit is equal to one. The finisher the second contains the operational storage device OSU and OSU, counter addresses SC, reversible counter SC, element OR1, element ILI, the element OR NOT. The counters block SC and SC pre-reset signal "SOB" on the state clock inputs of the counter SC served sync "SIH" counter SC clock "SICH". These signals come from the control unit 8 (Fig. 1). The signals CW/SC=1", "WC=0" (write mode) input "SU" is written in the corresponding addresses "DIA". Upon arrival of a signal in the control unit 8 terminator character array, is the process of rewriting information from OSU in OSU unit 6 of the second sort. The signal "GI= 1" generated read address. The signals CW/SC=0", "WC=0" is read from memory. If there is information on the output OSU, the sign "KPI= 1", write data in OSU block. On arrival signal "GI=0" are generated by the counter SC address write data "GVA" in memory. The signals CW/SC= 1", "WC= 0" (write mode). Mode read data "SAR" from OSU is the signal "GI=1" coming to the subtractive input of the counter SC. the memory buffer is empty.

Unit 7 organization lookup is an output unit of the device, it generates a sequence of ordered symbols. Each character in the output is assigned to its sign. For informational inputs of the first group of elements I1.It receives an information signal "UPS", which is the output of the second finisher. For informational inputs of the second group of elements I1.It receives an information signal "SAR", which is the output of block 5 of the sort

second. On arrival signal "CUE" from the control unit 8 (Fig.1) select the issuance of ordered arrays. If "KUP=0", the output unit 7 organization of the first lookup will be an array of characters, with the characteristic zero, D-trigger the Heater will be set to zero. If "KUP=1", the output of the block will be an array of characters with a single sign, L-trigger TZN will be installed in the unit. On arrival signal "CRC=1" command from the control unit 8 is receiving in the register RG29 information from the outputs of the group of elements OR1.ILI. The signal "SYN=1" occurs, the supply of clock pulses to the input of the register RG. On arrival signal "ARC=1" issue commands from the control unit 8 is displaying the characters of the register RG. The number of issuance of each SV zero, the CQ counter was previously set to zero. Information signal "NPV" frequency of repetition of characters is input counter CQ. Upon arrival of a signal from the control unit 8 "GI=1" subtractive input of the counter SC is the subtraction unit of the binary value "NPV". Element OR controls the distribution of the number of characters from the register 29. If FAC=0", then the issuance of this symbol to stop. If FAC=1", then the character to give up until "FAC" is not equal to zero. Information signal "UMS" is an external output device. The signal "GLC" character code of the character corresponds to the character symbol "GLC=PMC". TTT 2

The device is sort of characters containing the switch, unit organization, lookup the control unit, characterized in that it further introduced the input channel, the block encryption and determine the address of the first finisher and the second finisher, block frequency characters, and the first to the third control outputs of the control unit are connected respectively with the first through third control inputs of the block encryption and determine the address of the first control output of which is connected with the control input of the switch and the first Manager of the input control unit, the fourth and FIF the population frequencies of the symbols and the first and second control inputs of the first finisher and with the first and second control inputs of the second finisher, the first information input of which is connected with the information output input channel information input unit encryption and specify the address with the first information input of the first finisher, the information output of which is connected to a second information input unit organization lookup, the third information input of which is connected to the information output unit frequency character information input connected to the first information output switch, the second information, the output of which is connected with the second information input of the first finisher from the third to the tenth control inputs which are connected respectively from the sixteenth to the twenty-third control outputs of the control unit, the fourth and fifth control inputs which are connected respectively with the first and second control outputs of the first finisher, the first information output switch connected to the second information input of the second finisher, from the third to the ninth control inputs which are connected respectively with the twenty-fourth through the thirty-first control outputs of the control unit, the sixth and seventh control pharmacienne the output of which is connected to the first information input unit organization lookup from the first to the sixth control inputs which are connected respectively with the thirty-second through thirty-seventh control outputs of the control unit, from the sixth to the fifteenth control outputs which are connected respectively with the third through twelfth control inputs of the block frequency of symbols that controls the output of which is connected with the third managing control unit, tenth managing the progress of which is connected to first control the output unit of the organization lookup, the second control output is output characteristic symbol device, an information output unit of the organization of the lookup is the output of the character array device, the second control output of the block encryption and determine the address connected with the second Manager with control unit, the eighth and ninth control inputs "start" and "Reset" block suppression are the corresponding inputs of the device.

 

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SUBSTANCE: system contains user control device, device for storage and checking of certificates and centralized control device, consisting of device for registration of system user, decoding block, encoding block, device for controlling operation process, device for storage, classification and searching for ordered data, device for forming and storing data about system users, device for registration of ordered data and device for controlling and analyzing operation.

EFFECT: expanded functional capabilities and increased level of protection from unsanctioned access to system.

8 cl, 11 dwg

FIELD: information technology.

SUBSTANCE: system for communication between people includes a sending computer system, receiving computer system and a web-site for translation. The sending system is capable of detecting the first natural acceptable language associated with sender and the second natural acceptable language associated with recipient. Languages being different, the system is capable of sending the information into translation system for translation. The address of the receiving system is sent together with the above information. The information is translated and sent by the translation system to the recipient. The first and the second languages coinciding, the information is sent directly to the recipient. The recipient compares language of the incoming information with the recipient language and, if needed, sends the information to the translation web-site for translation and rollback.

EFFECT: wider possibilities of transferring messages for translation.

56 cl, 9 dwg

FIELD: information technology.

SUBSTANCE: present invention relates to translation from one language to another. Wireless mobile device service is provided with a service for selective downloading information from the server. The downloaded information includes the architecture of the translation, which has means of translating, independent of language, and at least one language dependent translation database. The translation data base which depends on the language includes translation templates and dictionary translations. It can also load specialised database for the chosen city or cities in the world. Translation between languages is carried out through the application of translation database in the means of translating which depends on the language and translation database, specific to a particular city. For simplification of translation process the means of translation implements a user controlled scheme for replacing terms.

EFFECT: invention increases quality and convenience of text translation in a natural language.

24 cl, 5 dwg

FIELD: physics; computer engineering.

SUBSTANCE: invention relates to machine translation. The method of providing information to an automatic machine translation system for increasing translation accuracy involves reception of initial text. A sample translation corresponding to the initial text is received from the automatic machine translation system. Correctional information is also used, which is configured to correct at least one error in the sample translation. At the final step the automatic machine translation system is provided with information for reducing probability of repetition of the error in the next translations made by that system. The said information is embedded in the automatic machine translation system.

EFFECT: invention increases machine translation accuracy.

38 cl, 11 dwg

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