Sign correlates

 

(57) Abstract:

Usage: in computing for measuring significant correlation function of the analyzed process at a certain time interval. The inventive sign correlates converts signals random functions X (t), Y (t) in the sign signals X (t) sign Y (t) measurement in the interval T with a time increment t, and calculate n values significant correlation function the measuring Principle consists in the accumulation of sign signals X(t) sign Y(t) with log levels "1", if X(t), Y(t) > 0, and log. 0 if X(t), Y(t) < 0, the interval T, which consists of time analysis of signals T = Nt the formation of parallel N bit code, where each bit represents the information input process, taken with an interval t, the summation coincident with the sign bits of the N bit code signal X(t) shifted by n bits (correlation window) bits of the N bit code signal Y(t) with subsequent averaging over the processing interval N-n, where n is the number of shifts, corresponding to the correlation interval, and calculating the value of the sign of the correlation function. 1 C. p. F.-ly, 3 ill.

The invention relates to computing and measurement techniques and can be used by AI.

A device containing 2 amplifier-limiter, 2 element, And the element is NOT, trigger the pulse generator, key, 2 counters, managed the divisor and one-shot [1] the essence of the operation of the device is to estimate the probability of a change of the sign of the investigated process X(t) with subsequent transition to the estimation of the autocorrelation function through the use of additional equipment. The operation of the device is to convert the input signal X(t) in function of the type sing X(t) through the use of the amplifier-limiter.

The signal that exceeded the threshold from the output of the amplifier-limiter, with the level of the log. "1" is supplied to one of the components And, as with the level of the log. "0" after the item is NOT served on the other element And second input which serves the clock pulses from the output of the generator. Depending on the sign of the signal X(t) at the outputs of the elements And will receive the clock pulse, which will affect the trigger. Every time a state change trigger the one-shot will generate a pulse, and the analysis interval T n pulses, which are counted by the first counter. The second counter counts the analysis interval T, consisting of N clock pulses.

However, this device does not allow the Orval correlation, if the sampling time of the analyzed process corresponds to the time change of the repetition period of the clock pulses. This disadvantage does not allow to use this device for analysis of process constraints stationarity of the input signal.

Closest to the invention in its technical essence is a landmark correlated (2), containing two amplifier-limiter, clock, two inverters, two elements And two delay elements, the element of comparison, consisting of two elements and one element OR the frequency divider, two meter, key switch, and trigger one-shot. Finding estimates of the probability of a change of signs (sign of the correlation function) is performed by counting pulses corresponding to the change of signs of the Y signal relative to the signal X to determine the probability of this event, which can be found mutual correlation time.

It is known that in the radiolocation and radionavigation eat values (record) of the reflected signal is produced by each sensing period in the quanta-range form of the detection zone. Practically, this means that is used for analysis tutu insti antenna. The known device organized in such a way that allows for one interval of the correlation calculation values of the autocorrelation or intercorrelation function at the time of receipt of the analyzed process, defined by an insignificant number of pulses calculated by the formula N , where Qowidth DN; Fn repetition frequency of pulses; rotation speed DN.

However, when we solve the recognition task, requiring the determination of the correlation interval, it is necessary to have multiple y-correlation function. The specified device is not possible in the case that a time sample of a random process with a time change adjustment of clock pulses to obtain multiple estimates of the probability of change characters during the receipt of the analyzed process, which reduces the accuracy of the estimate of the correlation function in terms of the limit of stationarity of the process.

The invention consists in the analysis of values of a random process X(t) with frequency F , with the aim of obtaining estimates significant autocorrelation or mutual correlation function on the probability of a match characters. What input process sing X(t) 0 if X < 0, and is converted into N parallel bit code, where each bit represents the information input process, taken with an interval t. The first value of the probability of a change of character, as well as subsequent values are determined are calculated by calculation according to the law of Boolean algebra the product of the N bit input of the process and its shifted copy with simultaneous accumulation as the result of their matches with a minus sign. The values of the calculation results obtained in the process of finding the next value of the probability of matching characters, averaged over the interval N, where n is the number of shifts corresponding to the correlation interval, represent the assessment of significant correlation function of the analyzed process with various (n) intervals of the correlation.

A technical advantage of the proposed device in front of the known technical solutions and device prototype is to improve the accuracy of estimating the probability of a change of character of the process under investigation due to the dimension m of its values in terms of the limit of stationarity of the process under investigation while calculating the symbolic evaluation of the correlation function.

The technical effect of the proposed use of relational functions usually boils down to the definition of R () N ravenousness points split step delay (correlation window). Usually compute R() to produce until Rmax) 0,05 R(0). The number of y-m correlation function is defined inmaxthe studied process and the relation

m +1 (1)

It is known that determined practically only a valid approximation error of the correlation function and the upper frequency range, i.e.

(2) whereathe approximation error.

Substituting (2) into (1)

m (3)

Thus from (3) it follows that it is possible to improve the accuracy assessment of the correlation function due to the increase of the calculation amount (m ) ordinate of the correlation function with a fixed number of values of the investigated process taken for analysis of the correlation function.

In Fig. 1 presents a landmark correlated, which shows input 1 data set the initial conditions, input 2 sync input 3 start the device, input 4 random functions X(t), input 5 random function Y(t), input 6 sync generator 7 clock pulses, the amplifier-organical 8 (for example, IC SA), the shift register 9, the amplifier-limiter 10 (for example, IC SA), the shift register 11, a register 12, a counter 13, a trigger 14, change the number, the counter 20, the decoder "0" 21, item 22 comparison, the And gate 23, the And gate 24, and a reversible counter 25, block 26 dividing the output 27 of the data values of the probability of coincidence of the marks and the output 28 of the data values of the correlation function.

In Fig. 2 presents an example implementation of block 26 division, which shows the multiplexer 29 (for example, IC KP), the first main transmitter 30 (IC IP), the encoder 31, the divider-multiplier 32 (for example, BIS VR) and the main transmitter 33 (IC IP).

In Fig. 3 shows the control block 17, which also shows the elements And 34-37, item, OR 38, elements, And 39-43, elements OR 44-47, the register 48, the And gate 49 and the item OR 50.

Sign correlates contains the generator 7 clock pulses, the amplifier-limiter 8, the inlet of which is the entrance 4 devices X(t), the amplifier-limiter 10, the inlet of which is the entrance 5 of the device Y(t), the shift registers 9 and 11, two two-input element And 23 and 24, the trigger 14, the counter 13 and 20, the first element 22 comparison 22, shift registers 15 and 16, the reversible counter 25, the decoder "0" 21, the register 12, the element 18 comparison element 19 define a larger number, block 26 division and unit 17 management, first input connected to the inputs of the block is connected to the output of the generator 7 clock pulses, the inputs of the synchronization shift registers 9 and 11, the inputs of the synchronization of the parallel input of the shift registers 15 and 16, a synchronization input unit 26 dividing the input of the synchronization unit 17 of the control, a second input connected to the signal output unit 26 of the division, the input to the load which is connected to the sixth output unit 17 of the control, the seventh output of which is connected to the input unit 26 division, entrance reading of which is connected to the eighth output unit 17 controls the first output of which is connected to the input of zero reversible counter 25 and subtractive input of the counter 13, a parallel output of which is connected to a second input element 18 comparison with the input argument fewer element 19 define a larger number, with input argument divider unit 26 dividing the input argument dividend which is connected to the output 27 of the data values of the probability of matching characters, which is the output of the reversible counter 25, a subtractive input connected to the output element And 23, the first input connected to an inverted output of the element 22 comparison, the direct output of which is connected to the first input element And 24, the second input of which is connected to the second input element And 23 and the fifth output unit 17 bolshego the number of which is connected to the input of the decoder "0" 21 and parallel output of the counter 20, summing input connected to the synchronization input serial input shift register 16 and the fourth output unit 17 of the control, the third output of which is connected to the synchronization input serial input shift register 15, the serial output of which is connected to its serial input and the first input element 22 comparison, a second input connected to the serial input and serial output shift register 16, a parallel input connected to the parallel output of the shift register 11, a serial input connected to the output of the amplifier-limiter 10, and the output of the amplifier-limiter 8 is connected to the serial input of the shift register 9, a parallel output of which is connected to the parallel input of the shift register 15, with a parallel output of the register 12 is connected to the first input element 18 of the comparison, the output of which is connected to the third input of the control block 17, a fifth input connected to the output of the decoder "0" 21, and the second output unit 17 of the control is connected to the inputs of the zero of the counter 13 and the trigger 14, the output element And 24 connected to the summing input of the reversible counter 25, and the input 1 of dangrously iconic torrelamata, this parallel output unit 26 of the division is output 28 of the data values of the correlation function of sign correlate, the sixth input unit 17 controls the second input 6 of synchronization, and the input of the trigger 14 is input 3 start the device.

Sign correlates works as follows.

The amplifier-limiter 8 converts the input function X(t) in a two-level signal features sing X(t), logical "1" which corresponds to the positive value of the signal, a logical "0" to a negative value. The rear front of the clock pulse generator 7, the value of this signal is shifted in the register 9.

The front edge of each clock pulse the value of the register 9 is overwritten in the register 15, so register 9 each discrete point in time is stored measured value of the function X(t) in the interval T N t, where N is the number of bits of the register 9 and the register 15; t quantum time measurement function, equal to the repetition period of the clock pulses. The same function is performed by the amplifier-limiter 10, the register 11 and register 16 for the function Y(t).

The beginning of the measurement is preceded by the initial setting of "0", which sets the zero state of the counter 13, scetchy n in the register 12, which is the installation code output 1 data set the initial conditions and the signal on input 2 sync.

Measurement start feed signal to the input 3 of the start signal. This leads to the fact that the falling edge of the clock pulse sets to "1" trigger 14, which blocks overwrite the value of a function X(t) and Y(t) in the shift registers 15 and 16, getting to the first input of the control unit produces its launch.

Timing diagram of the control block 17 is divided into quanta t1-t8and the first output of the excitation in the quantum t1, in the second step of t7third in tact t3fourth cycles t1and t3fifth step of t2the sixth step of t5, the seventh step of t6eighth in tact t7ninth in tact t8.

The operation control unit after its launch begins with the fact that produced the beat of t1on his first, fourth outputs, this installs "0" reversible counter 25, subtracts one from the counter 13, which establishes a code N 1 and moves the code in the shift register 16 by one digit, as a result, since the subsequent discharge, the registers 15 and 16 are the values of the functions: X(t1), Y is the actual outputs of these registers function values X(t1), Y(t1+ +1), which receives the inputs of the first comparison element, the outputs of which take the values: direct output is the value of X(t1) Y(t1+1) inverted output X(t1) Y(t1+1), tact t2these outputs are painted through the elements And 23 and 24 and generates a pulse depending on the values of these outputs to a summing or subtractive input of reversible counter 25.

In step t is the shift code registers 15 and 16 on one digit, the last digit registers are installed, respectively, the values of X(t2), Y(t2+ +1). Next is the pulse at the input of the second counter 20 and as in the previous case, the tact t2served pulse on totalizer or subtractive input of reversible counter.

The cycle that includes the shift of the bits of the registers 15 and 16, the summation of the shift pulses to the counter 20 and the accumulation amount in the reversible counter 25 continues as long as there remains a divide - > D, where the value of the counter 20, is equal to N i, D a value of the first counter 13, is equal to N 1, the reversible counter accumulates the value of the sign X(ti) sign X(ti+1), is equal to the probability of a match marks (i(gn X(ti2and continues to develop in tact t3pulses registers 15 and 16 until then, will not be issued until N pulses, the second counter 20 is reset to zero, which is detected by decoder "0" 21, and registers 15 and 16 will be given in the initial state values of the last digits sing X(t1), sing Y(t1+1), and the block 17 of the management under the influence of the output signal of the decoder "0" 21 in tact t5issues in block 26 dividing the signal load, which in block 26 division recorded argument dividend with a significant digit reversible counter equal sign X(ti) * sign Y(ti+1and the argument of the divider from the first counter is equal to N-1. In tact t6produces a pulse division and after the end of the division operation defined by the ready signal unit 26 in step t7the signal reading unit 26 fission, which is the result of the division, is equal to Kxy(1) sign(ti) * sign(ti+1), is installed at the outlet 28 of the device.

Then starts the calculation of the next value of the function Kxysign X(t1) * sign Y(t1+2starting with the so-TA t1.

After calculating the value of the options is ketchika 13, the change of the signal level at the output of the trigger 14 indicates the end of the calculation functions of Kxy(n) sign X(t1) sign Y(t1+n), when this happens unlock record function sing X(tiand sing Y(tiin the registers 15 and 16.

Unit 17 functions as follows. In the initial state of the register 48 is "0". The output element And 34, on the inverse input of which receives the zero value of the bits of the register 48, is in the state "1". Upon excitation of the first input of the control unit at all entrances element And 35 are set to the values "1" and through the first element OR excited by input the first digit of the register 48, the cutting edge of the synchronizing pulse in the first bit is written to "1", the outputs of the element And 34, item 35, item, OR 44 and input the first digit of the register 48 are set to "0" and the input of the second digit of the register 48 is set to "1", while the produced signals of the first stage t1and excited the first and fourth outputs of the control unit. Following a sync pulse is written to"0" in the first digit of the register 48 and "1" in the second category, the entry of the third digit has the value 1, all other bits are "0", produced the beat of t2poetlister 48, excited for the third and fourth outputs.

In the absence of signal in the fifth and fourth inputs is written to "1" in the fourth digit of the register and repeats the beat of t3. When there is no signal on the fifth and the presence of a signal at the fourth input of the repeated measures t2and t3and when the presence of a signal on the fifth input of the control unit writes "1" in the fifth digit of the register 48, generate signals tact t5and excited by the sixth output unit 17 of the control, the next sync pulse signal is produced tact t6i.e. is written to "1" in the sixth digit of the register 48 and excited seventh output unit 17 controls. When the signal on the second input unit 17 controls the cutting edge of the sync pulse is written to "1" in the seventh digit of the register 48, produced the beat of t7and excited eighth output unit 17 of the control.

In the same measure in the presence of signals at the third and sixth inputs of the control block 17 is excited by the second output unit 17 controls. Following a sync pulse is generated tact t8. The same sync signal exists on the sixth and the absence of the third input unit 17 of the control is written to "1" in the first digit of the register 48 with the repetition of the register 48 is written "0". Thus the bits of the register 48 are in the zero state, which corresponds to the initial state of the unit 17 of the control.

Using existing technology, components and materials, the proposed device is relatively easy and can be made in production that characterizes the object of the invention as industrially applicable.

Was made a sample of the proposed device, tests confirmed the achievement of specified technical effect.

1. SIGN CORRELATES comprising a generator of clock pulses, first and second shift registers, two elements And two counters, the trigger and the first and second amplifiers, limiters, the inputs of which are respectively the first and second information inputs correlate, characterized in that it introduced the third and fourth shift registers, a reversible counter, the decoder "0", the register, the first and second elements of comparison, the element defining a larger number, the block division and control unit, first input connected to the inputs of block synchronization of the parallel input of the third and fourth shift registers and direct trigger input synchronization which Hausa registers, to the inputs of the synchronization of the parallel input of the third and fourth shift registers to the inputs of the synchronization unit and a control unit, a second input connected to the information output unit, the input to the load which is connected to the first output control unit, the second output of which is connected to the enable input of the division unit, the input to the reading of which is connected to the third output of the control unit, the fourth output of which is connected to the input of zero reversible counter and a subtractive input of the first counter, the output of which is connected to the first input of the second comparison element, input argument fewer element defining a greater number and with the input argument of the divider block division, the sign of the argument of the dividend of which is connected to the output data values of the probability of a match marks correlate and reversible counter, a subtractive input connected to the output of the first element And the first input connected to an inverted output of the first element of comparison, the direct output of which is connected to the first input of the second element And a second input connected to the second input of the first element And the fifth output control unit, the third on is connected to the input of the decoder "0" and the output of the second counter, summing input connected to the synchronization input serial input of the fourth shift register and the sixth output control unit, the seventh output of which is connected to the synchronization input serial input of the third shift register, the serial output of which is connected to its serial data input and the first input of the first comparison element, the second input is connected to the serial data input and serial output of the fourth shift register, parallel information the input of which is connected to the parallel output of the second shift register, serial data input connected to the output of the second amplifier-limiter, and the output of the first amplifier-limiter connected to the serial data input of the first shift register and the parallel output of which is connected to the parallel information input of the third shift register parallel output of the register is connected to a second input of the second element of comparison, the output of which is connected to the fourth input of the control unit, a fifth input connected to the output of the decoder, "0", the eighth output control unit is them entrance reversible counter, the reference input of the initial conditions of torrelamata is parallel to the information input of the register, the synchronization input is the first input synchronization correlate parallel to the information output unit is an output data values of the correlation function of torrelamata, the sixth input of the control unit is a second input synchronization torrelamata, data input trigger is starting correlate.

2. Correlated under item 1, characterized in that the control unit contains ten elements, And the six elements, OR register, the outputs of the bits which are connected with the corresponding inverted inputs of the first element And whose output is connected to the first input of the second element And whose output is connected to the first input of the first element OR the second input connected to the output of the third element And the first input of which is connected to the first inputs of the fourth and fifth elements And with the release of the seventh digit of the register, input the first digit of which is connected to the output of the first element OR the second category of information input connected to the output of the second element OR the first input connected to the output of the sixth element, And vtoro the RA, the third category of information input connected to the output of the fourth element, OR the first input connected to the output of the second discharge register and the second input with the output of the fourth digit, the fourth digit information input connected to the output of the seventh element And the first input of which is connected to the first input of the sixth element And with a second input of the third element OR to the first input of the eighth element And with the release of the third digit fifth digit information input connected to the output of the eighth element, And the sixth bit data input - the output of the fifth element OR first input connected to the output of the fifth digit, and the second input - output ninth element And the first input of which is connected to the first input of the tenth element And with the release of the sixth digit, the seventh digit information input connected to the output of the sixth element, OR the first input connected to the output of the tenth element And the second input with the output of the fourth element And the second input of the second element And the first input unit, the second input of the tenth element And connected to the negative input of the ninth element And is totwenty entrance control unit, the second input of the sixth element And is connected to a second input of the seventh element And is the third input unit, and an inverse input of the sixth element And is connected to the third input of the seventh element And with a second input of the eighth element And is the fifth input unit, the second input of the third element And connected to the negative input of the fourth element And the third input of the fifth And sixth input unit, the synchronization input of the register is the seventh input unit, the output of the first digit - the fourth output unit, the output of the fifth And the eighth output unit, the output of the third element OR the seventh output unit, the output of the third digit, the sixth output unit, the output of the second digit of the register - fifth output unit, the output of the fifth digit is the first output unit, the output of the sixth digit is a second output unit, the output of the seventh digit is the third output block.

 

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