Digital correlator

 

(57) Abstract:

The invention relates to devices of automatics and computer engineering and can be used in correlation extreme systems such as television-correlation. The aim of the invention is the expansion of functional possibilities of the digital correlator, for example, measurement of kinematic parameters during reverse movement of the input source. This goal is achieved by organizing a delay line for storing information human decomposition, for example, input image, by introducing an additional channel processors and multiple logical elements. The correlator includes a delay unit, decoder, comparator, counters, registers, elements AND, OR, NOT and channels of information processing, each of which consists of element And, counter, block keys and block multiplication. 3 Il.

The invention relates to automation and computer engineering and can be used in correlation-extremal systems.

Known digital correlator containing N-bit (number of channels) digital delay line, the first and second triggers, the first element OR, as well as in each channel block multiplication of canalin the surrounding counter, the frequency divider, the key, the switch element And the second element OR the control unit, the first input of which is connected to the output of the first element OR the first output control unit connected to control inputs of the registers, setting the inputs of which are connected with the first input of the second OR element and to the first input of the first flip-flop and connected to the second output of the control unit, the third output of which is connected to a second input of the second element OR the output of which is connected to the first input of the second trigger and installation inputs subtractive counter and frequency divider, the counting input of which is combined with the information input key and connected to the fourth output control unit, the control input key is combined with the second inputs of the triggers and connected to the output of the frequency divider, the output of the key is connected with the control input N-bit digital delay line, the input of which is connected to the output of the switch, the first information and the control inputs of which are connected respectively to the outputs of the N-bit digital delay line and the output of the first trigger, a second information input is the first input device, information input of the first register of seinlekantha And the information inputs of the second register connected to respective outputs of the code Converter, the inputs of which are connected to the corresponding inputs of the first element OR connected to the outputs of the respective channel counters of all the channels set the inputs are combined and connected to the output of the second element OR the counter input channel counter of each channel is connected to the output of the channel element And its channel, the first inlet channel element And each channel is connected to the output of the channel element OR its channel, the second inputs of the channel elements And all channels and the first input element And the joint and connected to the fourth output control unit, the second and third inputs of which are respectively the second and third inputs of the device, the first input channel elements OR all channels and the second input element And the joint and connected to the output of the second trigger, the second input channel element OR each channel is connected to the output of block multiplication of its channel, the input units of the multiplication of all channels are combined and the fourth input of the and second input units of the multiplication of all channels connected to the outputs of the respective bits of the N bit is radnoti and therefore, the complexity is significantly limited performance (due to restrictions on subsidiary operations in line breaks), loss of use, for example, in the device according to ed.St. USSR N 649172 when the reverse speed of the image.

Closest to the proposed to the technical essence is a device containing a counter, one-shot, inverter, ducted counters connected at their inputs channel elements And delay elements, items, And and OR, the digital delay line and connected to the first inputs of channel units multiplication and switch, which is connected with the first and second inputs of the device, and a third input connected to the second inputs of channel units multiplication channel bus shapers, decoder, comparator, and two registers, the outputs of the channel multiplier units through the channel members And connected to the channel inputs of the counters, the outputs of the latter is connected through channel bus shapers to the first inputs of the comparator and the first register, the outputs of the latter is connected to the second inputs of the comparator and the input of the second register, the output of the first element And connected to the control circuits of the digital delay line and the second inputs KD inverter is connected through the third element And to the counting input of the counter, the outputs of which are connected to the corresponding inputs of the decoder and the third register to the input of the fourth register, the output of the overflow of the counter is connected through the element OR to the inputs of the reset channel counter, and the input reset is connected to the fifth input of the outputs of the decoder are connected to the control inputs of the tire shapers, the second input device connected to the control inputs of the second and fourth registers, and with a second input of the OR element and through the one-shot and a delay element with an input resetting the first register, the output of the "greater than" comparator via the second And gate connected to the control inputs of the first and third registers, and second input elements And connected to the fourth input of the device [2]

The lack of both correlators is the inability to carry out measurements on the reverse of the motion image, which is the source of signals to be processed by the correlator, and decreased immunity in the analysis of the image, for example, does not have axial symmetry of the autocorrelation function (which, for example, a certain periodicity in one of the coordinates). Therefore, the disadvantages of the prototype can be considered to be limited phonehouse and enhanced functionality.

This objective is achieved in that the delay line is arranged to store information personnel decomposition of the To strings, for example, images, digital correlator supplemented 2m channel processors that are connected to the taps of the delay line in the area of the joints j, (j + 1) and (K + 1 j) and (K j), j 1,2.m lines, the output of the first element OR connected through a second re-introduced the inverter to the third input of the second element And.

The proposed solution has significant differences from the known, as the new organization of the delay line for storing information personnel decomposition allows you to enter additional channel processors and limit the extremum seeking mutually-correlation function in either direction of movement of the input source information (for example, the image read by the television camera). In addition, the new digital correlator is a low-pass filter with the personnel organization of the analyzed input information that defines his immunity, for example, when analyzing images, PVC which does not possess axial symmetry. When lowercase organization (as in the models and the prototype) this property digital correlator in personnel direction'or the differences expanding the scope of its application. For example, based on it can be created a system for tracking a moving image. The distinctive qualities of this system are invariance to the source of input information and a large amount of data to be processed to achieve high accuracy, sensitivity and reliability.

In Fig.1 shows a diagram of the proposed correlator of Fig.2 scheme of the Central processor of Fig.3 diagram of one channel of information processing.

Digital correlator consists of a Central processor 1, the first case 2, the second register 3, the digital comparator 4, a decoder 5, a counter 6, the first element OR 7, the first element And 8, the second element And 9, the third element And 10, the first element 11, the second element 12.

At the first input 13 is fed the sequence of information pulses, for example, from the amplifier of the television transmitting chamber to the second input 14 (fCA) human impulse to write the base sequence of pulses, to the third input 15 (fkV) human impulse to write the current pulse, the fourth input 16 (fc) lowercase pulses. Clock inv 2 and 3 are formed codes x, y and PWC respectively. The first is a measure of the shift of the image coordinates x (HR direction), y (row direction) for the time interval between fCAand fkVsecond measure extreme values FVC specifying x and y.

The Central processor 1 (see Fig.2) consists of a fourth element, And 19, the fifth element 20, the second element OR 21, the delay unit, for example, To the shift registers 22 to L bits, and (2m + 1) and the channels 23 of the information processing with (2n+1) inputs connected to respective taps of register 22. Moreover, To match the number of rows and L the number of pixel rows (2m+1) number of increments of displacement of the image in personnel direction (x), a (2n+1) in row (y) direction (m and n samples from the original position).

Input bus serves the channels 23 of the reset pulses R in the initial state and the request signals Q1,Q2m+1the output information generated by the channels 23 to the output data bus.

The channel 23 of the information processing (see Fig.3) consists of 2n+1 channels cascaded blocks 24 multiplication, elements And 25, a counter 26 and block 27 keys. The blocks 27 provide parallel codes of the States of the counters 26 on the output bus is AET clocking elements And 25 incoming information from block 24 multiplication.

The correlator operates as follows.

The input signal is at work during vertical blanking (a signal fCAthrough the elements And the elements 20 and 21 is recorded in the delay block, stepping sequence f. The latter is formed from a clock sequence ftsupplied to the input 17, using items, OR 7, AND 8 only during the forward stroke fCAfkVand fc. At the same time is calculated in the channels 23 FVC (more precisely, in this series of measurements of the autocorrelation function). The sequence of pulses television decomposition of frame image signals are multiplied in block 24, the it elements And 25 and summarized in the counter 26. At the end of the Central counter 26 channel 23 calculates the maximum value FVC that corresponds to the zero shift of a sequence of information pulses to corresponding inputs of a channel 23. On the other inputs of all channels are calculated values FVC corresponding to the available shifts and values of the sequence of information pulses from the delay unit. This measurement cycle, if necessary, it can be a reference. On the return stroke fCAand fc(same and psychic 6 with the specified module account which generates code to control the decoder 5. The latter generates a sequence of survey Qiblocks 27 that connects to the output bus outputs of the counter 26, and the reset signal R.

The sequence of codes with the output bus arrives at the inputs of the register 2 and the comparator 4, the latter produces a signal greater than (>) in accordance with the codes on its inputs, and clocked through the element And 10 writes more of the received codes FVC in register 2 and the corresponding channel number of one of the 2m+1 channels 23 in register 3. So is climbing the measuring period to extreme value FVC and its position in the plane of the image being analyzed. Obviously, this position will correspond to x= 0. Reset register 2 in the source is the signal R from the decoder 5.

On the next cycle of operation of the device through the desired number of frames, the signal fkVthat together with the signal provides actuation elements And 19 OR 21 upon receiving a sequence of information pulses in the delay block. Further, the correlator operates on the above-described cycle, providing the calculation and issuance of the x-and y in extreme value FVC on this C is subjected to TC for the duration of the signals fCAand fkV.

The presence of taps from the delay unit in HR (x) and row (y) directions from the original position allows you to define the maximum value FVC with a corresponding shift of the image. Thus, when the image shift is fairly x0; y0 vx= x/t; vyy/t; where t r fCA-1the measuring period;

r the number of frames between fCAand fkV;

vxvythe average speed of the image measuring cycle.

Therefore, compared with the prototype of the proposed digital correlator has significant advantages measurement capability when the reverse movement of the image and greater noise immunity, for example, in the absence of axial symmetry WCF analyzed image.

DIGITAL CORRELATOR containing the delay unit, decoder, comparator, counter, two registers, the first element OR the first element is NOT, the three elements and channels of information processing, each of which consists of the element And the counter block key block multiplication, and in each processing channel information output unit multiplication connected to the first input element And this channel of information processing, the output of which is connected DG unit keys of his channel information processing, the outputs of blocks of keys of all channels of information processing connected to the first input of the comparator and an information input of the first register, the output of which is the output value mutually correlation function of the correlator and is connected to a second input of the comparator, the output of the "More" which is connected to the first input of the first element And whose output is connected to synchronator second register, the output of which is output measures the shift of the image coordinates of the correlator, an information input connected to the first inputs of multiplier units, the output of the counter is connected to the information input of the second register and the input of the decoder, the outputs of which are connected to control inputs of blocks of keys, the outputs of the delay block is connected to the second inputs of multiplier units, the output of the first element is NOT connected to the first input of the second element And whose output is connected to the counting input of the counter, the clock input of the correlator is connected to the second input of the second element And the first input of the third element And whose output is connected to second inputs of elements And all channels of information processing, characterized in that it introduced the second element is NOT, two element And the second element OR the output to the output of which is connected to the second input of the first element And the reference input lowercase pulse correlator connected to the input of the first element, the third input of the third element And the first input of the fourth and fifth elements And the outputs are connected to the inputs of the first element OR the output of which is connected to the input of the delay unit and the second input of the multiplication of the corresponding channel information processing, the clock input of the delay block is connected to the clock input of the correlator, the input to the zero of which is connected to alnoaimi inputs of counters channels of information processing, engraved first register connected to the corresponding output of the decoder, the reference input of human impulse to write the base sequence of pulses correlator connected to the first input of the second element OR the second input of the fourth element, And the third input of which is connected to the information input of the correlator, the input of human impulse to write the current sequence of pulses of which is connected to the second inputs of the second OR element and the fifth element, And the third input of the fifth element And connected to the corresponding output of the delay block.

 

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