Random access memory

 

(57) Abstract:

The invention relates to a storage device of a dynamic type, made in the form of large-scale integrated circuits, and can be used in modern computers and memory devices. In the device entered the dynamic case, the key transistor and the element I. 1 Il.

The invention relates to a storage device of a dynamic type, made in the form of large-scale integrated circuits (LSI), and can be used in today's computers and storage devices.

The drawing shows a functional diagram of the device.

The device comprises a matrix drive 1, built-transistor memory elements, including memory transistors 2 of the memory elements, the storage capacitors 3 memory elements, amplifiers 4 write-read, built on the first 5 and second 6 transistors, capacitors 7 and operational amplifiers 8, dynamic register 9, performed on the transistor 10 and the capacitor 11, the And gate 12, the decoders 13, 14 rows and columns, respectively, the key to the transistor 15, the bus 16 column selection bus 17 select lines, bus 18 to control the output 19 of the registration request, bus 20 I / o data is crimson from the output of the row decoder 13 selects all the elements of the memory strings, for example, the element 171. The output signal from the column decoder, for example, element 161opens the transistor 6 of the corresponding recording-reading 4.

Information signals with the storage capacitor 3 through the open storage transistors 2 of all the memory cells of the selected row of the matrix memory 1 receives the inputs of the operational amplifiers 8 amps write-read 4 and after amplification are memorized in the capacitor 7. External information signal 0 (1) is supplied via the bus 20 through the transistor 5 to the condenser 3-transistor memory element at the intersection of the selected row and the selected column. At the same time overwrites the data in all the memory cells of the selected row, which is equivalent to the regeneration line. In the memory element of the dynamic register 9 corresponding to the selected line through the transistors 15 and 10 are written to the logical level "1".

In the reading mode signal from the output of the row decoder 13, 171selects all the memory elements of one row including the corresponding element in the dynamic memory register 9. Information signals with the storage capacitor 3 through the open napominayushzih amps 8 amps write-read 4 and after amplification are memorized in the capacitor 7. The output signal from the column decoder 14 (for example, 161) opens one of the transistors 6 and information from the corresponding capacitor 7 is supplied to the output device via the bus 20. Then the pulse received on the control bus 18, the capacitor 7 through the transistor 5, and a storage transistor 2 is overwritten on the storage capacitors 3 all storage memory elements of the selected row. In the corresponding element of the dynamic register 9 through the transistors 15 and 10 is written to the logical level "1". Thus, when reading data from any cell of the matrix drive the regeneration of data in all the storage elements of the selected row, including a storage element of the dynamic register 9.

With long-term failure to any line level is decreasing voltage on the capacitor 11 and the output element And 12 receive the low level signal request unit for regeneration. The time constant of the memory element dynamic register 9 is selected smaller time constant of the memory element matrix drive 1, to avoid loss of information by an amount sufficient to conduct regeneration that depends on what the generation of the column decoder 14 is blocked and the bus I / o 20 is in a disconnected state. The output signal from the row decoder 13, for example 171selects all the memory elements of one row including the corresponding element in the dynamic memory register 9. Information signals with the storage capacitor 3 through the open storage transistors 2 of all the memory cells of the selected row of the matrix the hopper to the inputs of operational amplifiers 8 amps write-read 4 and after amplification are memorized in the capacitor 7. Then the pulse received on the control bus 18 through the transistor 5, and a storage transistor 2, is transferred to the storage capacitors 3. In a corresponding memory element of the dynamic register 9 is written to a logical "1". Regeneration of the remaining lines is similar. The next regeneration cycle is initiated by a request signal to the regeneration device.

The percentage increase performance of the device depends on the specific program. If the program accessing the cells in random access memory (RAM), sequentially addresses the forced regeneration will not take place at all, i.e., loss of time for regeneration will be almost zero. For "Nabeglavi device allows to reduce time wasted on regeneration by 2% In real terms, these losses are usually less as skomponowanych programs most references to memory devices sequentially to addresses of the RAM cells.

Random access MEMORY containing a matrix drive memory elements, amplifiers record is read, the decoder column decoder row, the outputs of which are connected to the gates of the respective memory transistors of the memory cells, the origins of which through the storage capacitors of the memory cells connected to the zero potential bus device, the drains of all the memory transistors of the memory cells of each column are connected via a shared bus and is connected to the input of the operational amplifier of the corresponding recording-reading and to the source of the first transistor, the drain of which is connected to the output of the operational amplifier, the source of the second transistor and through a capacitor to the bus zero potential, the outputs of the column decoder connected to the respective gates of the second transistors, the drains of which are United by the bus I / o data device, the gates of the first transistors of the United bus control device, characterized in that, with the aim of improving operational performance saponetta the output of the query on the regeneration device and the inputs are connected to the sources of the respective memory transistors of the dynamic register and through the capacitors to the bus reference potential of the device, the drains of the memory transistors of the dynamic register of the United and connected with the source of the transistor, the drain of which is connected to bus logical unit device, and the gate is connected to the bus control device, the storage gates of the transistors of the dynamic register connected to the corresponding outputs of the row decoder.

 

Same patents:

The invention relates to automatic control and computer engineering, in particular to a device write binary information into permanent memory chip with ultraviolet erasing and fused jumper

The invention relates to computer technology and can be used in computer systems special purpose exposed during operation to physical fields of high and variable intensity

The invention relates to computer technology and can be used for data recovery in the semiconductor dynamic memory devices included in a specialized computers which are exposed during operation to physical fields of high intensity

FIELD: digital memory technologies.

SUBSTANCE: board has rewritable power-independent memory and control circuit, means for storing address, pointing at limit between authentication area and non-authentication area, circuit for changing size of said areas. Reading device contains estimation means, reading information, pointing at number of times, for which digital data can be read, and playback means. Second device variant additionally has means for digital output of contents.

EFFECT: higher efficiency.

3 cl, 23 dwg

FIELD: computer science.

SUBSTANCE: editing is performed for data files, which are segmented on blocks, each of which has known data length, and to which attribute file is added, having known length, while segmented blocks are recorded on energy independent memory device., method includes selecting two files of data, recorded in data area for their combination, attribute file is separated from the last data file from selected two; control data are edited recorded in control area by setting a logical link between two data files, and attribute file added to first placed file is edited; and edited control data are recorded to control area, and attribute file - to data area.

EFFECT: broader functional capabilities.

4 cl, 5 dwg

FIELD: data carriers.

SUBSTANCE: device for reproduction of data from data carrier, program zone of which is used for recording a set of files, and control zone - for controlling copy protection data concerning the file, recorded in program zone, has computer for calculating copy protection information for each time file is reproduced, comparison means for comparing value, calculated on reproduction command, being prior to current one, to value, calculated on current reproduction command, and if these values coincide, the last value is stored as copy protection value, calculated on reproduction command , prior to current one and control means for allowing reproduction of file, appropriate for current command, if value, calculated as response to command, previous relatively to current command, coincides as a result of comparison to value, calculated as a response to current command.

EFFECT: higher reliability, higher efficiency.

4 cl, 46 dwg

FIELD: data carriers.

SUBSTANCE: device for reproduction of data from data carrier, program zone of which is used for recording a set of files, and control zone - for controlling copy protection data concerning the file, recorded in program zone, has computer for calculating copy protection information for each time file is reproduced, comparison means for comparing value, calculated on reproduction command, being prior to current one, to value, calculated on current reproduction command, and if these values coincide, the last value is stored as copy protection value, calculated on reproduction command , prior to current one and control means for allowing reproduction of file, appropriate for current command, if value, calculated as response to command, previous relatively to current command, coincides as a result of comparison to value, calculated as a response to current command.

EFFECT: higher reliability, higher efficiency.

4 cl, 46 dwg

FIELD: data carriers.

SUBSTANCE: board has protected area, wherein a series of encoding keys is stored, unprotected area, wherein at least one sound record is stored and control information. Reproduction device has reading means, decoding means and reproduction means. Recording device has encoding means and recording means. Methods describe operation of said devices. Data carriers contain software, which reflects operations of said methods.

EFFECT: broader functional capabilities.

10 cl, 109 dwg

FIELD: electric engineering.

SUBSTANCE: semiconductor memory board has protected area, unprotected area, while board stores sound sequence, multiple objects in form of fixed images, at least one fragment of information about reproduction route, and at least one fragment of information about first and second pointers. Reproduction device has reproduction means, visual display means, control means. Recording device has assignment means and recording means. Methods describe operation of said devices. Data carrier has recorded software, providing reproduction procedure for said board.

EFFECT: broader functional capabilities.

7 cl, 148 dwg

FIELD: electric engineering.

SUBSTANCE: device has frequency filter, voltage amplitude limiter and two comparators, each of which includes differential cascade, two power sources, emitter repeater and voltage divider.

EFFECT: simplified construction, higher precision, higher reliability.

2 dwg

FIELD: data carriers.

SUBSTANCE: device for determining logical state of selected memory cells in memory device with passive matrix addressing is made with possible connection to ferroelectric memory device or forming its portion and contains reading amplifying contours, synchronous amplifier, combined source of shift voltage and signal, active control line driver, multiplexer, a set of routers. Other variant of aforementioned device is additionally equipped with second set of routers. Method describes operation of aforementioned devices.

EFFECT: higher efficiency, broader functional capabilities.

3 cl, 12 dwg

FIELD: editing of records.

SUBSTANCE: device is used for separation of data file with main and control data on first file and second file. Device has operation means for determining a point of division on first and second files; editing means for editing first control data, to render ineffective first portion of block of recorded data of fixed length with main data; and means for generating second control data, to render ineffective second portion of block of recorded data of fixed length with main data, and for adding second control data to second data file.

EFFECT: higher efficiency.

3 cl, 46 dwg

FIELD: technology for manufacturing plastic cards with chip (cards with inbuilt micro-circuit).

SUBSTANCE: method includes performing cycles of operations, consisting of loading command by external device into buffer of chip-card, execution of command by chip-card and return of message about result of command execution by chip card to external device. Prior to operation of loading by external device, block of commands is formed, containing administrative command, in which as data several commands fed onto card are used, aforementioned commands block is executed and message about result of execution of command block is returned to external device. Number of commands in block is supposed to be maximal possible to decreased exchange cycles and it determined by length of commands, size of command buffer, maximally allowed length of data in used transfer protocol.

EFFECT: when used in plastic cards with chip on basis of microprocessor, for example, in SIM-cards, leads to increased speed (decreased consumed time) of card initialization.

6 cl, 2 dwg

Up!