A method of manufacturing structures of p-channel mos lsi

 

(57) Abstract:

Usage: microelectronics, manufacturing technology p-channel MOS LSI with a high voltage level. The essence of the invention: in the manufacture of structures of p-channel MOS LSI on a silicon substrate is applied layers oxidan silicon nitride, forming a mask on the active areas, conduct protivodiversionnaya doping is grown in the field layer of silicon oxide, form a photoresistive mask to remove the silicon nitride from the active diffusion regions, alloyed active diffusion area and oxidize its surface to form a gate dielectric, create the contact metallization and interconnects. The method allows to increase reliability and to extend the scope of BIS by increasing the breakdown voltage Pastorova layer of silicon oxide.

The invention relates to microelectronics, and is intended for the manufacture of p-channel MOS LSI with a high voltage level.

A known method of manufacturing structures of the p-channel MOS LSI, comprising applying to the silicon substrate layer of silicon oxide and silicon nitride, the opening in the layer of silicon nitride Windows on the field and the active region is of Blasta, not protected by the nitride mask, forming a photoresistive mask, the doped diffusion regions, the cultivation of field and diffusion regions of a thick layer of silicon oxide, the etching of silicon nitride and the establishment of contact metallization and interconnects. The disadvantage of this method is the formation of a thick silicon oxide both on the field and active regions. It is not possible to create a thick layer of field oxide of silicon, since the oxidation occurs segmentation impurities growing oxide layer, which leads to a considerable decrease in the conductivity of the active regions.

The closest technical solution is a method for manufacturing structures of the p-channel MOS LSI, comprising applying to the silicon substrate layer of silicon oxide and silicon nitride, the opening in the layer of silicon nitride Windows only over the field regions, protivodiversionnaya doping field areas, the growing field of silicon oxide, the removal of silicon nitride, forming a photoresistive mask, doping the active diffusion regions, forming a layer of gate silicon oxide, creating a contact metallization and interconnects. This method allows SF is a high build field and active regions. However, the layer of gate silicon oxide, is formed on signalisierung forest areas, has a low breakdown voltage (in comparison with the silicon oxide above the channel of the transistor), which is associated with a decrease in the packing density of the layer due to the inclusion of impurities of boron growing silicon oxide. It is not possible to produce BIS with a high level of supply having a thin gate dielectric. Low values of the breakdown voltage gate silicon oxide reduces the reliability of the BIS.

The technical result increased reliability and expand the scope of an ENCORE by increasing the breakdown voltage gate oxide layer of silicon.

The technical result is achieved in that in the method of manufacturing structures of the p-channel MOS LSI, comprising applying to the silicon substrate layer of silicon oxide and silicon nitride, forming a mask silicon nitride, protivodiversionnaya alloying, the cultivation of the field layer of silicon oxide, removing the layer of silicon nitride, forming a photoresistive mask, doping the active diffusion regions, forming a gate oxide layer of the silicon, creating a contact metallization and interconnects, according to the invention the SL is their alloying oxidize the surface of the doped active regions, remove the remaining part of the layer of silicon nitride to form the gate oxide layer of silicon. Thus, the increase of the breakdown voltage of the layer of gate silicon oxide is achieved by selective oxidation of the diffusion regions of the p-type protected by the mask silicon nitride.

Forming a photoresistive mask, under the protection of which is the doping of the active regions, is performed on the layer of silicon nitride, which protects the active area when growing field isolation. The etching of silicon nitride in accordance with the configuration of the mask for the doping allows to oxidize the active region after alloying. As the channel length is set photoresistive mask for the doping of the active regions, the gates of transistors overlap with the active region on the value of resumeware. The gate dielectric located on signalisierung forest areas, has a low breakdown voltage due to violations of the structure of the oxide caused by included in the dielectric atoms of boron due to the effect of segregation. This significantly reduces the overall magnitude of the breakdown voltage gate dielectric. Therefore, the operation of selective oxidation of boron-doped regions (h is CI silicon nitride, located on the areas of the channels of the transistors can significantly increase the thickness of the layer of gate silicon oxide on the active regions and to increase its breakdown voltage. The thickness of the layer of silicon oxide is limited only by the requirements of the resistance of the active areas, which increases with increasing thickness of the oxide layer due to the effect of segregation of dopant. For example, in the manufacture of BIS CR 1043-VG with the level of operating voltage 35 V, above the channels of the transistors are formed gate oxide of silicon with a thickness of 0.09 μm, and the diffusion regions with a thickness of 0.4 μm. When subsequent etching removes approximately 0.2 μm oxide layer. Thus, the final thickness of the layer of silicon oxide on the active areas under the shutter is approximately 0.2 μm, which allows to increase the breakdown voltage of gate oxide of silicon to 70 C. In the manufacture of circuits with a higher level of operating voltage it is possible to improve the breakdown voltage by increasing the thickness of the oxide.

The conditions of oxidation of the active regions is determined mainly by the requirements of the final resistance of the active regions. For example, if coprativeaboutC for 50 min in an atmosphere of water vapor, followed by annealing for 1 h in oxygen atmosphere, the resistance of the active regions is 40-450 m/sq

This increased resistance can be eliminated by conducting the oxidation at higher temperatures. Thus, the specific modes of formation of a protective layer of silicon oxide on the active regions are determined by the particular requirements of the electrophysical parameters of the gate dielectric and the active areas and depend on structural and technological features manufactured BIS.

The increase of the breakdown voltage of gate silicon oxide can increase the reliability BIS and manufacturing schemes with a high level of power, i.e., to expand the scope of BIS.

A METHOD of MANUFACTURING structures of p-CHANNEL MOS LSI, comprising applying to the silicon substrate layer of silicon oxide and silicon nitride, forming a mask silicon nitride, protivodiversionnaya alloying, the cultivation of the field layer of silicon oxide, removing the layer of silicon nitride, forming a photoresistive mask, doping the active diffusion regions, forming a gate oxide layer of the silicon, creating the Finance photoresistive mask with active diffusion regions, and after doping the active diffusion regions of the surface oxidize and remove the remaining part of the layer of silicon nitride, then form the gate oxide layer of silicon.

 

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