Storage capacitor element of the memory integrated circuits

 

(57) Abstract:

Usage: in electronic engineering, in particular in manufacturing processes of semiconductor memory circuits on MIS-transistor. The inventive storage capacitor of the memory element of the integrated circuits includes a first facing layer of conductive material formed on the surface created in the semiconductor plate depressions on the surface of which created the tabs, the capacitor dielectric and the second facing, applying to the entire surface of the first sheath, including the tabs. 1 Il.

The invention relates to electronic devices and can be used in the manufacture of semiconductor memory circuits for MOS transistors.

Known storage capacitor of the memory integrated circuits formed in the semiconductor substrate and including a first facing layer of conductive material, capacitor dielectric, insulating the first plate from the second layer of conductive material, while the capacitor dielectric is made in the form of a meander [1]. A disadvantage of the known device is the low quality and reliability due to leakage currents, which is associated with the absence of playmost anatomy element, formed in the semiconductor substrate [2] . In this device one of the condenser elements is the capacity of the p-n junction formed by two semiconductor layers. A layer of n+-type conductivity is made with the bumps and hollows. Known condenser design is of poor quality and reliability, because the capacitor is used as the p-n junction, which leads to leaks and random crashes.

The purpose of the invention is reducing the size of the capacitor, while maintaining its capacity, higher reliability.

This is achieved by the fact that in the storage capacitor of the memory element of integrated circuits, including in-depth in the substrate is first coated with a relief surface, the separation region, the second plate, the bottom surface which follows the relief of the first dividing region made of dielectric material, and the lining is made of doped polysilicon.

The drawing shows the structure of the storage capacitor element of the memory integrated circuits, the cross-section.

It contains the first plate 1 capacitor of a doped polysilicon created on its surface protrusions 2, alitalo region 4 of a dielectric material, the second plate 5 of doped polysilicon, the bottom surface which follows the relief first.

The working storage capacitor is identical to the standard transistor of the memory element dynamic storage device. In the technical solution according to the invention is obtained groove with multiple conductive walls, which allows not only to increase the effective area of the first capacitor plates, but also to increase playmost surface after forming the capacitor plates, for slamming each branch of the grooves is at a lower thickness of the conductive material of the second sheath.

Using the proposed design, the developer may select, based on the requirements of a specific device.

In the first embodiment it is possible to increase the thickness of the capacitor dielectric. This will give the opportunity to improve the reliability of the memory elements VLSI by increasing the breakdown voltage of the capacitor dielectric and reduce the leakage current of the capacitor. The decrease in capacitance by increasing the thickness of the dielectric is compensated by the increase of the effective surface of the plates due to the protrusions of navigating

The second option, you can simultaneously increase the capacity of the storage capacitor of the memory element of integrated circuits by increasing the effective surface of the plates and reduce leakage currents (for example, by increasing the thickness of the capacitor dielectric 1.5 times) without changing the area of the accumulating capacitor in the plan. This allows to increase the reliability of the memory elements of the integrated circuits to random failures.

The third option may reduce square storage capacitor in the plan without changing the capacitance and breakdown voltage.

Using the proposed design, the developer receives a freedom of choice in the thickness of the dielectric and square plates to ensure the reliability of the semiconductor integrated circuit memory.

Storage capacitor of the memory element of the integrated circuit is manufactured as part of the dynamic memory element operative memory (dram) 256 Kbps using additional IGOS. The first plate 1 on the surface created in the semiconductor wafer 3 KDB-12 deepening depth of 2 microns with a size in terms of 2x2 µm2formed from doped with phosphorus imported from Germany is of doped phosphorus polycrystalline silicon. Capacitor dielectric 4 is formed of Si3N4the thickness of 27.5 2.5 nm. The second plate 5, as well as first, create a layer of doped polycrystalline silicon with a thickness of 0.1 to 0.01 μm. By varying the thickness of the dielectric, it is possible to reduce the amount of leakage current.

The invention increases the operational reliability of the storage capacitor and a semiconductor integrated circuit memory, the design of which includes a memory cell that uses capacitors to store information.

Storage CAPACITOR of the MEMORY ELEMENT INTEGRATED circuit containing the first and second plates and the separation region, and the first lining is deepened in the substrate and its upper surface is made visible, and the lower surface of the second casing follows the relief of the first, characterized in that the separation region is made of a dielectric material, and the lining is made of doped polysilicon.

 

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