Device for encoding discrete messages


H03M13/02 -

 

(57) Abstract:

The invention relates to a device for the encoding of discrete messages and can be used in FSO communication systems. Goal - improving the noise immunity is achieved by the formation of character code that extends the range of messages using nonlinear operations restrictions implemented by the block 12 comparison on a linear sum of the encoded adders 3 produces a signal stored in the register 2, the sequences of the ensemble of the Walsh function generated by the generator 1. 1 Il.

The invention relates to automation and telemechanics and can be used in data transmission systems operating in conditions of structural and concentrated interference.

It is known device for encoding discrete messages containing the encoder to the first input of which is connected to the input of discrete messages, the modulator, the input of which is connected to the output of the encoder, and the first frequency multiplier, the input of which is connected to the bus clock frequency discrete messages [1].

A disadvantage of the known device is the low immunity, due to the structure of the encoder is made in the form R the fishing code the period which is equal to 2n- 1. The immunity provided by the fact that the value is chosen large enough so that when organizations interference cannot see the full cycle of the sequence. However, on 2n symbols such sequence, you can define a connection that specifies the feedback register maximum length, for example, using the algorithm of Berlekamp. The device immunity coding can be improved by using nonlinear methods of forming and symbols of the code.

Closest to the claimed technical solution is the unit of encoding that contains the encoder, the first output of which is a bus of discrete messages, the modulator, the output of which is output bus, N adders modulo two, the first inputs are connected to respective outputs of the memory register, the pulse distributor [2].

The known device has low noise immunity.

Technical result achieved in the invention is to improve the noise immunity due to the formation of character code that extends the range of messages using a non-linear operation constraints, the linear sum of posledovatelnosti discrete messages.

The device comprises a generator 1 of the Walsh function, the register 2 memory N adders 3 modulo two, the multipliers 4 and 5 frequency, the distributor 6 pulses, the multiplexer 7, a counter 8, the encoder 9, the modulator 10, the imaging unit 11 symbols of the code block 12 and comparison unit 13 code memory threshold.

The outputs of the generator 1 of the Walsh function is connected to the inputs of the adders 3 modulo two, to the other inputs of which are connected the outputs of the register 2 memory producing a signal. The outputs of the adders 3 through the multiplexer 7 and the counter 8 is connected to the inputs of the block 12 comparison to the other input of which is connected to the outputs of the block 13 code memory threshold. The output of block 12 comparison through the driver 11 of the code symbols and the encoder 9 is connected to the input of the modulator 10, and the input clock frequency data through the first and second multipliers 4 and 5 frequency connected to the input of the distributor 6 pulses, the outputs of which are connected with inputs of the multiplexer 7.

Device for encoding discrete messages is as follows.

Discrete messages in the form of a continuous sequence of binary symbols, with the following frequency fwithcome to the first input of the encoder 9. The clock signal frequency fwithdiscrete messages on the bus tachovsky frequency KFcfrom the output of the first multiplier 4 is fed to the clock input of the generator 1 that generates N their outputs binary signals belonging to the ensemble of the Walsh function.

The signals of the Walsh function with outputs of the generator 1 are received at the first inputs of the respective N adders 3 modulo two, the other inputs of which are connected to N outputs of the register 2, in which before a communication session is recorded N-bit binary signal, which produces (address) in this session.

The outputs of the adders 3 are formed inverse Walsh functions (if the corresponding character generating signal is a logical "1") or direct functions Walsh (otherwise, direct and inverse functions Walsh synchronous character-oriented in parallel with the outputs of the adders 3 are connected to N inputs of the multiplexer 7). N control inputs of the multiplexer 7 with the output of the distributor sequentially in time during the period of frequency KFccome N pulses. These pulses are formed from the output signal of the first multiplier 4 by multiplying its frequency N times in the second multiplier 5, followed by the distribution of N outputs of the distributor 6 with reference to the beginning of the clock frequency interval K is the amplifier 6 pulses can be performed, for example, on N-bit shift register in which control signal in the first bit is written to logic "1", promoted by case the output signal of the second multiplier 5.

Thus, at the output of the multiplexer 7 in each clock interval of the Walsh function is formed by a sequence of N symbols, which is characteristic values of the signals at the outputs of the respective adders 3 at a given clock interval. The counter 8 in this interval is calculated the difference between the logic "1" and "0". For this purpose, the counter 8, for example, can be made in the form of a reversible counter, nullable back-to-back output signal of the first multiplier 4, and at its counting input receives the pulses from the second multiplier 5, and the input control the counting direction of the signal output from the multiplexer 7. With outputs of the counter 8, the result of counting in parallel code entered in block 12, the other input of which is fed code threshold, formed in the block 13, is equal to, for example, N/2. Unit 13 may be implemented, for example, in the form of a persistent storage device. The output of block 12 is formed by a logical "1" if the account code from the output of the counter 8 more code written in block 13, and a logical "0" otherwise. Block 12 m is the Signal output unit 12 is supplied to the driver 11, representing, for example, a trigger, in which the output signal of the first multiplier 4 frequency before the reset of the counter 8 is written to the logical signal output unit 12 and stored on the entire time interval equal to the period of the frequency KFc. From the output of the shaper 11 binary code signals are sent to the encoder 9, in which each symbol in the message is replaced by a character code or their inversions depending on the value of the corresponding symbol in the message. Encoder 9 can be performed, for example, in the form of a modulo two. Coded so the characters of the message with the output of the encoder 9 is transferred to the carrier frequency in the modulator 10 to the feed channels of communication.

Thus, when the code generation is used purely nonlinear operation restrictions implemented in block 12 of comparison, and to create structural interference, coinciding in form with this code, you need to iterate over all possible values producing code by observing known messages throughout the period of the ensemble of the Walsh function generated by the generator 1. This is significant when N and the function generators Walsh high order requires time much larger than the duration of a message the I DISCRETE MESSAGES, contains an encoder, a first input of which is a bus of discrete messages, the modulator, the input of which is an input bus N adders modulo two, the first inputs are connected to respective outputs of the memory register allocator pulses, characterized in that it introduced the reversible counter block compare block of memory code threshold, two multipliers, the shaper of the character code, the multiplexer, the generator of the Walsh function, the outputs of which are connected to second inputs of respective adders modulo two, the outputs of which are connected to respective outputs of the pulse distributor, and the output - control input counting direction of the reversible counter, the counting input of which is combined with a clock input of the pulse distributor and connected to the output of the first frequency multiplier, the reset input is combined with the input of the initial installation of the distributor pulses, the input of the first frequency multiplier, a clock input of the function generator Walsh, sinhroneziruyu the input of the shaper of the character code and is connected to the output of the second frequency multiplier, the input of which is the bus clock frequency, and the outputs of the counter are connected with the first inputs of the block comparison, the second input code, the output of which is connected to a second input of the encoder, the output of which is connected to the input of the modulator.

 

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