The code converter

 

(57) Abstract:

The invention relates to automation and computer engineering and can be used in computers to convert the numbers from the lowest forms a redundant number system. The purpose of the invention is the increased robustness and reliability through the use of (decode) code minimal form t1-redundant number system and detect errors in the received information. This goal is achieved by introducing two elements, OR, EXCLUSIVE OR element, the control output and the respective links. The proposed Converter can convert numbers from the minimum of the form t1-redundant number system in a unitary code numbers and to detect errors. 1 Il.

The invention relates to automation and computer engineering and can be used in computers to convert the numbers from the lowest forms a redundant number system.

Known structural diagram of the decoder four-digit code (1). The main disadvantage of analog low immunity due to the failure information control and because of the inability to use pokrasnenija linear decoder, which consists of a block of input elements And block exits, and the second, fourth and sixth are inverted respectively to the first, third, and fifth inputs, the inputs of the decoder are the block inputs, the first input unit inputs connected with the first inputs of the fifth, sixth, seventh and eighth elements And block elements And the second input is connected to the first inputs of the first, second, third and fourth elements, And the third input is connected to the second inputs of the third, fourth, seventh and eighth elements And the fourth input is connected to the second inputs of the first, second, the fifth and sixth elements And the fifth input is connected to third inputs of the second, fourth, sixth and eighth elements And the sixth input is connected to third inputs of the first, third, fifth and seventh elements And the outputs of the elements that constitute the block outputs are the outputs of the decoder (2).

The main disadvantages of the prototype low immunity due to the inability to use codes redundant number systems and the failure to identify errors in the incoming information.

The purpose of the invention is the increased robustness and reliability through the use of (decode) code minimal form the falsity of modern computing machines leads to a large number of failures, violate their performance, failures causing intermittent malfunction, temporary failure, frequently occurring failures of the same nature. One of the main ways to improve the reliability of computing is the introduction of redundancy. The most effective is the introduction of natural redundancy. For example, by using the minimum of the form t1- redundant number system.

Any natural n-bit number And is represented in a redundant number system polynomial

A=As(s)

(1)

Condition:

a= specifies the minimal form of representation of numbers, which is characterized in General by the presence of five neighboring bits is not more than one unit. Output n-bit code minimal form is determined by the value (n+1), and the number of units in the code expression

wm(n)=wm(n-1)+wm(n-s)+ (n-1);

wm(0)=wm(1)=0; wm(2)=1.

Comprehension Converter is the inverse transformation of the conditions (2). Errors in the incoming binary sequences produced by arranging the links in such a way that distorted information when it arrives at the inputs are transformed into arisawa combination to another. But used the notation with the natural redundancy significantly reduces the probability of such events, so the probability of detection error will be greatly enhanced. I.e., the control is performed by comparing the signal at the inputs and outputs of the device. If the signals at the inputs and outputs are not available, or if the signals at the inputs and outputs have the information without errors. If the inputs are the signals, and outputs them no, it means that information is distorted. The compare function performs the EXCLUSIVE OR element. The signal on receipt of a malformed binary combinations of the EXCLUSIVE OR element transmits to the control output. Information taken from the control output can be used to calculate the intensity of errors to erase recorded distorted information and perestroka in systems with feedback.

The drawing shows a block diagram of a code Converter (n= 9), which contains the inputs 1, items 21-211outputs 3, the first element OR 4, the second element, OR 5, the EXCLUSIVE OR element 6 and the control output 7.

Elements AND 21-211produce decoding undistorted combination of the minimum of the form t1-redundant system schisler the element is provided EXCLUSIVE-OR 6 generates a single signal arrives at the input of the inverter distorted combination.

Control output 7 generates a single signal arrives at the input of the inverter distorted combination.

The Converter operates as follows.

Let the inputs of the Converter of the data is not received or received zero combination. The outputs of the first element OR 4 and the second element, OR 5 will be zero signals and the EXCLUSIVE OR element 6 does not generate a signal on receipt distorted combination of inputs 1.

If inputs 1 did not zero undistorted combination, the outputs 3 of the Converter will be installed unitary code number, with the first element OR 4 and the output of the second element, OR 5 respectively on the first and second inputs of the EXCLUSIVE OR element 6 will receive individual signals and the EXCLUSIVE OR element 6 will not generate a signal on receipt of a malformed hand.

If inputs 1 did not zero the mangled combination, the outputs 3 of the Converter will be zero combination. The output of the first element OR 4 will be a single signal, and the output of the second element, OR 5 will receive a zero signal and an EXCLUSIVE OR element 6 will form a single signal, the locking receipt distorted combination in the E OR 6.

The CODE CONVERTER, containing the first eight elements And the outputs of which are the same informational outputs of the Converter, the first inverted inputs of the first, third, fifth and seventh elements And are combined and the first input of the Converter, the first direct inputs of the sixth and eighth elements And are combined and the second input of the Converter, the second inverted inputs of the first and fifth elements And the first inverted inputs of the second and sixth elements And are combined and the third input of the Converter, characterized in that, to improve noise immunity and reliability of the Converter, it entered the ninth - eleventh elements And, elements OR and EXCLUSIVE OR element whose output is the control output, the outputs of the first and second elements OR are connected respectively with the first and second inputs of the EXCLUSIVE OR element, the second inverted inputs of the second and sixth elements And the first inverted input of the fourth, eighth and eleventh element And the first input of the first element OR connected to the first input of the Converter, the direct input of the first element And the first direct entry tenth element And the second inverse fifth element And the second input of the first element OR is connected to the second input of the inverter, third inverted input of the third, fourth, seventh, ninth and eleventh element, And the second inverted input of the eighth and tenth elements And the third input of the first element OR is connected to the third input of the Converter, the third inverted inputs of the first, sixth, eighth and tenth elements And the fourth inverted input of the third, fourth, fifth, seventh and ninth elements And the direct input of the second element And the first direct entry eleventh element And the fourth input of the first element OR combined and are the fourth input of the Converter, the fourth inverted inputs of the first, second, sixth, eighth, the tenth and eleventh element, And the fifth inverted inputs of the fourth, fifth, seventh and ninth elements And direct entrance to the third element And the fifth input of the first element OR the joint and the fifth input of the Converter, the fifth inverted inputs of the first, second, third, sixth, eighth, tenth, and eleventh element And the sixth inverted inputs of the fifth, seventh, ninth elements And direct entry of the fourth element And the sixth input of the first element OR combined and are the sixth input of the Converter, the sixth inverted inputs of the first - fourth,vosot the fifth element, And the second direct input of the sixth element And a seventh input of the first element OR combined and are the seventh input of the Converter, the seventh inverted inputs of the first - fifth, tenth and eleventh element, And the sixth inverse input of the sixth element, And direct entry of the seventh element And the second direct input of the eighth element And the eighth input of the first element OR combined and are the seventh input of the Converter, eighth inverted inputs of the first to fifth, seventh and ninth elements And seventh inverted inputs of the sixth, eighth, tenth, and eleventh elements And direct entry of the ninth element, And the second direct inputs tenth and eleventh and ninth elements And the input of the first element OR United are ninth input of the Converter, the first - eleventh inputs of the second element OR connected to the outputs of the same elements And the outputs of the ninth - eleventh of the elements are the same informational outputs of the Converter.

 

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