# Functional converter

(57) Abstract:

The invention relates to computing technology, namely, functional converters, and can be used to build information-measuring systems. Functional Converter contains shaper 1 pulse generator 2 clock pulses, managed 3 frequency divider, a counter 4 pulses, the register 6, the elements 7 and 8 of the delay, the source 9 of the reference voltage, the integrator 10 is reset, block 11 of the sample-hold unit conversion voltage frequency input 13 and the output 14 of the tire. The input of the shaper 1 is connected to bus 13, and the output directly to the input of register entries 6 and through the element 7 with the input of the reset of the counter 4, a counting input connected to the output of the generator 2 and the clock input of the divider 3, and the output bits are connected to the appropriate information inputs of the register 6. Unit 5 included between the output of the register 5 and the controlling input of the divider 3, the output of which is connected directly with the control unit 11, and through the element 8 with the reset input of the integrator 10. Source 9, the integrator 10, block 11 and block 12 are connected in series, with the output of block 12 is connected to the bus 14. 1 Il. Known functional Converter comprising series-connected voltage reference, the switch, resistive scaling matrix, the integrator unit sample-hold voltage Converter in pulse duration and the output pulse counter, analog memory block connected between the second output of the voltage reference and information input of the integrator cascaded clock generator pulses, the pulse counter and a decoder, the outputs of which are connected to control inputs of the switch, the synchronization unit, the first and second inputs connected to the outputs of the clock pulses and the voltage Converter in pulse duration, respectively, and outputs - control inputs analog electronic key unit sample-hold voltage Converter in pulse duration and the output of the pulse counter, and the electronic key information whose input is connected to the first output of the reference voltage, the control input to the inverter output voltage in the pulse duration, and the return to the Disadvantage of this Converter is limited functionality, due to the fact that it does not allow for nonlinear frequency conversion.The closest in technical essence to the present invention is functional Converter comprising a source of reference voltage, connected in series integrator, the fetch block-storage and conversion unit voltage frequency, the output of which is connected to the output of the inverter, connected in series generator of clock pulses and the pulse counter, the pulse shaper, the input connected to the input of the Converter, a frequency divider, the output of which is connected with the control input of the sample-hold switch connected in series, an input connected to the output of the reference voltage, and a resistive scaling matrix, the output of which is connected to the input of the integrator, the decoder, the output of which is connected with the output of the pulse counter and the output with the control input of the switch, and two analog memory unit, the information input of which is connected to the output of the voltage reference and the output to the input of the integrator, the control input of the first analog memory block is connected to the inverter output, a first control I input - with the second output of the pulse shaper and the input of the frequency divider, the output of which is connected to the reset input of the counter pulses [2].The disadvantage of this Converter is the low performance due to high conversion (the conversion time is several cycles, each of which includes a number of periods of the input signal equal to the division factor of the frequency divider).In known functional Converter comprising a source of reference voltage, a pulse shaper, an input connected to the input of the inverter, connected in series integrator, the fetch block-storage and conversion unit voltage frequency, the output of which is connected to the inverter output, frequency divider, the output of which is connected with the control input of the sample-and-hold, and connected in series generator of clock pulses and the pulse counter, put the case, the conversion unit codes and two delay elements, and the frequency divider is made manageable, and the integrator is made in the form of an integrator with reset, information input register connected to the output of the pulse counter, the input records with the release of the formation of the frequency divider, the first delay element connected between the output of the pulse shaper and the input of the reset pulse counter, the clock input of the frequency divider coupled to the output clock and the output with the input of the second delay element, the information input of the integrator is connected to the output of the reference voltage, and a reset input from the output of the second delay element.The combination of the newly introduced elements and connections not obvious from the prior art, therefore, the proposed Converter should be considered new and inventive.The drawing shows a structural diagram of the proposed Converter.Functional Converter contains shaper 1 pulse generator 2 clock pulses, controlled divider 3 frequency, the pulse counter 4, block 5 conversion codes, the register 6, the elements 7 and 8 of the delay, the source 9 of the reference voltage, the integrator 10 is reset, block 11 of the sample-hold unit 12 conversion of the voltage-to-frequency, input and output bus 13, 14.The input of the shaper 1 is connected to bus 13, and the output directly to the input of register entries 6 and through the element 7 with the input of the reset of the counter 4, the accounts in the mi information inputs of the register 6. Unit 5 included between the output of the register 6 and the controlling input of the divider 3, the output of which is connected directly with the control unit 11, and through the element 8 with the reset input of the integrator 10. Source 9, the integrator 10, block 11 and block 12 are connected in series, with the output of block 12 is connected to the bus 14.The operation of the transducer is as follows.The input signal frequency F_{I}comes with bus 13 to the input of the shaper 1. The imaging unit 1 forms received at its input signal is a short pulse with a period of T

_{I}=1/F

_{I}following that come directly to the input of register entries 6 and through the element 7 is input to the reset of the counter 4.At the counting input of the counter 4 and the clock input of the divider 3 receives clock pulses with a frequency F

_{o}generated by the generator 2, the frequency F

_{o}is chosen much larger than the maximum possible frequency F

_{I}input.Under the action of pulses from the output of element 7, the counter is reset to zero with a period of T

_{I}and in the interval between resetting its contents linear speed increases from zero to the number N, defined by the equation

N = (1)

Under the action of the pulse is chosen as low as possible, but sufficient to provide a record of the number N in the register 6.As a result, the output of the register 6 and the input unit 5 periodically with period T

_{I}updated code number N, is proportional to the period T

_{I}input.Block 5 represents a matrix of semi-permanent storage device, information which is divided at the addresses constituting an information word. Each information word is rigidly connected with its address, in which it is fixed. When entering code address input unit 5 at its output enters the information word corresponding to this address. Information words stated in block 5, are codes for integers M, defined by the equality

M= f (N), where f(N) in the General case of nonlinear dependence. A data word entered by the user in block 5 in advance.The dependence of M=f(N) is determined by the required dependence of the output frequency F

_{o}= (F

_{I}) from the input. It is formed from (F

_{I}) by the substitution in the last instead of the frequency F

_{I}values of F

_{o}/N. In this case, the substitution in the expression f(N) instead of N in accordance with equation (1) values of F

_{o}/F

_{I}get

_{o}/FP

_{x}get

M=f(N)=F

_{I}+and F

_{I}

^{2}= (F

_{I})

The number M is equal to the division factor of the divider 3. The frequency F of the pulse at the input of the divider 3 with regard to the equation (2) will be determined

F = = = (3) the Pulses from the output of the divider 3 are transferred directly to the control input unit 11 and through the element 8 to the reset input of the integrator 10.The information input of the integrator 10 is supplied a constant voltage level E

_{about}from the output of the source 9.With each pulse from the output of element 7 of the integrator 10 is reset, and the time interval between resetting signal at its output linearly increases from zero to the level of V, defined by the expression

U = , (4) where is the time constant of the integrator 10.Under the action of pulses from the output of the divider 3 level is memorized by the unit 11. The delay element 8 is selected as low as possible but sufficient to allow the capture of information from the output of the integrator 10 in block 11.Memorized by the unit 11 level V to the input of the block 12, which converts this level proportional to the frequency F

_{o}the output signal postupaesh is - efficient transmission unit 12.The parameters E

_{about}, K, F

_{o}and are selected from the condition

= 1.With this in mind, equation (5) can be written in the form

F

_{o}= (F

_{I})

Thus, the proposed device as a prototype provides the desired functional frequency conversion of the input signal, and the law of conversion is determined by the relevant information is entered in block 5.In the proposed device, the conversion time is determined by the time code is generated, the control input of the divider 3. It does not exceed one period of the input signal. FUNCTIONAL CONVERTER comprising a source of reference voltage, a pulse shaper, which input is the input of the Converter, connected in series integrator, the fetch block-storage and conversion unit of the voltage-to-frequency whose output is the output of the Converter, a frequency divider, the output of which is connected with the control input of the sample-and-hold, and clock generator pulses, the output of which is connected to the counting input of the counter, characterized in that it introduced the case, the conversion unit codes and the first and vtorogo reset, information input register connected to the output of the pulse counter, the input set to "0" which is connected to the output of the first delay element, the input connected to the output of the pulse shaper and to the input of the write-enable register, the output of which is connected to the input of the conversion unit codes, the output of which is connected with the control input of the frequency divider, the output of which is connected to the input of the second delay element, the output of which is connected to the reset input of the integrator, an information input connected to the output of the voltage reference, and clock input of the frequency divider coupled to the output clock.

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