# Device for correcting errors in a correction notation

(57) Abstract:

The invention relates to computer technology and can be used for error correction. The purpose of the invention is improving the noise immunity of the device. The goal is achieved in that the device further comprises second, fifth, sixth, seventh and eighth groups Semikhatov elements And, third, fourth and tenth groups settingdown elements And ninth group desativado elements And group elements OR and XOR, all groups contain n-8 elements and the respective links. The proposed device can be used to build highly reliable storage device and information processing in systems with high demands on reliability and can also be used in systems with a high level of noise. 1 Il.

The invention relates to computer technology and can be used for error correction.

The purpose of the invention is improving the noise immunity of the device.

The number And can be presented in the corrective notation the following polynomial:

A= As1(s) where1(S) =1(S-2)+A1(S-3); 1(0) =1(1)=1 Condition ( the presence of packages of two consecutive units/separated not less than one and not more than three zeros.

A method of correcting errors in the discharge described by Boolean functions:

I0-1(s)=a(s-2)a(s-1)a(s)a(s+1)a(s+2)a(s-1)< / BR>
a

aa(s+3)a(s+4)a(s-3)a(s-2)aa(s+3)a(s+4)a(s-4)a(s-3)a(s+2)a(s+3)a(s-4)a

a(s+3)a(s+4)a(s-4)a = (4) where a(s)- binary coefficient s-th digit;

I(s)0-1- individual signal error correction type move "0" to "1";

I(s)1-0- individual signal error correction type transition "1" to "0";

I(s)1-0- individual signal correction;

I(s+1)1-0error type transition pack "1" to "0".

The invention consists in the implementation of the formulas (2), (3) and (4).

The drawing shows a diagram of the device for n = 10.

The device comprises a first element group And 1.1-1.2, the second group of items 2.1-2.2, 3.1 third-3.2, fourth, 4.1-4.2, fifth 5.1-5.2, sixth, 6.1-6.2, the seventh 7.1-7.2, eighth 8.1-8.2, ninth 9.1-9.2 and tenth 10.1-10.2 group of items, group of items OR 11.1-11.2, a group of XOR 12.1-12.2, a group of information inputs 13 and the group of information outputs 14.

Group elements And the first through the tenth is obyedinenie these signals. The group of XOR 12.1-12.2 designed to correct mistakes at the inputs 13 and forming ver Noi code combinations at the outputs 14 of the device.

The device operates as follows.

Assume that the input device filed representation of the number 13 in corrective notation - 0011011000. This combination, when the corresponding inputs of elements And groups 1.1 and 1.2, in neither case does not output element And a single potential, i.e., all inputs to the elements OR 11.1-11.2 zero, and outputs "0" which is supplied to the second inputs of the XOR 12.1-12.2, and the first inputs of these elements are supplied respectively to "0" of the fifth grade and "1" of the sixth category of the above combinations, which appear at the outputs of the respective XOR 12.1-12.2 and are part of the output device without modification.

Assume that in the fifth discharge fails-type move "0" to "1" and code combination takes the form 0011111000. At all entrances element And 1.1, you receive a single potential, which takes place on its output, and hence to the input element OR 11.1, the output of which also appears to "1". A single potential from the output element OR 11.1 Porada. At the output of the EXCLUSIVE OR element 12.1 appears zero potential, which takes place on the output device, thus correcting the failure. Another incident type error move "0" to "1" is corrected by the proposed device.

Assume that in the source code combinations 0110001100 fails in the fifth grade. Fires element And 2.1, and a single potential from its output through the OR element 11.1 element EXCLUSIVE OR 12.1 adjusts the fifth level, i.e. it returns in one state.

Now consider the error correction type transition "1" to "0".

Assume that the input device has a code combination 1000110001. In the sixth discharge fails. Fires element And 3.2. A single potential from its output through the element OR 11.2 is supplied to the second input of the EXCLUSIVE OR element 12.2, at the first sign of which is "0" distorted sixth grade. At the output of the EXCLUSIVE OR element appears 12.2 single potential which is supplied to the sixth bit of the output device, thus correcting the failure.

Now assume that a failure occurs in the fifth grade. Fires element And 4.1, and then through the element OR 11.1 of would be loaded on. If the code combination 0110110110 similarly corrected single failures in the fifth and sixth digits. In the first case, the trigger elements AND 5.1, OR 11.1 and EXCLUSIVE OR 12.1, and the second - 7.2, 11.2 and 12.2. If it fails in the fifth digit code combination 1100110110 triggered element And 6.1 and failure in the same category combination 1101100110 triggered element And 8.1, and then similarly 11.1 and 12.1.

In addition, the device allows you to fix the part of the twofold error of type package of two "1" to "0". Assume that the input device is set to the code combination 1000110001. Under the influence of the interference fails in the fifth and sixth digits. Fires element And 9.1, and the singular potential with its output fed to the inputs of the elements OR 11.1 and 11.2 and later on the second inputs of the XOR 12.1 and 12.2, the outputs of which are units fixed fifth and sixth digits.

Similarly corrected failure of the same type in the code combination 0110110110. In this case, the triggered element And 10.1, further elements OR 11.1 and 11.2 and finally the XOR 12.1 and 12.2.

Thus, the proposed device provides a fix for the most part, a single fault and multiple part the TV storage and information processing in systems with high demands on reliability, and can also be used in systems with a high level of noise.

DEVICE FOR CORRECTING ERRORS IN a CORRECTION NOTATION containing the first group of elements And the first element OR the first element And the first group connected to the first input of the first element OR, characterized in that, to improve noise immunity, the device contains the second through the tenth group elements And group elements, OR the second to (n - 8)-th, where n is the bit width, and a group of XOR, and elements And the second, fifth to eighth groups of the first and second inputs - direct, third - inverted the fourth - straight fifth - inverse, sixth and seventh - straight elements And the third group the input is inverted, the second - straight from the third to the sixth - inverse, the elements of the fourth group first to fourth inputs is inverted, the fifth input is direct, and the sixth - inverted elements And ninth group first inputs - direct, and from the second to ninth - inverted elements And the tenth group of the first input - direct, with the second to the fifth - inverse sixth inputs - direct, each i-th entry of the K-th element And the (i= , S is the number of inputs of the element, K = ) the first, third and tenth groups connected is trojstva, each i-th entry of the K-th element And the ninth group - C (i + K - 1)-th input of the first and second inputs of each of the K-th element And the fifth group are connected respectively with (K + 1)-th and (K + 2) th input device, the first and second inputs of each of the K-th element And sixth groups, respectively with K-th and (K + 1)-th inputs of the device, each j-th entry of the K-th element and the fifth And sixth groups (j= ) connected to the (j + K + 1)-th input device, each C-th entry of the K-th element And the seventh and eighth groups (C = ) is connected with (C + K + 1)-th input of the sixth and seventh inputs of each element And the seventh group are connected respectively with (K + 6)-th and (K + 7)-th inputs of the device, the sixth and seventh inputs of each of the K-th element And the eighth group are connected respectively with (K + 7)-th and (K + 8) th input device, the output of each element And of the first group, starting with the second, connected to the first input element OR group, the output of each of the K-th element And the m-th group (m = ) is connected to (m + 2)-th entry of the K-th element OR group the outputs of each of the K-th element And the ninth and tenth groups are connected respectively with the second and third inputs (K + 1)-th element OR group, the output of each of the K-th element OR group connected with the first input of the corresponding EXCLUSIVE OR element group, (K + 4)-th input device with which a, the input device from the first to the fourth and (n - 3) th to n-th are the corresponding outputs of the device.

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FIELD: computers.

SUBSTANCE: device has commutation block, checked microcontroller, block of read-only memory devices of checked microcontroller, block of operative memory devices, PC, controlling microcontroller, block 7 of serial interface, indication block, commutation block of serial interface, block for forming a signal of starting setting of block for forming ROM addresses, block for forming addresses of Rom of checked microcontroller, block for decoding control signals, data-reading block, RAM recording block, block of memory access constants for checked microcontroller, block for forming addresses of checked microcontroller, block for forming start setting signal for controlling microcontroller, RAM reading block, block for forming RAM addresses and power buses.

EFFECT: higher efficiency.

3 dwg