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Reversible semiconductor switching device operating for inductive load Device includes four keys, a constant voltage source and an inductive load. Thyristors are used as the first and the third keys, and transistors are used as the second and the fourth keys. A cathode of each of the thyristors is connected to an anode of the corresponding diode and the anode is connected to the cathode of the corresponding diode. The second output of the first key and the first output of the second key are combined and connected to the first load output. The second output of the third key and the first output of the fourth key are combined and connected to the second load output. |
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Mis-transistor based power switch Invention relates to pulse engineering. A MIS-transistor based power transistor comprises a transformer, a limiting resistor, two diodes and an n-p-n transistor, between the base and emitter of which a resistor is connected; the end of the secondary coil of the transformer is connected to the source of the MIS-transistor; the transformer includes an additional secondary coil, the beginning of which is connected to the end of the secondary coil of the transformer and the end of the additional secondary coil is connected through the limiting resistor to the base of the n-p-n transistor, the collector-emitter junction of which is connected in parallel to the gate-source leads of the MIS-transistor; the switch further includes a third diode and two capacitors; all diodes and capacitors are connected on a positive pulse multiplier circuit; the input of the multiplier is connected to the secondary coil of the transformer and the output is connected to the gate-source leads of the MIS-transistor. |
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Ternary t-trigger and ternary reversible counter built thereon Set of inventions relates to digital computation hardware, particularly, to non-binary circuitry and aims at creation ternary triggers and counters. Ternary T-trigger comprises ternary circuit unit, ternary two-input adder, ternary D-trigger and five threshold elements of ternary logic. |
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Output cascade for cmos chips with device for protection against electrostatic discharges Output cascade with the device for protection against electrostatic discharges (ESD) in addition contains two negative OR gates and negative AND gates, two output transistors, two control transistors, and one of them, control n-channel transistor is connected by the source to the output bus, by the gate - to the earth bus, and by the drain - to the gate of the output p-channel transistor, in turn, another control p-channel transistor is connected by the source to the output bus, by the gate - to the power supply bus, and by the drain - to the gate of the output n-channel transistor, and also the gate of the key n-channel transistor is connected to the input of negative AND gate, and the gate of the key p-channel transistor is connected to the input of negative OR gate. |
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Invention is related to a method for switching of a current phase rectifier with an insulated gate bipolar transistor (IGBT) (T1) of reverse conductance operating in the diode mode to the IGBT of reverse conductance operating in the IGBT-mode (T2). The technical result is reached due to switching of the IGBT transistor (T1) operating in the diode mode upon completion of a preset time interval (ΔT1) upon change in a control signal (S*T1) of this IGBT (T1) into the off-state; thereafter switching-on of the IGBT transistor (T2) operating in the IGBT-mode takes place upon the preset time interval (ΔT3) upon change in a control signal (S*T2) of this IGBT (T2) into the on-state, at that this time interval (ΔT3) is essentially bigger than the time interval (ΔT1) of the IGBT transistor (T1) operating in the diode mode; thereafter the IGBT (T1) operating in the diode mode is switched off as soon as the current starts passing in the IGBT (T2) operating in the IGBT-mode with reverse conductance. |
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Period-voltage converter comprises bipolar pulse generator, the first and second short pulse generators, inverter, the first and second controlled integrators, summator. |
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Invention is intended to implement any of five simple symmetric Boolean functions, which depend on five arguments - input binary signals, and can be used in digital computer systems as a code conversion tool. The device comprises eleven majority elements, five information and three configuring inputs. |
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Three-channel shaper of voltages with phase shift Invention relates to radio engineering and is intended for use in phase shifting circuits to obtain symmetric three-phase voltage. The device contains three frequency dividers connected to the generator of periodic pulses of voltage, each of which contains a row of series connected, identical triggers having direct and inverse outputs, in one of frequency dividers the triggers are connected to each other by direct outputs, and in two other frequency dividers the triggers are alternately connected with each other by direct and inverse outputs, in one - from the direct output, in another - from the inverse output. |
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Invention relates to switching media for computer systems and can be used as a component part of a high-speed serial multichannel transceiver. The servo feedback transmitter comprises a clock generator connected to a phase-locked-loop frequency control, a multiplexer connected to a controller, a shift register, a pulse response controller, a pulse response controller decoder, an output buffer, a stable current source, a main digital-to-analogue converter, wherein the transmitter is provided with an additional digital-to-analogue converter and a decoder for the additional digital-to-analogue converter, connected to a receiver, to control the minimum allowable swing of the differential voltage of the output signal of the transmitter from the current receiver intersymbol interference correction depth. |
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Pseudorandom sequence generator Invention relates to the field of automatic equipment and computer facilities, cryptographic coding and information transmission and can be used for creation of generators of random sequences of impulses of long non-repeating duration. The device contains the timing unit, the control and configuration unit, the unit of generation of pseudorandom sequences, the unit of software setting of structure of feedback and initial condition of the generation unit, the unit of software setting of the code of structure of output sequence, the unit of analysis of structure of output sequence, the code comparison unit. |
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Current control signal corrector Invention relates to power electronics, in particular to the devices forming an information signal on value of loading current and can be used in power key PWM control circuits in AC/DC impulse input voltage converters. The corrector of feedback current control signal contains the transformer current sensor connected to the power key circuit with a power key control unit, comprising a primary winding intended for receipt of the measured current impulses, while its secondary winding is connected to a load through a resistor shunted rectifier, with current feedback formation. |
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Small-sized pulse-width modulator resistant to ionising radiation Invention relates to facilities for formation of secondary power supplies (SPS) of the equipment of control systems of space-rocket and aircraft engineering items, and also robotic complexes. In the modulator the high-voltage output of the power unit is connected to the power input of the parametrical shaper of output impulses, to the first and the second inputs of the feedback signal amplification unit the error signals formed by the respective power supply feedback are supplied. The power unit consists of the switching unit, the control unit, the low-voltage power supply unit, the reference-voltage source, the high-voltage power supply unit, and the saw-tooth generator in turn consists of the trigger, the offset unit, DC generator, the frequency setting unit. Note that DC generator and the trigger of saw-tooth generator, and also DC generator of dead time shaper are implemented resistant to ionising radiation. |
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According to the first version the impulse generator comprises a storage capacitor, a diode coupled back-to-back to an emitter-base junction of an avalanche transistor, which base is connected through a limiting resistor to the source of the cutoff voltage, a charging choke, a power supply source, at that the storage capacitor is connected by its first output to a collector of the avalanche transistor and by its second output it is connected through a load to an emitter of the avalanche transistor and common wire. According to the second version the impulse generator comprises the storage capacitor, the limiting resistor, the charging choke, which first output is connected to the power supply source and its second output is connected to the collector of the avalanche transistor, the control transistor, to which collector the second output of the limiting resistor is connected, at that the base of the control transistor through a stabilitron is connected to the emitter of the avalanche transistor and through a bypass resistor to its emitter and common wire. |
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Switching circuit and semiconductor module Switching circuit comprises: the first switching element; the resistor inserted between the control electrode of the first switching element and the control circuit which controls the switching for the first switching element; both the first capacitor and the second switching element, connected between the control electrode of the first switching element and the electrode on the side with low potential of the first switching element. The electrode on the side with high potential of the second switching element is connected to the control electrode of the first switching element. The electrode on the side with low potential of the second switching element is connected to one electrode of the first capacitor. Another electrode of the first capacitor is connected to the electrode on the side with low potential of the first switching element. The control electrode of the second switching element is connected to the electrode of the resistor connected to the control circuit. |
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Portable electronic device, particularly electronic card with optical switch Invention relates to portable electronic devices, particularly electronic cards with a switch which is actuated by a user in order to activate an electronic unit. The technical result is achieved through a portable electronic device which includes an electronic unit and a switch which is associated with the electronic unit, wherein said switch includes two independent photodetectors which receive light on the same surface of the portable electronic device and which are sufficiently far from each other to enable the user to cover one photodetector with one finger, and a logic circuit to which first and second illumination signals are transmitted, said signals coming from the two photodetectors, respectively, and if the first and second illumination signals correspond to different logic states, triggers the switch. |
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Control method of charging device of capacitive energy storage unit with dosing capacitors Invention relates to control methods of charging devices of energy storage capacitors and can be used in electrophysical units with capacitive energy storage units. It is proposed in the control method of charging devices of a capacitive energy storage unit to change operating frequency during the initial charging phase as a function of a current voltage value of the capacitive energy storage unit, and to choose its value during the basic phase based on the required maximum power value in a charging cycle. |
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Multiple-valued logical element of reverse cyclic shift Device contains an input and an output, two auxiliary transistors, two shift voltage sources, four current mirrors, two power supply buses, an additional reference current source. |
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Device has N interfacing devices which are galvanically separated from their inputs, the positive pole of power supply of the device is connected to the positive supply input, and the negative pole to the negative power input of the first separating interface device. The outputs of 1, 2, 3 … and (N-1)th interfacing devices are connected to the negative power inputs of respectively the second, the third, … Nth interfacing devices, and the negative power inputs of N interfacing devices, starting from the first and ending with (N-1)th, are connected to the positive power inputs of respectively the second, the third … Nth interfacing devices, and the output of Nth interfacing device is connected to the first lead of the polarising winding of the polarised relay the second lead of which is connected to the negative power input of N-th interfacing device. In the offered technical solution the logical function "AND" with any quantity of N inputs is implemented and one polarised relay is used. |
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Transistor key with short-circuit protection Transistor key with short-circuit protection comprises a load, a semiconductor switch, a switch-off circuit for the semiconductor switch, a NOR element, an OR element, the first, second, third, fourth, fifth and sixth resistors, n-p-n- and p-n-p-transistors, a relay element, a relay element operation level setter, a diode, the first and second power supply bus, a common bus. The switch-off circuit for the semiconductor switch comprises the p-n-p- and n-p-n-transistors, the first, second, third and fourth resistors and an inverter. |
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Braking radiation pulse shaping device Braking radiation pulse shaping device contains the generator with the inductive storage and the electrically fused series connected conductors with different diameters, the accelerating tube with the vacuum diode with the "inversed" cathode, the attenuating discharger, the diameter di and the length li of the electrically fused conductors 2 are determined by the formulas: , where di - is the diameter of the electrically fused conductor; W - the power stored in the generator; ρ - wave resistance of discharge loop; , where li - length of series connected electrically fused conductors; Si - area of their cross section, γ - specific electric resistance; ρ - wave resistance of discharge loop; k≥0.03 - empirically found proportionality coefficient. |
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Multi-valued logical gate of reverse end-around shift Device contains a current input and a current output, four input transistors with merged bases which are connected to the first bias voltage source, four input transistors with another type of conductivity with merged bases which are connected to the second bias voltage source, three current mirrors matched with the first bus of power supply, four current mirrors matched with the second bus of power supply, four reference current sources. |
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"minimum" gate contains the first and the second inputs of the device, the output, the first auxiliary transistor the base of which is connected to the first bias voltage source, the second auxiliary transistor with another type of conductivity the base of which is connected to the second bias voltage source, and emitters of the first and the second auxiliary transistors are integrated, the first current mirror matched with the first power supply bus, the second current mirror matched with the first power supply bus, the first input of the device is connected to the input of the first current mirror, the second input of the device is connected to the input of the second current mirror the output of which is connected to the integrated emitters of the first and second auxiliary transistors, the third current mirror matched with the second power supply bus to which the collector of the second auxiliary transistor is connected, the output transistor. |
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Power supply sources for marine deperming stations Fundamentals of the invention include the usage of capacitive energy storage and a pulse-width modulation principle to increase accuracy in the maintenance of the preset parameters for deperming pulses. |
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Device for protection from piracy and falsification of integrated circuits Invention relates to semiconductor microelectronic devices and specifically to devices for protection from piracy and falsification of integrated circuits (IC), which are embedded in an IC chip. The device for protection from piracy and falsification of integrated circuits comprises, embedded in the chip of an authentic integrated circuit, a first logic register with elements for inputting an identification number (label) by a trusted integrated circuit manufacturer through working or auxiliary leads of the integrated circuit and which block subsequent input of another identification number. The device further includes a second logic register with elements for inputting, by the user of the integrated circuit, an identification number known to said user and a logic coincidence circuit with elements for outputting information on authenticity and permission for normal operation, in which the identification number stored in the first logic register of the integrated circuit is compared with the identification number in the second logic register, and if the identification numbers match, normal operation of the integrated circuit is allowed. |
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Variable duration and interval rectangular pulse sequence generator Device comprises four Schmitt triggers, an arbitrarily shaped oscillation source, three two-way switches, a dc voltage source, two voltage dividers, an integrator, a signal multiplier, two subtractors and an adder. |
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Transformer technique for transistor control Invention relates to transistor control and can be used in automation, telemechanics and robotics. A transformer technique for controlling a transistor is characterised by that the output controlled power circuit of the transistor is galvanically decoupled at the base with the low-ampere control circuit by transformer coupling of the secondary coil of the transformer, which may or may not have a core, wherein the control circuit has a catcher as the primary coil of the transformer, which may have a power supply independent of the controlled circuit. |
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Each binary decimal code comprises four RS-triggers, forty one OR elements, four OR elements, twelve NOT elements and two control inputs. |
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Invention is used in electrical engineering. Matching of the three-phase three-wire power line with electric load is achieved as a result of compliance with certain conditions which can seasonally change as a result of change of primary parameters of three-phase three-wire power line determined in view of the size of sag of each wire of this power line. Seasonal change of sag of each wire is measured using distance meters. The matching consists in comparison of the valid and reference load resistance, voltages at the ends of the line or currents coming to a load. Initial data on voltage and current in the line are obtained through interfaces or sensors made in a form of voltage or current transformers, spectrum analysers, voltage dividers or alternating-current shunts. As a result of initial data processing by the processor control signals are generated for correcting elements, which can be represented by direct voltage regulators of power transformers, automated process systems, electric energy accumulators, active power sources such as low-power hydroelectric power plants or electric power plants of other types. |
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Switching device with series connection of junction field-effect transistors Invention relates to switching devices. The device includes series connection of at least two junction field-effect transistors (JFET) (J1-Jn), where the next JFET (J2-Jn) are connected in series to the bottom JFET (J-1), wherein a ladder circuit for stabilising the gate voltage of the JFET (J1-Jn) is connected between the second lead (2) and the first lead (1). In each case, an auxiliary circuit (5) is connected between gate leads (GJ2, GJ3,…GJn) of said next JFET (J2-Jn) and corresponding cathode leads of diodes (DAV) of said ladder circuit. Owing to said auxiliary circuit during dynamic connection and in stationary on state, potential at the corresponding gate lead is higher than the potential of the associated source lead. |
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High-power crimping solid-state relay module and method of its manufacturing Crimping solid-state relay comprises voltage-regulating trigger module (1), connecting element (2), copper terminals of the first and second contact rods (3, 10), square block (5) hold down by fixing screws (4), the third (11) and fourth (6) contact rods, integrated circuit (7) SCR1, integrated circuit (12) SCR2, the first (13) and second (8) ceramic elements, fixing screws (9) of connecting element, base (14). Relay manufacturing process envisages placement of high-voltage insulating layer around ceramic elements (13, 8), back-to-back connection of integrated circuits (7, 12) between the third (11) and fourth (6) contact rods, placement of connecting element (2) to the first and second contact rods (3, 10) for back-to-back output of the signal from integrated circuits (7, 12), which trigger electrodes are connected to outputs of the trigger module (1). |
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Invention relates to outputting linearly variable signals, analogue-to-digital conversion of said signals and image formation. The apparatus comprises a voltage supply unit configured to supply a plurality of voltages having different amplitudes, a current supply unit, an integrated circuit configured to output linearly variable signals, and a capacitive element, wherein the voltage supply unit is connected to one terminal lead of the capacitive element, and the integrated circuit and the current supply unit are connected to the other terminal lead of the capacitive element. |
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Electronic device, method of controlling electronic device and storage medium Invention relates to computer engineering. An image capturing device, having a determination means for determining a photographic scene based on an image captured by image capturing means; a receiving means for receiving a help instruction for displaying a help screen and a display control means for controlling display, in accordance with the reception of the help instruction by said receiving means, of a description relating to the photographic scene determined by said determination means as a help screen, wherein during display of a description relating to the determined photographic scene on the help screen, said display control means displays a see-through image captured by said image capturing means, such that the see-through image is visually perceptible. |
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Method of stabilisation of parameters of high-voltage impulses Invention relates to gas-discharge engineering, in particular to circuits of high-voltage impulse generators with the gas-discharge current switch and the inductive energy accumulator, and can be used at creation of high-voltage impulse generators with stable parameters. The offered invention differs in that the circuit of actuation of a gas-discharge switching device, containing an inductive energy accumulator, a gas-discharge current breaker, a control circuit, temperature control sensor, an amplifier and a voltage regulator, has the gas-discharge switching device hydrogen generator heating voltage negative feedback. |
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Storage capacitor charge arrangement Invention relates to electrical energy capacitive storage charge arrangements widely used in pulse engineering and can be used for slow charging of a capacitor of an electrical energy capacitive storage from a current source of restricted power. The device includes a constant voltage source and a current transformer, the first output of the secondary winding of which is connected to the first electrode of the storage capacitor, and the second electrode of the storage capacitor is connected to the second output of the secondary transformer winding, and an emitter of the controlled key includes a current sensor, the output of which is connected to the comparator input, and the comparator output is connected to the pulse generator input, the output of which is connected to the control input of the controlled key, and the second input of the pulse generator is connected to the output of the voltage comparator, the output of which is connected to the current sensor in the secondary winding of the transformer. |
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Device comprises eleven majority elements (11,…, 111) and three tuning inputs. |
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Device comprises eleven majority elements and four tuning inputs. |
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K-digit logical "maximum" element Proposed element comprises device first and second logical inputs, device output, first auxiliary transistor, second auxiliary transistor of the other conductivity, first current mirror with input connected to device first logical input, second mirror with input connected to device second logical input, third and fourth current mirrors, first and second matching transistors. Note here that first current output of second current mirror is connected with integrated emitters of first and second auxiliary transistors. First current output of first current mirror is connected with third current mirror current input. Output of the latter is connected with integrated emitters of first and second auxiliary transistors. Second current output of first current mirror is connected to collector of first auxiliary transistor and emitter of first matching transistor its collector being connected to input of fourth current mirror. Third current output of first current mirror is connected with second current output of second current mirror, connected to emitter of second matching transistor and to current output of fourth current mirror. |
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Logic element for equality comparison of two multi-value variables Logic element for equality comparison of two multi-value variables includes first and second device current inputs and a device current output; first and second output transistors with integrated bases, which are connected to a first bias voltage source; third and fourth output transistors of another conductivity type with integrated bases, which are connected to a second bias voltage source; the emitters of the first and third output transistors are integrated and connected to the first device current input, and the emitters of the second and fourth output transistors are connected to each other; a first reference current source, a first current mirror interfaced with a first power supply bus, a second mirror interfaced with the first power supply bus. |
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Matrix command generator comprises data receiving buses 1 and 2 of columns and rows, a data write input 3, registers 4 and 5 of rows, first decoders 6 and 7 of columns, groups of switches 8 and 9 for switching columns and rows, matrix buses 10 and 11 of columns and rows, power buses +E and -E. |
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Jfet transistor serial connection diagram Invention relates to electronic circuitry, and more specifically, to a switching device with serial connection of JFET transistors. The device contains at least two JFET transistors, connected in series (J1-J6) (field p-n junction FETs). The lowest of these (J1) is connected to the first output (1) either directly or in cascade via a control switch (M). The device also contains at least one complementary JFET (J2-J5), and JFET (J6), which is the most distant one from the lowest JFET (J1) and therefore is called the uppermost JFET (J6), connected to the second output (2) via a drain link. There is a stabilising circuit (D11-D53) connected between JFET (J1-J6) gates and the first output (1). There is also a complementary circuit connected between the gate output (G6) of the uppermost JFET (J6) and the second output. This circuit serves to correct the potential at the gate output (G6) of the uppermost JFET (J6) to the potential at the drain output (D6) of the same JFET (J6). |
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In the known on delay integrated circuit containing input transistor of p-n-p type and output transistor of n-p-n type with load in collector circuit the input transistor base is coupled to current-setting circuit, emitter is coupled to power supply bus and collector is connected to the first output of capacitor, the second output of capacitor and emitter of the output transistor are interconnected to the first output of the capacitor, the second output of the capacitor and emitter of output transistor are coupled to the common bus, base of the output transistor is connected to the first output of the resistor, the input transistor is made as a lateral structure with auxiliary area of p-type, which is placed inside insulated n-well of the input transistor between its collector and boundary of this n-well insulating area. |
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Multi-module generator of high-voltage pulses with multi-terawatt power Invention is related to power supply facilities intended for survey installations in different areas of physics of high energy density. In the device a system of module high-voltage pulse generation is based on a double graded generating line (DGGL), and a pre-pulse commutator consists of cell-type tubes actuated at the drop of the first positive voltage half-wave generated by DGGL, at that the inner ground electrode of DGGL forms a paraxial cavity, wherein booster cables are placed for start-up of cell-type tubes for the pre-pulse commutator. |
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Logical element of loose comparison for inequality of two multivalued variables This device comprises first and second current inputs (1) and (2), current output (3), first and second output transistors (4) and (5) with combined bases, third and fourth output transistors (6) and (7) of the conductivity type with combined bases, first reference current source (8), first current mirror (9) coupled with power supply bus (10), second current mirror (11) coupled with second said bus (12), extra current mirror (13) coupled with second power supply mirror (12), first and second extra voltage sources (14) and (15). |
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Device comprises a group of n inverters for variables, n groups of transmitting transistors, n is number of input variables, up to 2i, i=1, n transistors in a group, group of 2n adjustment inverters, output inverter, inputs of n variables, 2n of adjustment inputs, group of 2n for switching adjustment off, auxiliary inverters, transistors for switching alternative circuit on, a group of six auxiliary transmitting transistors, supply voltage input, "Zero Volt" input, error output, output of the device. |
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Multidigit logical element of cyclic shift Device comprises three current mirrors, two sources of reference current, two sources of shift voltage, four output transistors. |
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Device comprises two transistors, two collector resistors, two interstage capacitors, each being connected to collector of one transistor and base of another transistor. Flip-flop incorporates two extra transistors, two extra collector resistors and two feed resistors with extra transistors. Extra transistors are connected by their emitters to bases of appropriate main transistors. Besides, said extra transistors are connected by their bases and collectors via base feed resistors and collector resistors with power supply. |
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Invention is intended to execute logic functions and can be used in digital computer systems as a means of processing binary codes. The method is carried out by executing any of the logic functions x1~x2~x3~x4, x1⊕x2⊕x3⊕x4, const 0, const 1. The device comprises fourteen switches (111, …, 142). |
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Invention is intended for use in integral logic devices based on complementary unipolar field transistors of metal-oxide-semiconductor (MOS) structure with induced channels of p- and n-conductivity and bipolar transistors of n-p-n and p-n-p structures. Logic gate comprises MOS-keys with p- and n- conductivity, which source outputs are connected to buses of positive and negative supply poles respectively, emitter followers at bipolar transistors of n-p-n and p-n-p structures, which collectors are connected to buses of positive and negative supply poles respectively while emitters are connected to the logic gate output; MOS-keys with p- and n- conductivity are represented as more than two complementary pairs, wherein in each such pair source outputs of MOS-keys are connected and coupled to bipolar transistor base of the respective emitter follower. |
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Logical comparison element of k-digit variable with threshold value Logical comparison element contains a current input (1) of the device and a current output (2) of the device, the first (3) and the second (4) output transistors with the integrated bases, the third (5) and the fourth (6) output transistors of another type of conductivity with the integrated bases, and emitters of the first (3) and the third (5) output transistors are integrated, and emitters of the second (4) and the fourth (6) output transistors are connected to each other, the first (7) and the second (8) sources of pedestal current, the first (9) current mirror matched with the first (10) bus of the power supply, the second (11) current mirror matched with the second (12) bus of the power supply. |
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K modulo multiple-valued adder Modulo k multiple-valued adder contains three current inputs, three output transistors with the integrated bases, two offset voltage sources, three output transistors of another type of conductivity with the integrated bases, five current mirrors, two power supply busbars. |
Another patent 2551188.