Multi-input adder by module two

FIELD: computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in digital computing devices, as well as in end fields GF(2ν) elements formation devices. Technical result is achieved by using new activation function in hidden layer, use of synaptic weights ωi,j, equal to one, which enables to eliminate synaptic weights multipliers from formal neuron structure, as well as elimination from neuron structure of output layer of unit,implementing activation function calculations.

EFFECT: technical result consists in reduction of system expenses required for multi-input adder realization by module two.

1 cl, 1 dwg

 



 

Same patents:

Neurocomputer // 2553098

FIELD: physics, computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in designing strapdown inertial reference systems which are part of automatic control systems for highly-manoeuvrable ships, aircraft, space rockets and spacecraft in particular, as well as mobile robotic systems which are characterised by operability in extreme conditions. The device includes a microprogramme control unit, two matrix neuroprocessor units, an operational device, matrix memory, a secondary power source, a communication unit, authorised access memory and an environment sensor.

EFFECT: faster matrix computations.

23 cl, 20 dwg

FIELD: electricity.

SUBSTANCE: device contains two adders, two "OR" elements, two delay elements, counter, decoder, code memory, four "AND" elements, weight coefficient memory unit, training unit, memory unit for weight coefficients, training unit, multiplier, activation function selection unit.

EFFECT: implementation of various functional relations of output frequency and input code, and improvement of ability of the converter to adjust a multiplicative component of errors of sensors.

2 tbl, 1 dwg

FIELD: medicine.

SUBSTANCE: simulator comprises a number of neuron-like elements each of which contains synaptic weight changing units, a summation unit, a comparator, a converter, a random number generator, a multiplier unit, a pulse strobing unit and a prolongation unit controlling the comparator, as well as a summation unit with a regenerative loop.

EFFECT: improving the accuracy of the neural network simulation taking into account the real properties of the human and animal cerebral neurons, better understanding of the processes taking place in the prototype neuron, the use of the reproduced signal processing processes in the nerve cells to re-create artificial intelligence systems.

4 dwg

FIELD: information technology.

SUBSTANCE: device includes a plurality of neuron-like base elements (BE) which are grouped into modular units such that outputs of like BE are orthogonal to inputs of other BE and are separated by a dielectric film with a semiconductor layer. The neuron-like BE has a multipoint input for reception and summation of electrical signals, a working output and a signal processing unit, having a threshold voltage former, a comparator and two normalised voltage formers.

EFFECT: simple design of the device, broader functional capabilities thereof and a more complex category of problems solved.

10 cl, 7 dwg

Neuroprocessor // 2473126

FIELD: information technology.

SUBSTANCE: invention can be used in designing computing means for systems for controlling highly manoeuvrable aviation and space-rocket objects where there is need for fast computation of functions, for example, trigonometric functions, used in matrix transformations when solving tasks of forming an inertial coordinate system based on information from angular velocity sensors, and when solving tasks for maintaining operating capacity of computers during changes in parameters of LSI elements due to the effect of natural or artificial ionising radiations. The device has a unit for communication with an on-board computer or which controls a higher level subsystem, a control device, a buffer register, a memory device, multipliers, an adder and an output register.

EFFECT: fewer faults in microchips.

5 cl, 5 dwg

FIELD: physics.

SUBSTANCE: method comprises steps for: obtaining seismic data for an area of interest; obtaining an initial seismic cube using said seismic data, wherein the initial seismic cube is a three-dimensional representation of the seismic data; generating a plurality of shifted seismic cubes within the area of interest using said seismic data and a shifting parameter, wherein each of the plurality of shifted seismic cubes is shifted from the initial seismic cube; and wherein the shifting parameter defines a direction and a range that the initial seismic cube should be shifted; generating a neural network using the initial seismic cube, the plurality of shifted seismic cubes, and well log data; and applying the neural network to said seismic data to obtain a model for the area of interest, the model being configured for use in adjusting an operation of the wellsite.

EFFECT: high accuracy.

20 cl, 19 dwg

FIELD: information technology.

SUBSTANCE: in an ophthalmic-microsurgical computer local area network for vitreoretinal operations, formatting devices are in form of a radial-annular structure consisting of a single set of automated workstations (AWS), which synchronously or asynchronously functioning, processing, converting, transmitting, analysing, synthesising hierarchical structures of an artificial neural network: diagnosis AWS (DAWS), ophthalmic-microsurgical AWS (OMAWS), subsequent operation stages AWS (SOSAWS), component AWS (CAWS), surgeon's operating unit (SOUAWS), with opposite forward and reverse flow of information in between, where each AWS has at least one neural circuit, interconnected identification units (IU), an interpolation unit (INU), an extrapolation unit (EU), which are the neural network converting and transmitting elements (NNCTE), a decision unit (DU), which is the neural network analysis and synthesis element (NNASE).

EFFECT: simultaneous improvement of accuracy of determination and quality of identifying diagnoses, determining indications for conducting operations, high selectivity when conducting operations, accuracy in determining the sequence of operations, simulating operations, accuracy in choosing the anaesthetic method, accuracy of providing implants and expendable materials, optimisation of flow of information and necessities during vitreoretinal ophthalmic-microsurgical operations.

1 dwg

FIELD: physics.

SUBSTANCE: neuron simulation method is based on calculation of squares of Euclidean distance from the input vector to each of 2n vertices of a unit n-dimensional cube in weighting units, and multiplication of values inverse to these distance values with components of the target vector respectively, and then summation in an adder and conversion in the activation unit through an activation function.

EFFECT: possibility of simulating a neuron of any given Boolean function from a complete set of from n variables.

6 dwg, 1 tbl

FIELD: information technology.

SUBSTANCE: multilayer modular computer system has several layers, including a neural network layer, a transport layer and a processor layer, wherein the transport layer contains network controller-router modules, the processor layer contains processor modules, and all the said modules have multiple inputs and outputs connected to each other and connected to the inputs and outputs of the system. The processor modules train neural network domain modules.

EFFECT: high decision speed, possibility of grafting layers and modules in each layer during operation of the system with a complex task, high reliability of the computer system.

3 cl, 1 dwg

FIELD: information technologies.

SUBSTANCE: invention may be used for building of modular neural computers, which function in symmetrical system of residual classes. Stated neuron network comprises unit of neuron network of end ring of senior coefficient generation for generalised positional system of numeration, unit of polarity shift, unit of error detection, buses "with errors" and "without errors".

EFFECT: reduced hardware complexity.

3 dwg

FIELD: physics.

SUBSTANCE: device comprises the set of input registers for storage of number composed by the code of symmetric system of remainder classes. Permanent registers are used for storage of interval-position characteristics of constant, i.e., a positive number in symmetric system of remainder classes. Besides, it incorporates the unit for computation of interval-position characteristics and unit to test for accuracy of interval-position characteristics. Also, it includes comparator of interval-position characteristics and two-way binary decoder.

EFFECT: higher response and control over accuracy of sign definition.

3 dwg

FIELD: information technology.

SUBSTANCE: presented positions are provided by using a novel interval-positional characteristic of modular arithmetic, which approximates the relative value of a number in a modular presentation from two sides. The device comprises groups of input registers for storing modular numbers to be compared, units for calculating interval-positional characteristics, a unit for bitwise comparison of modular numbers, units for verifying interval-positional characteristics, a unit for comparing interval-positional characteristics and a two-input binary decoder.

EFFECT: faster operation and enabling verification of a comparison result.

4 dwg

FIELD: information technology.

SUBSTANCE: device has a device start input, a group of shift registers, a synchronisation unit, a device output, three-input AND element units, a modulo 2 adder, a group of data inputs, a group of control inputs of the device, a group of orthogonal base computing units, each having memory units, a modulo adder, a register, an index-to-element converter and a multiplier.

EFFECT: high rate of conversion.

2 dwg, 2 tbl

FIELD: information technology.

SUBSTANCE: method is realised on a universal multi-core computer, having g k-bit cores, each facilitating a system of f operations which include algebraic multiplication and algebraic addition of numbers presented in position integer data formats. When facilitating multiplication operations, each number, multiplier and multiplicand, is presented in a modular-position format with a floating point in form of a (1+k+q·n)-element vector.

EFFECT: high rate of computation by replacing the operation of multiplying t-bit position mantissas of multiplicands with n concurrently executed operations of multiplying q-bit character positions of numbers in a residue number system.

FIELD: information technology.

SUBSTANCE: device includes input registers for temporary storage of bits of the initial number, memory for storing products and a parallel adder.

EFFECT: faster operation of the device for determining the sign of a number and reducing equipment.

3 dwg

FIELD: information technology.

SUBSTANCE: device includes input registers, sign determining circuits, number polarity shifting circuits, look-up tables (memory) for storing constants and an adder, an XOR element and a number sign analysis circuit.

EFFECT: faster operation of the device and cutting hardware costs.

3 dwg

FIELD: information technology.

SUBSTANCE: method comprises steps of: concurrently writing the remainder on base p1 of a multiplicand in memory elements; concurrently counting the number of units bi in each column of the i-th matrix; shifting the binary number b1 one bit to the right; summing with a number b2; shifting the obtained sum b2s one bit to the right and summing with a number b3. Similarly, the obtained sums are shifted and summed with subsequent numbers to obtain a sum b2*m1s, wherein the least significant bit of the number b1 is the first multiplication bit s1, the least significant bit of each obtained sum bis is the i-th multiplication bit. The binary number b2*m1s is shifted; the least significant bit of the obtained number is the (2*m)-th bit of the determined product s2*m. If s is greater than p1, the obtained product s is corrected by successive subtraction of the base p1 from s until s is less than p1, otherwise correction is not performed; similarly, products of m-bit residues on the rest of the bases are calculated and corrected; the powers of multipliers are simultaneously summed up and the resultant sum is the power of the determined product.

EFFECT: faster computation.

2 dwg

FIELD: information technology.

SUBSTANCE: device has an n-bit adder, an (n+1)-bit adder, a multiplexer and a register.

EFFECT: broader functional capabilities due to introduction of the modulo addition operation.

1 dwg

FIELD: information technology.

SUBSTANCE: remainder on base pi of a multiplicant is concurrently recorded in matrix memory elements of the i-th multiplier; the number of units bi in each column of the i-th matrix is concurrently counted; the binary number b1 is shifted by one bit to the right and summed with number b2; the obtained sum bs2 is shifted by one bit to the right and summed with number b3. Similarly, the obtained sums are shifted and summed with subsequent numbers to obtain a sum bs2*m-1, wherein the least significant bit of the number b1 is the first multiplication bit s1, the least significant bit of each obtained sum bsi is the i-th multiplication bit. The binary number bs2*m-1 is shifted, the least significant bit of the obtained number is the (2*m)-th bit of the determined product s2*m. If si is greater than pi, the obtained product si is corrected by successive subtraction of the base pi from si until si is less than pi, otherwise correction is not performed; powers of multipliers are simultaneously summed up and the resultant sum is the power of the determined product.

EFFECT: faster computation.

2 dwg

FIELD: information technology.

SUBSTANCE: invention can be used in digital computers as well as digital signal processing devices and cryptographic applications. The device has logic elements NOT, AND, OR.

EFFECT: high speed of operation of the adder due to parallel execution of the modulo addition operation.

1 dwg, 1 tbl

FIELD: computers.

SUBSTANCE: device has N blocks for calculating remainders, each of which has N devices for calculating remainders from bases of modular notation scale, including multiplication blocks, module adders of 3N numbers and tabular calculators.

EFFECT: higher speed of operation.

5 dwg, 1 ex

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