Misphasing estimation module, misphasing compensation module and coherent receiver

FIELD: radio engineering, communication.

SUBSTANCE: invention relates to communication engineering and can be used in wireless communication systems. Disclosed is a misphasing estimation module for estimating misphasing between a first signal of a first data path and a second signal of a second data path in a coherent receiver. The misphasing estimation module comprises a phase detector and an integrator. The phase detector is configured to detect the phase of the first or second signal to obtain a signal phase. Further, the integrator is configured to integrate the obtained signal phase to provide the misphasing estimate.

EFFECT: high communication reliability.

9 cl, 25 dwg

 

The LEVEL of TECHNOLOGY

The present invention relates to a module skew estimation for estimation of skew between the first signal of the first data path and a second signal of a second data path in a coherent receiver. Additionally, the present invention relates to a module skew compensation to compensate for the estimated skew and to the coherent receiver, in particular coherent optical receiver, which includes a module skew estimation and compensation module skew.

An important goal of fiber-optic communication systems is to transmit high bandwidth data over the longest distance without signal regeneration in the optical region. Due to the given constraints on bandwidth imposed by the optical amplifiers and, ultimately, by the fiber, may be important to maximize the spectral efficiency. Most computers use the binary formats of modulation, such as amplitude coding manipulation of one bit per character.

Improved modulation formats in combination with coherent receivers offer the possibility of high capacity and spectral efficiency. Polarization multiplexing, quadrature amplitude modulation and coherent detection can provide vyigryshno� combination for long-distance optical transmission of high-capacity, since they offer the possibility of encoding information in all available degrees of freedom.

Additionally, commercial devices using the QAM constellation are available in optical systems 40 and 100 GB/s.

In this respect, Fig.15 shows a schematic block diagram of a coherent optical receiver 1500. Coherent optical receiver 1500 has an analog section 1501 of the receive (Rx) and the digital part 1503 receive (Rx).

Rx analog section 1501 has a local oscillator (LO) 1505 and 90° hybrid 1507, having two poles. Hybrid 1507 receives the optical signal. Four optical front module (OFE) 1509, 1511, 1513 and 1515 are connected to a hybrid 1507. Each block 1509-1515 OFE is connected to one unit 1517, 1519, 1521, and 1523 automatic gain control (AGC). Additionally, each block 1517-1523 AGC is connected to analog-to-digital Converter (ADC) 1525, 1527, 1529 and 1531.

In detail:

Because the digital signal is converted into both polarization 90° hybrid 1507 is used to mix the input optical signal with the local oscillator signal (LO) oscillator LO 1505, which gives the result of four output signals, namely, two signal polarization. Optical OFE 1509-1515 configured to convert a corresponding electrical signal to an optical signal. Corresponding OFE 1509-1515 may include a photodiode and transim�adunsky amplifier (TIA). Since the signal strength can change over time, blocks 1517-1525 AGC can compensate for variations in signal strength. Four blocks 1517-1525 AGC can also be an internal part of blocks 1509-1515 OFE.

Due to the complexity of a pair of units AGC can be operated by one control signal. For example, a pair of blocks 1517, 1519 AGC can be controlled by the control signal VXAGCfor X polarization. Additionally, a couple of blocks 1521, 1523 AGC can be controlled by a control signal VYAGCfor Y polarization. Additionally, four blocks 1517-1523 AGC can be controlled by four independent control voltages or control signals.

The signals output blocks 1517-1523 AGC, can be quantized by the ADC converters 1525-1531. Four Converter ADC 1525-1531 can output X-polarized in-phase signal (XI), X-polarized quadrature-phase signal (XQ), Y-polarized in-phase signals (YI) and Y-polarized quadrature-phase signal (YQ).

Additionally, four quantized digital data stream XI, XQ, YI and YQ are further processed in block 1533 digital signal processing (DSP) Rx digital part 1503. DSP 1533 may contain a portion 1535 software and part 1537 hardware. Part 1537 hardware can be fast compared to the slow part 1535 prog�mnogo components. Block 1533 DSP may be configured to compensate for chromatic dispersion (CD), polarization mode dispersion (PMD), polarization rotation, nonlinear effects, LO noise, LO frequency offset and the like. Moreover, evaluation of slow processes, such as frequency offset or CD LO may be exercised in part 1535 software block 1533 DSP.

Additionally, Fig.16 shows a schematic block diagram of basic blocks 1600 DSP. DSP 1600 has a part 1601 of the software and part 1603 hardware. Part 1603 hardware has a block 1605 adjust the offset and gain (AGC).

Connected to the unit 1605 AGC has two block 1607 and 1609 compensation: unit chromatic dispersion (CD) for X polarization block 1607 and 1609 CD compensation for Y compensation.

Additionally, block 1603 hardware contains a block 1611 restore frequency and block 1613 compensation and depolarization polarization mode dispersion (PMD) and chromatic dispersion (CD) connected to a block 1611 recovery. Unit 1613 PMD/CD compensation, and depolarization may contain a filter with finite impulse response (FIR).

Moreover, the block 1615 estimation synchronization adopts the findings of block 1609 CD compensation and unit 1613 PMD/CD compensation and depolarization to provide information about synchronization in VCC 1617.

Pokeblock block 1613 1619 recovery carrier is connected to the unit 1621 decoding detection.

Further, between the data paths, providing the input signals X, XQ, Y, and YQ, are United four ADC 1623, 1625, 1627 and 1629. In detail:

After the correction of offset and gain by block 1605 four signals are aligned for chromatic dispersion in the frequency domain using two units 1607 and 1609 fast Fourier transform (FFT). The frequency offset may be removed in block 1611 restore frequency. Tracking polarization, PMD compensation and residual CD compensation can be performed in the time domain using FIR filters 1613, as an example, made with butterfly shape is emphasised by the structure (velocity filter).

Unit 1619 recovery carrier configured to provide a residual frequency offset and carrier phase reconstruction. When using differential decoding at the transmitter side (not shown), the differential decoder can be used in a block 1621 decoding and demodulation of the frame.

Additionally, the CD can be effectively compensated in block 1607 and 1609 FFT. Function CD compensation can be

where λ0the wavelength of the signal, fs- sampling frequency, N is the FFT size, c is the speed of light, n is the number of coefficients, L is the fiber length, D is the dispersion coefficient.

For reasons of complexity tol�to one unit 1701 FFT with complex input can be applied to each polarization, as illustratively shown in Fig.17. Inverse FFT (IFFT) 1703 may be identical FFT 1701, although the real and imaginary parts are swapped on the input and output.

Between the unit 1701 FFT and IFFT unit 1703 unit is connected 1705 inverse chromatic dispersion (CD-1).

Four ways data, as illustratively shown in Fig.16, may have a different length or delay. As a consequence, different incoming instances cause penalties, including substantial fines depending on the actual channel conditions and delay values of the data. For example, in transmission systems 112G QPSK with symbol length of about 36 PS, penalties due to I/Q skew shown in Fig.18. Fig.18 x-axis shows the I/Q skew and y-axis shows the required OSNR at BER of 0.001. It can be noted that the skew of 5 PS can give the result of 1 dB OSNR penalty. This value skew can be expected 112G in coherent receivers. Skew may be caused because of the different functions of the transmission 90° hybrid, OFE, AGC, ADC and connections between them. Additionally, the skew between the two polarizations may not cause significant difficulties, as it may show up as an additional differential group delay (DGD). This skew can be compensated for through the use of a FIR filter. However, in this case DGD operating range may be reduced pic�edstam skew values. As a result, it may be desirable to compensate also the X/Y skew.

On the other hand, skew affects the performance of the clock recovery, when all four data paths are used to highlight synchronization.

May be more difficult when the residual dispersion should be compensated after the FFT block in the block FIR. Results for 112G QAM with RD-340 PS/nm is shown in Fig.19. In particular, Fig.19a shows a signal constellation from a CD without skew, and Fig.19b shows also for skew 8 PS. Additionally, it can be noted that the Y polarization may have more problems than the X polarization even after 50 updates the FIR filter.

For compensation of skew, offset delay paths between XI, XQ, YI and YQ data can be measured by applying an identical optical signal, in particular single polarization, all of the photodetectors in the factory calibration process. This can be done by disabling LO and increase the power of the signal. Overall, the directly detected signal can be obtained for all of the photodetectors. Then, the data blocks may be transmitted to a personal computer (PC) or from a variable FIFO buffer or after a fixed filter, and all filters provide a single pulse response.

The data is then m�gut be interpolated and cross-correlated between the four data paths. Relative peaks can be used to determine the relative timing offset. In particular, the FIFO can be compensated at the minimum skew of the sampling period.

Summary of the INVENTION

The goal achieved by the present invention is to estimate the skew, which is smaller than the sampling interval of the coherent receiver.

According to the first aspect proposes a module skew estimation for estimation of skew between the first signal of the first data path and a second signal of a second data path in a coherent receiver. The grader skew contains phase detector and integrator. The phase detector configured to detect a phase of the first signal or the second signal to obtain a phase signal. Additionally, the integrator configured to integrate the received signal phase to provide an estimated skew.

According to some variants of implementation of specific skew, which is less than the sampling interval of the coherent receiver can be estimated and, therefore, be compensated. Thus, according to some variants of implementation of skew as a result of aging, temperature changes, switching devices, and the like, may be assessed and, therefore, compension�tsya. According to some variants of implementation of this assessment skew is flexible and may accelerate when the skew is small. In this case, this assessment skew can use all of the phase detectors are available to provide information about the synchronization.

Additionally, according to some variants of implementation of this assessment skew is resistant to a large skew. In this respect, the phase detectors can be switched in steps, when they satisfy the predefined limits of skew. In particular, the maximum skew that can be compensated between the two data lines is half of the symbol period. This can be extended up to one period of the symbol, if you add a skew between the polarizations X and Y.

According to some variants of implementation of the present evaluation of the skew can be performed at slower speeds in the DSP part of the coherent receiver, in particular in parts of the software DSP. The grader skew can be built entirely in software or entirely in hardware. Additionally, portions of blocks to be allocated synchronization hardware can be used for estimation module skew, for example, only the outputs �Usovich detectors. In addition, the data blocks can be loaded into the software for processing.

In particular, the coherent receiver has at least two data paths or data line. For example, the coherent receiver is a coherent optical receiver.

Moreover, the estimation of the skew can use the data to block FIR coherent receiver according to some variants of implementation. This feature is already required in some optical coherent receivers, so there may not be any additional effort or cost of the hardware.

Additionally, according to some variants of implementation estimated skew can be precisely controlled. Additionally, this assessment skew can be applied in any coherent receiver with multiple data paths.

Suppose the example FIR filter, designed to compensate for up to RD-340 PS/nm, and having a limited number of coefficients. Since the discovery of the FIR filter becomes critical for some skew, this assessment skew can be used to enhance the effects of skew.

According to the first form of embodiment of the first aspect, the first signal is in-phase signal and the second signal is a quadrature-phase signal.

According to the second �Ormes embodiment of the first aspect of the module estimation of the skew has a first phase detector for detecting a phase of the first signal, to obtain the first signal phase, a second phase detector for detecting the phase of the second signal to obtain a second signal phase, the subtraction module to output a difference between the received first signal phase and a signal obtained by the second phase and integrator for integrating the output signal of the difference to provide an estimated skew.

The subtraction module can be any of the subtracting means, which is configured with the ability to calculate the mentioned difference signal between the two signals phase. Additionally, the integrator may be by any medium or means of integration, which is configured with the ability to integrate or count the output signal of the difference to ensure the estimated skew.

According to a third form of embodiment of the first aspect of the module estimation of the skew has a first phase detector for detecting a phase of the first signal to obtain a first signal phase, a second phase detector for detecting the phase of the second signal to obtain a second signal phase, the subtraction module to output a difference between the received first signal phase and a signal obtained by the second phase, the low-pass filter for filtering the output of the difference signal and an integrator for integrating the filtered signal is different�STI, to ensure that the estimated skew.

The low pass filter may be a lowpass filter with an infinite impulse response (IIR). A lowpass filter can be configured with the ability to smooth out the differences between the phase detectors.

According to the fourth form of embodiment of the first aspect of the module estimation of the skew has a first phase detector detecting a phase of the first signal to obtain a first signal phase, a second phase detector for detecting the phase of the second signal to obtain a second signal phase, the subtraction module to output a difference between the received first signal phase and a signal obtained by the second phase, the low-pass filter for filtering the output signal of the difference, a determiner to determine the sign of the filtered difference signal to obtain a signal of the sign, and an integrator for integrating the signal to provide an estimated skew.

The output signal of the sign by means of the determinant can be calculated and the initial digital value of the estimated skew, in particular estimated IQ skew, can be displayed. After some time of convergence of the difference of phase detectors may be close to zero, thus, the angular value at the output of the integrator is East�TES the value of skew. This value can also be monitored.

According to the fifth form of embodiment of the first aspect of the module estimation of the skew has a monitor to check estimated skew provided by the integrator.

According to the sixth form of embodiment of the first aspect of the module estimation of the skew has four phase detector for detecting the corresponding phase of X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal to obtain a signal corresponding to the phase, and a summation module for providing the sum signal by adding the four phase signals. In this sixth form of embodiment of each data path is connected to one block. The corresponding block includes a subtraction module to provide signal to the difference between the sum signal and the corresponding signal phase provided by the relevant data, a low pass filter for filtering the output signal of the difference, a determiner to determine the sign of the filtered differential signal to obtain the signal sign, and an integrator for integrating the signal to provide an estimated skew of the corresponding signal� phase, secured by the relevant data.

The sixth form of embodiment of the first aspect may be applicable in situations where the skew is not too large and does not affect the recovery clock signal. In the case of large skew can be recommended to use one data path for information about sync and add other data paths when the signal is eliminating skew. It can be noted that the above-mentioned phase detectors can also work with complex data (I+jQ). The complexity of a comprehensive and valid phase detectors can be comparable.

Any form of embodiment of the first aspect may be combined with any form of embodiment of the first aspect to obtain another form of embodiment of the first aspect.

According to the second aspect of the proposed payment module skew to compensate for skew between a first signal of the first data path and a second signal of a second data path in a coherent receiver. Payment module skew above contains the module estimation of the skew of the first aspect or any forms of embodiment of the first aspect. The grader skew configured with the capability to provide the estimated Rasta�iruku between said first and second signals. Payment module skew configured with the ability to compensate for the skew between the first and second signals in dependence on the estimated skew.

According to some variants of implementation of the compensation or elimination of skew can be carried three different ways. The first way would be to control the phase of the ADC sample rate. The second way would be to eliminate the skew in the frequency domain, and the third way would be to eliminate the skew in the time domain. Phase control ADC sampling rate and the elimination of the skew in the frequency domain weakens the requirement to restore the clock signal and the blocks of the FIR filter, while eliminating skew in the time domain improves the performance of the FIR block.

Additionally, according to some variants of implementation data after the block FIR can also be used to estimate the skew. This may weaken the requirements to evaluate skew when DGD and SOP is reaching critical limits for the phase detectors used to measure skew.

According to the first form of embodiment of the second aspect of the module skew compensation has at least one phase shifter for shifting the phase of at least one of PHE�first and second signals to control the phases of the sampling analog-to-digital Converter.

According to the second form of embodiment of the second aspect of the module skew compensation has the adapter for the adaptation module of the fast Fourier transform of the optical receiver to correct the estimated skew skew in the frequency domain.

According to a third form of embodiment of the second aspect of the payment module skew has a controller for adjusting interpolator optical receiver to correct the estimated skew skew in the time domain.

Any form of embodiment of the second aspect may be combined with any form of embodiment of the second aspect to obtain another form of embodiment of the second aspect.

According to a third aspect of the proposed payment module skew to compensate for the skew between the X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal in the coherent receiver. The module skew compensation module contains skew estimation sixth form of embodiment of the first aspect. The grader skew configured with the ability to provide appropriate graded skew X-polarized in-phase signal, X-�polarisavenue quadrature-phase signal, Y-polarized in-phase signal and Y-polarized quadrature-phase signal. Moreover, the compensation module contains four skew a phase shifter for shifting the phase of the corresponding phase of X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal depending on the respective estimated skew.

According to the fourth aspect of the proposed optical receiver, in particular coherent optical receiver. The optical receiver contains the above-described estimation module skew to ensure the estimated skew between the first signal of the first data path and a second signal of a second data path.

According to the form of embodiment of the fourth aspect, the optical receiver has a module of assessment of synchronization to ensure recovery of clock synchronization in the optical receiver and adapter for the adaptation of the module estimation of synchronization depending on the estimated skew.

According to the fifth aspect of the proposed system, in particular a communication system, wherein said system comprises at least one optical receiver in the network connection.

According to the sixth aspect is provided a method for estimating the skew between the first�galom the data path of the first signal and the second signal of the second data path in a coherent receiver. The method has the step of detecting a phase of the first signal or the second signal to obtain the signal phase. Additionally, the method has the step of integrating the received signal phase to ensure the estimated skew.

According to the seventh aspect of this invention relates to a computer program containing program code for estimating the skew between the first signal data paths of the first signal and the second signal of the second data path in a coherent receiver, which is executed on at least one computer.

The grader skew can be any means of estimating the skew. Payment module skew can be any means of compensating for skew. Appropriate means may be implemented in hardware or in software. If the tool is implemented in hardware, it can be implemented as a device, such as a computer or as a processor or as part of a system, e.g. a computer system. If the tool is implemented in software, it can be implemented as a computer program product as function, procedure, program code or as an executable object.

BRIEF description of the DRAWINGS

Additional embodiments of this izobreteny� will be described in relation to the following drawings, in which:

Fig.1 shows a block diagram of one embodiment of module assessment skew,

Fig.2a shows a diagram illustrating the characteristics of the TEDC phase detector according to Alexander (Alexander),

Fig.2b shows diagrams illustrating the characteristics of the TEDC phase detector according to Gardner (Gardner),

Fig.3a shows diagrams illustrating the characteristics of the TEDC for XY skew 0,125 UI and IQ skew of 0.25 UI

Fig.3b shows diagrams illustrating the characteristics of the TEDC for XY skew 0,125 UI and IQ skew of 0.5 UI,

Fig.4 shows a chart illustrating the characteristics of the TEDC for X polarization with the IQ skew of 0.125 UI

Fig.5 shows a block diagram of a first embodiment of the module skew compensation,

Fig.6 shows a block diagram of a second embodiment of the module skew compensation,

Fig.7 shows a diagram illustrating a VCO processing data XI,

Fig.8 shows a block diagram of a third embodiment of the module skew compensation,

Fig.9 shows a block diagram of a fourth embodiment of the module skew compensation,

Fig.10 shows a diagram illustrating the simulation results of eliminating skew,

Fig.11a shows a diagram illustrating a signal constellation with� compensated skew,

Fig.11b shows a diagram illustrating a signal constellation with 8 PS skew,

Fig.12a shows a block diagram of the configuration of eliminating skew to adjust the phase of the ADC sampling rate,

Fig.12b shows a block diagram of the configuration of the correct skew for the interpolation in the time domain,

Fig.12c shows a block diagram of the configuration of the correct skew for the interpolation in the frequency domain,

Fig.13 shows a chart illustrating the results of eliminating skew in the frequency domain,

Fig.14 shows the sequence of steps of the method for estimation of skew,

Fig.15 shows a schematic block diagram of a coherent optical receiver,

Fig.16 shows a schematic block diagram of basic blocks, DSP,

Fig.17 shows a schematic block diagram block CD compensation,

Fig.18 shows the OSNR penalties due to skew,

Fig.19a shows a diagram illustrating a signal constellation with CD and without skew, and

Fig.19b shows a diagram illustrating a signal constellation with CD and 8 PS skew.

Detailed description of embodiments of the invention

Fig.1 shows a block diagram of one embodiment of module 100 skew estimation.

The module 100 skew estimation can be part of koger�/ receiver, in particular, the coherent optical receiver. The estimation module 100 skew configured with the ability to estimate the skew between the first signal 101 of the first data path and the second signal 103 of the second data paths in the optical receiver. The estimation module 100 skew is the phase detector 105 for detecting a phase of the first signal 101 or the second signal 103 to obtain a phase signal 107. The estimation module 100 skew receives the first signal 101 or the second signal 103. Signal 107 phase output of the phase detector 105.

Additionally, the module 100 skew estimation is the integrator 109. The integrator 109 is configured with the ability to integrate the received signal 107 phase to provide an estimated skew 111 between said first signal 101 and the said second signal 103.

In particular, the first signal 101 is an in-phase signal and the second signal 103 is a quadrature-phase signal.

Subsequently describes additional details and implementation options. In digital communication systems a key aspect of each receiver is recovery circuit a clock signal that allocates the frequency and phase of the incoming data and forces a local source of clock pulses to detect the received data with a symbol rate of at corresponding discrete phase�tion. There are several phase detectors for use in digital systems. For example, it is proposed that the phase detector Muller (Mueller) and Mulera (Muler) (M&M PD). Additionally, a phase detector, proposed by Alexander - (Alex-PD). Moreover, Gardner describes an additional phase detector (Gard-PD).

Moreover, each phase detector (PD) can be well described by the characteristics of the synchronization errors (TEDC), the maximum value TEDC (TEDCMAX) and RMS jitter (RMSJ). All the above-mentioned phase detectors belong to the group annepona detectors. They can be used for receiving the data skew, and, therefore, these proposed phase detectors can be used as the phase detector 105 of Fig.1, for example. Additionally, Fig.2a and 2b presents TEDC for Alex-Gard PD and-PD. It can be noted that the phase characteristics are always the same for all four data paths, since there is no skew between them. Without loss of generality, the phase type detectors Gardner subsequently used to output skew information.

Additionally, Fig.3a shows diagrams illustrating the characteristics of the TEDC for X/Y skew 0,125 UI and IQ skew of 0.25 UI (UI: unit interval). When comparing Fig.3b shows diagrams illustrating the characteristics of the TEDC for X/Y R�of spasibki 0,125 UI and IQ skew of 0.5 UI.

In relation to figs.3a, one can observe that the skew shifts the characteristics of the TEDC. As a result, the full TEDC decreases. It may also increase the jitter voltage controlled oscillator (VCO). With a skew of 0.5 UI TEDC disappears (see Fig.3b). The maximum value of the equivalent TEDC is a 2.5 e-3, which makes the VCO is not stable with the loss of timing information.

Fig.4 depicts a chart illustrating the characteristics of the TEDC for X polarization with the IQ skew of 0.125 UI. Fig.4 there are three TEDC corresponding to XI of the timing information, XQ information about synchronization and XI+XQ timing information, respectively. Depending on the scenario VCO, VCO can take either both TEDC curves for XI of the timing information and XQ timing information, either one of them to highlight clock.

Assuming the first scenario, TEDC uses both. Equilibrium point, namely VCO phase sampling, lies between the characteristics of the TEDC for XI and XQ. The equilibrium point may be indicated by a positive zero crossing TEDC. It can be noted that XQ TEDC has a positive amplitude and XI TEC has a negative amplitude in the specified VCO phase sampling at the point of equilibrium. This information can be used to guide, for example, the equilibrium phase XQ PD to the phase equilibrium XI PD. As a result, the phase ravenous�I XI+ XQ PD becomes closer to the equilibrium point XI PD automatically.

Fig.5 shows a block diagram of a first embodiment of the module 500 skew compensation. The module 500 skew compensation module has 501 skew estimation, HS ASIC 503 and CMOS ASIC 505. HS ASIC 503 has a PI filter 507, VCO 509, four Phaser 511 and four ADC 512. CMOS ASIC 505 contains FFT 513, the interpolator 515, the module 517 estimation and synchronization FIR filter 519.

Due to tolerances on jitter and delay data using CMOS ASIC 505 requires recovery of a clock signal of a direct link in coherent receivers. After block 513 FFT timing information is displayed and used in the interpolator 515. Also, this timing information is filtered and applied to a VCO of the phase-frequency control and regulation via module 517 evaluation of synchronization and PI filter 507. The data blocks to the block 519 FIR periodically loaded into the DSP, in particular in a piece of software, for CD evaluation, initial calculations of taps of the FIR and the like. The same data can be used to estimate the skew. Module 501 skew estimation in DSP estimates the skew between the data paths and passes this information to the blocks that depend on the preferred scenario of eliminating skew. Eliminating skew can be carried three different ways: phase Control ADC sampling rate (shown� by reference sign (A), eliminating skew in the frequency domain (shown by reference sign (B) and the elimination of the skew distortion in the time domain (shown by reference sign C).

A and B can broadcast a recovery clock signal and blocks FIR filter, along with the fact that C can improve the performance of block 519 FIR.

Moreover, the data after the block 519 FIR can also be used for module 501 skew estimation. This may weaken the requirements to evaluate skew when DGD and SOP is reaching critical limits for the phase detectors in the evaluation of the skew.

Fig.6 depicts a block diagram of a second embodiment of the module 600 skew compensation. The module 600 skew compensation has a first phase detector 601 for detecting a phase of the first signal (I) 603 to receive the first signal 605 phase. Additionally, the module 600 skew compensation has a second phase detector 607 for detecting the phase of the second signal (Q) 609 to obtain a second signal 611 phase.

Module 613 subtraction configured with the ability to output the signal 615 to the difference between the received first signal 605 phase and the received second signal 611 phase. Filter 617 lower frequencies mentioned takes the signal 615 to the difference. Mentioned filter 617 lower frequencies may be an IIR filter of the lower frequencies. Mentioned� filter 617 low pass filters the output signal 615 to the difference, and outputs the filtered signal 619 difference. The filtered signal 619 of the difference is entered in the key 621. Determiner 621 is configured with the possibility to determine the sign of the filtered signal 619 to the difference to obtain the signal 623 of the sign, which is introduced into the integrator 625. Integrator 625 is configured with the ability to integrate or count the received signal 623 to provide an estimated skew φ. Estimated skew φ can be controlled by the monitor 627 skew. Additionally, the estimated skew φ may be introduced into the modules 629, 631 shift, shifting the I and Q, respectively. This may be particularly relevant if the recovery clock uses both I and Q data to highlight clock signal. For this case, the characteristics of the TEDC are already present in Fig.4. This scenario may be applicable when the skew is not too large, for example, less than 30% of the symbol interval, so that I+Q TEDC is not too small. In particular, the maximum expected skew of around 0.25 UI.

With reference to Fig.4 one can notice that the difference between PD has a negative value. Thus, I data can diskriminirovaniya earlier and Q data. After some time, this difference becomes less and less until, until the equilibrium point of both PD will be identical on�E.

When resynchronizing uses only the I data, as shown in Fig.7, the I shift is not necessary. In this case, the Q data are shifted at full angle, as displayed in the module estimation of the skew. After Q PD eliminating skew Q data can be used to improve the characteristics of the clock signal, as previously mentioned by A and B in Fig.5.

Fig.8 shows a block diagram of a third embodiment of the compensation module 800 skew. The module 800 skew compensation receives four signals, namely X-polarized in-phase signal XI, X-polarized quadrature-phase signal XQ, Y-polarized in-phase signals YI and Y-polarized quadrature-phase signal YQ.

For each of the four input signals XI, XQ, YI, YQ module 800 skew compensation has one phase detector 801, 803, 805 and 807 for the detection of the corresponding phase of the corresponding input signal XI, XQ, YI, YQ.

Additionally, the module 800 skew compensation module has 809 summation to ensure signal 811 amount by summing the four phase signals output by the phase detector 801, 803, 805 and 807.

Additionally, for each of the data paths includes one module 813, 815, 817 and 819 subtraction. The corresponding module 813-819 subtraction provides a signal 21, 823, 825 and 827 of the difference. Referred to the appropriate signal 821-827 difference is entered in the corresponding block 829. Fig.8 shows only one block 829, connected to the first module 813 subtraction. The corresponding block - illustrative block 829 has a filter 831 lower frequencies, the determinant 833, integrator 835 and 837 monitor. Filter 831 lower frequencies may be an MR with a low pass filter. Additionally, the filter 831 lower frequencies configured with the ability to filter the output signal 821 of the difference. The determinant 833 configured with the possibility to determine the sign of the filtered difference signal to obtain a signal of the sign (±1). Integrator 835 configured with the ability to integrate or count the received signal of the sign (±1) to provide an estimated skew φXIfor block 829. Through graded skew φXIXI data can move. Additionally, XQ monitor 837 skew controls the estimated skew φXI.

Fig.9 shows a block diagram of a fourth embodiment of the module 900 skew estimation. The module 900 skew estimation is block 901 FFT, providing data XI, XQ data, data YI and YQ data. Additionally, the module 900 skew compensation has four interpolator 903, 905, 907 and 909 for each of the data XI, XQ data, data YI and YQ data. Additionally, the module 90 skew compensation includes FIR filter 911, coupled to the interpolators 903, 905, 907, 909.

According to the embodiment of the figs.9 only data XI are used in the block estimation synchronization coherent optical receiver. Thus, the VCO of the optical receiver is synchronized with data XI. Interpolators 903, 905, 907 and 909 between the block 901 FFT and block 911 FIR are used to compensate for the latency data, in particular the requirements of the jitter tolerance. Data XQ interpolator 905, YI interpolator 907 and YQ interpolator 909 periodically loaded into the DSP 913 for estimation of skew. Without loss of generality, there is only one processing block (algorithm) in DSP 913 shown for XQ. There are two additional processing unit (not shown) in the DSP 913 for YI and YQ data. The grader skew of Fig.9, implemented in DSP 913 is simple, as there is no need in the comparison circuit. The skew value XQ DSP 913 is passed to block 901 FFT, where can be the operation of removing skew.

In detail, the DSP 913 has a phase detector (PD) 915, a low pass filter (IIR LPF) 917, the determinant of (character (*)) 919, integrator 921, a high-pass filter (IIR HPF) 923 and comparing device 925.

Filter 923 high frequency configured with the ability to produce small values when the skew is small, in particular for the corresponding signal is available�accurate skew elimination in a block 901 FFT. This value can be compared with a reference value in the comparing device 925. When the filter output 923 of high frequency is smaller than the reference value, the signal that activates the corresponding PD is sent to the module 927 estimation synchronization module 900 skew compensation. As a result, after payment of all skew the data path are aligned. Additionally, optimized performance clock recovery and block 911 FIR.

It can be noted that the skew compensation with analog scenario, as shown in Fig.9, may be performed by adjusting the phase of the ADC sampling rate, as shown by A in Fig.5. Additionally, an additional phase shift of the sampling can be performed in the time-domain interpolators, also in the ADC converters. Some phase shift may be added to adjust the phase of sampling. In particular, if is necessary, an additional phase shift of the sampling can be performed in the time-domain interpolators or ADC converters. However, this phase shift can be compensated in the evaluation unit skew by adding some constant values to the perfect integrators (meters).

In this respect, Fig.10 shows a chart illustrating the results of simulation� eliminate skew. In this modeling phase XI sampling was a reference phase, which has not changed over time. Therefore, the VCO was captured on this XI phase sampling. It can be noted that the relative delay between the phases of the equilibrium represents the skew. For simulated 112 G DP-QPSK signal with OSNR of 13 dB was implemented effective elimination of skew using only 1000 characters. Phase sampling changed during the stages UI/128. After 27 iterations for all three ways of data was carried out the elimination of skew. Additionally, Fig.11a shows a diagram illustrating a signal constellation with compensated skew. When comparing Fig.11b shows a diagram illustrating a signal constellation with 8 PS skew.

If the skew is estimated, the skew compensation can be performed in several ways, as shown above. In this respect, Fig.12a shows the configuration of eliminating skew to adjust the phase of the ADC sample rate. Additionally, Fig.12b shows the configuration correct skew for the interpolation in the time domain and Fig.12c shows the configuration correct skew for the interpolation in the frequency domain.

The skew configuration of Fig.12a is a voltage controlled oscillator (VCO) 1201, receiving information about 1203 �ynchronization. Additionally, there are four analog-to-digital Converter (ADC) 1205, 1207, 1209 and 1211 for data XI, XQ data, data YI and YQ data.

Since VCO 1201 operates on the data XI, there are only three Phaser 1213, 1215, 1217, connected to VCO 1201, XQ Phaser 1213 for XQ data, YI Phaser 1215 for data YI and YQ Phaser 1217 for YQ data.

The configuration of the skew for the interpolation in the time domain of Fig.12b is a block 1219 delay for data XI and the corresponding interpolator 1221, 1223 and 1225 for XQ data, for data YI and YQ data.

The configuration of the skew for the interpolation in the frequency domain of Fig.12c has two ways 1227 and 1229, 1227 way takes (t-t) and outputs t, and the path 1229 takes Q (t-tQand outputs Q (t).

To illustrate the results of eliminating skew, Fig.13 depicts a flow diagram illustrating the elimination of the skew in the frequency domain. In detail, Fig.13 shows the signal 1301, sampling 1303 with the skew, sample 1305 corrected for skew, and the adjusted sampling 1307.

Additionally, Fig.14 shows the sequence of steps of the method for estimation of skew between the first signal data paths of the first signal and the second signal of the second data path in a coherent receiver.

In step 1401, the phase of the first signal or the second signal is detected to obtain a� signal phase.

In step 1403 the received signal phase is integrated to ensure the estimated skew between said first mentioned signal and the second signal.

1. The module (100) skew estimation for estimation of skew between the first signal (101) a first data path and the second signal (103) of the second data path in a coherent receiver, wherein the module (100) skew estimation contains:
four phase detector (801, 803, 805, 807) for detecting the respective phase of X-polarized in-phase signal, XI, X-polarized quadrature-phase signal, XQ, Y-polarized in-phase signal, YI, and Y-polarized quadrature-phase signal YQ to obtain the corresponding signal phase,
module (809) summing to ensure signal (811) of the amount by summing the four phase signals and one block (829) for each path data, wherein the corresponding block (829):
module (813) subtraction to ensure signal (821) the difference between the signal (811) the amounts and the respective signal phases, secured through the corresponding data path,
filter (831) low pass filtering the output signal of the difference,
determinant (833) to determine the sign of the filtered differential signal to obtain a signal of the sign, ±1, and
integrator (835) for integration receiving�nogo signal sign to ensure that the estimated skew, φXIa signal phase is provided through the corresponding data path.

2. Module (500, 600, 800) of compensation skew to compensate for skew between a first signal of the first data path and a second signal of a second data path in a coherent receiver, wherein the compensation module skew contains:
module of evaluation of the skew according to claim 1 for providing the estimated skew between said first and second signals, wherein the module (500, 600, 800) of compensation skew configured with the ability to compensate for the skew between the first and second signals in dependence on the estimated skew.

3. The module skew compensation according to claim 2, comprising at least one phase shifter (1213, 1215, 1217) for the phase shift of at least one of the first and second signals to control the phases of the sampling analog-to-digital Converter.

4. The module skew compensation according to claim 2, containing adaptor (1217, 1229) to adapt the module of the fast Fourier transform of the optical receiver to correct the estimated skew skew in the frequency domain.

5. The module skew compensation according to claim 2 comprising a controller for adjusting interpolator optical receiver to eliminate rafailov�and estimated skew in the time domain.

6. Module (900) skew compensation to compensate for the skew between the X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal in the coherent receiver, wherein the compensation module skew contains:
module of evaluation of the skew according to claim 1 to provide the corresponding estimated skew of the X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal, and
four of the phase shifter for the phase shift of the corresponding phase of X-polarized in-phase signal, the X-polarized quadrature-phase signal, the Y-polarized in-phase signal and Y-polarized quadrature-phase signal depending on the respective estimated skew.

7. Coherent receiver that contains the module of estimating skew to ensure the estimated skew between the first signal of the first data path and a second signal of a second data path according to claim 1.

8. Coherent receiver according to claim 7, comprising a module of assessment of synchronization to ensure the recovery of a clock signal in an optical receiver and an adapter for adapting the estimation module for synchronization in�animosty from valued skew.

9. Method for estimation of skew between the first signal data paths of the first signal and the second signal of the second data path in a coherent receiver, wherein the method includes:
the detection of the corresponding phase of X-polarized in-phase signal, XI, X-polarized quadrature-phase signal, XQ, Y-polarized in-phase signal, YI, and Y-polarized quadrature-phase signal YQ to obtain the corresponding signal phase,
do signal (811) of the amount by summing the four phase signals,
do signal (821) the difference between the signal (811) the amounts and the respective signal phases, secured through the corresponding data path,
filtering the output signal of the difference,
the determination of the sign of the filtered differential signal to obtain a signal of the sign, ±1, and
integrating the received signal to provide an estimated skew, φXIa signal phase is provided through the corresponding data path.



 

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