Method to create conducting paths

FIELD: electricity.

SUBSTANCE: method to create conducting paths includes application of solid layers of metallisation onto a non-conducting substrate, formation of a metallisation pattern, application of a protective barrier layer onto created paths and a layer for soldering and/or welding of parts elements onto conducting paths. Application of solid layers of metallisation is carried out by serial application of an adhesive layer onto a non-conducting path, a current-conducting layer and a metal layer that acts as a mask. To form the metallisation pattern, a mask is created by the method of laser evaporation on sections of the metal layer that acts as a mask, which are not occupied with current-conducting paths, then, using selective chemical etching, the conducting paths and the adhesive sublayer are removed in the opened sections, using selective chemical etching, the mask is removed, afterwards the protective barrier layer is applied, as well as the layer for soldering and/or welding.

EFFECT: invention makes it possible to increase quality of a metallisation pattern, to reduce number of operations and to increase process efficiency.

5 cl, 8 dwg, 6 tbl

 

The invention can be used in the formation of conductive paths in electronic engineering, microelectronics, for switching electronic circuits and semiconductor devices,

The level of technology

Conductive paths are conductive drawings metallization used mainly in non-conductive ceramic substrates. Most often, these conductive drawings consist of (1) a layer of electrically conductive metal, for example copper. In some cases, to improve the adhesion layer to the surface of the substrate between them, applied in a thin adhesion layer. Over the copper to protect it from oxidation and migration of copper track metallization is covered with a barrier layer, for example, Nickel. Since these tracks are widely uses the subsequent methods of soldering and welding, then put the top layer consisting of gold (soldering, welding) or tin (solder).

There are ways to create conductive patterns.

Thick-film technology. The most widespread and cheap technology is the so-called "thick-film technology" [1], which consists in applying through the stencil special metal-containing pastes on ceramic and subsequent burn-paste at a high temperature in the kiln in the ceramics with simultaneous removal of the binder and the formation of a layer of metal (figure 2).

Method n which requires expensive equipment and provides high performance. The cost of this process per unit is the lowest of all applied. This method is widely used because of low cost, short production cycle and high performance.

The disadvantages are:

- low resolution of these images metallization. This is due to the limitation of precision stencils and the inevitable erosion of the picture when the burn-in. The resolution of 0.1-0.2 mm is not enough for microelectronic industries that require high resolution - better than 0.05-0.02 mm;

- traditionally used palladium cerebrosidase paste to create drawings. Such pastes have a relatively low temperature viginia. But the negative factor is the presence of silver. Silver is mixed with abnormal mobility, and this impurity diffuses to the deterioration of device parameters with the same figure. More acceptable copper-containing pastes are much higher temperature process viginia. Replacement silver pastes to a more appropriate copper requires a higher temperature furnace annealing in vacuum conditions. This significantly increases the cost of the process;

- poor controllability of the thickness of the metallization. The imperfection of the surface of the metal pattern: blocked edge, high roughness.

- restricted to the types of substrates, in which you can burn metalloceramic pastes.

Thin-film technology. The most acceptable for the production of drawings metallization with high resolution is the so-called thin-film technology to create a pattern of metallization. This technology is typical for the microelectronics industry for contact layers, for example, in the production of microwave devices [2].

The method of creating the conductive pattern includes vacuum deposition of the adhesion of the metal layer (chromium, nichrome, tantalum, and others), sputtering a thin layer of copper, creating a pattern by a photolithography method (deposition of photoresist, the light, the manifestation), galvanic rearing layer of copper to the desired thickness and the barrier layer of Nickel. Then removed the photoresist layer, and etching a continuous layer. For paemst on top of the conductive layer is covered with a layer of gold or tin (containing bismuth).

The method is ideally provides a high resolution picture of the metallization and the ability to control the thicknesses of the layers.

The main disadvantages of the method are derived from mnogoetapnoe process, cycle time, many stages which require complex and precision equipment:

is a multistage process;

- precision and expensive equipment.

There are also disadvantages of the metal figure is Itachi:

galvanic conductive layer has worse properties than the bulk material or a layer obtained by vacuum deposition;

- the surface of the electrically accreted layer has an increased surface roughness;

- due to the technology at the base of the elements of figure inevitable potrawy and the protective layer is not fully closes the conductive layer (Figure 3).

Technology DBC. The literal translation is direct bonded copper [3]. This is creating a pattern of metallization on a layer of copper, Wojennej in the form of a thin foil in the ceramic substrate.

A thin sheet of foil covered surface of the ceramic substrate. Then under the action of pressure and high temperature sintering is a copper substrate.

Next on the copper surface is made drawing using technology similar to the manufacture of printed circuit boards - photolithography followed by etching of the figure (Figure 4).

Disadvantages:

- due to the technological limitations of the thickness of this copper pattern can be at least 100-125 microns. This is a very large copper thickness for subsequent drawing metallization with high quality resolution. In many applications, it requires a much smaller thickness of 15-40 μm, not more;

- the price is high. Significantly higher rates of heat spreaders on thin-film technology.

The closest (prototype) to offer what the procedure is a method of obtaining a conductive tracks by the method of thin-film technology [2].

The advantage of the proposed method in comparison with the closest analogue is:

1) a Significant shortening of the process.

- eliminates the galvanic process rearing conductive layer.

- eliminates multi-step photolithography process.

- eliminates the need to manufacture photomasks pattern of metallization.

2) Increases as the conductive layer. Vacuumsealed conductive layer on the electrical parameters of a higher quality than done galvanochimica way. This layer also on electrical parameters higher than that obtained in another way by thick-film technology.

In contrast to technology DBC, in the proposed method, it is possible to specify the desired thickness of the layer of metallization within wide limits.

3) Eliminates the use of precise and expensive equipment complex photolithography (installation alignment and exposure, application and manifestation of photoresists).

4) the Method is more flexible in application, unlike all of the above. The desired pattern is performed by a laser using a programmable manipulator, quickly rebuilt and adjusted. In thin-film technology every type of figure metallization requires a preliminary manufacturing photomask In thick-film technology requires the manufacture of the stencil. Similarly, in technology DBC.

5) better performance. Since the phase of the direct drawing of figure metallization many times faster (takes several minutes) compared with obtaining a pattern by photolithography (long cycle to a few hours), in addition to the flexibility provided by a high performance.

The proposed technology of applying conductive drawings differs from the above high quality picture metallization, a limited number of operations of process, flexibility and high performance.

The method consists of (1) applying on a non-conductive solid substrate conductive multilayer coating by spraying (e.g., magnetron sputtering). The coating shall consist of adhesive sublayer, which provides the desired adhesion of the metallization to the substrate, a conductive layer made of metal with good electrical conductivity and the upper metal layer acts as a mask for subsequent process.

Next, (2) the resulting metallization layer is exposed to laser exposure (preferably working in short-pulse mode), so that part of the mask evaporates, it may partially evaporate and the conductive layer. Thus, the "apparent pattern of metallization". Next, (3) processed laser emitted is eating the substrate is subjected to etching in a chemical solution. This selective stain does not dissolve the material of the mask, but poisoned the conductive adhesive layer and the substrate exposed from the mask areas.

Then (4) is processed in a different selective chemical provide the Etchant, which removes the mask, but does not react with the conductive layer and the adhesive sublayer.

Next (5) on top of the prepared surface is the chemical deposition of the barrier layer, such as Nickel. On top of which (6) chemical deposition of a layer providing solderability of the surface (and/or welding), it can be a layer of immersion gold or tin.

Applying a continuous layer of metallization is mainly carried out by magnetron sputtering in a single technological cycle for a single process.

As a material of the adhesion sublayer along with other materials used chrome as a material of the conductive layer is copper and the material of the metal layer, acting as a mask, vanadium.

A metal layer acting as a mask, can be obtained by sequential deposition on a substrate of vanadium and titanium.

Chemical properties of the material of the mask are different from the properties of the material of the conductive layer and the material of the adhesion sublayer so that initially provide the Etchant chemical or stain selectively p is storaetsa conductive layer and the adhesive sublayer, when this layer is not dissolved, and then in another provide the Etchant selectively dissolves the layer mask and the conductive layer and the adhesive sublayer does not dissolve.

Creating a pattern on the metal surface by the method of selective evaporation of the laser beam is also known as laser engraving. When laser engraving evaporates pre-deposited on a nonconductive substrate, such as ceramic, the layer of metallization and the predetermined pattern is obtained.

However, the technology of such a "direct painting" has a number of disadvantages:

1) the evaporation Process under the action of laser radiation is not enough control. The amount of evaporated material is highly dependent on many external parameters (optical characteristics of the surface, the temperature in the evaporation zone, the stability of the laser beam and its spatial homogeneity). Therefore, the precision of evaporation required low speed. Otherwise you may as nedodelannye metallization, and the influence of the laser beam on the substrate with its damage (Fig.7).

2) in Addition, the removal of metallization to a greater depth leads to the fact that most of the products of evaporation settles back near the impact zone. Because of this surface with the remaining figure is significantly polluted (Fig.7).

In fact one of the stages of the proposed technology and is laser engraved. However, it is used in the claimed technical solution is only for opening the laser beam, a thin layer of the mask, followed by chemical etching ("manifestation" of the figure) - removing the conductive layer on the exposed areas. Does not require the precision of laser irradiation and its large capacity, because the total number of removed material is small (only the layer mask). Accordingly, the process speed is greatly increased.

Description of the figures.

The figure 1 shows the typical structure of the tracks metallization. Track metallization on a non-conductive substrate (1) usually consists of adhesive sublayer (2) if necessary, the primary conductive layer (3), barrier layer (4)preventing diffusion of the material of the conductive layer and the oxidation layer (5) for soldering or welding

The figure 2 shows the main steps of manufacturing the topology of the chip by way of thick-film technology: a) powerhost non-conductive substrate (1) is applied through the stencil layer paste containing conductive composition; b) the stencil is removed from the surface of the substrate; the substrate is coated with a pattern of the applied paste is placed in the oven, where the reflow of the paste with the removal of her volatile and a binder component; d) the obtained conductive tracks applied chemically bar is Erny layer (4) and on top of it a layer (5) for soldering or razvedki elements of the chip on the conductive paths.

The figure 3 shows the main steps of manufacturing the topology of the chip by way of thin-film technologies (a) on a non-conductive substrate (1) by spraying applied thin metal layers, namely, the adhesive sublayer (2) and over it a thin layer of conductive metal or alloy (3); b)-d) by photolithography on the coated surface creates a pattern in the photoresist with the open areas of Windows, when opened are lots conductive paths topology; (e) method of electroplating in the opened Windows is growing by the thickness of the conductive layer; g) over Doroshenko conductive layer plated the method is applied barrier layer 4 and layer 5 for soldering or razvedki elements of the chip on the conductive tracks; C) the photoresist layer is removed; and a continuous layer of metallization under the remote photoresist is removed by chemical etching

The figure 4 shows the main steps of manufacturing the topology of the chip by way of technology DBC: a) on the surface of the non-conductive substrate (1), applied in a thin copper foil (6), which is sintered to the surface of the substrate under the action of the pressing force and high temperature in the furnace; b)-d) by photolithography on the surface of the copper layer pattern is generated in the photoresist with the open areas of Windows, when tosacrifice the photoresist are areas of conductive paths, topology; (e) chemical etching of the exposed areas is removed, the copper layer; g) photoresist eliminated; C) the obtained conductive tracks applied chemically barrier layer 4 and above it a layer 5 for soldering or razvedki elements of the chip on the conductive paths.

The figure 5 shows the main steps of manufacturing the topology of the circuits proposed method: (a) on a non-conductive substrate (1) for a single process applied adhesive sublayer (2); a conductive layer (3) of the required thickness and layer masks (7); b) laser radiation evaporates the layer mask areas not occupied by the figure tracks the topology may be partial evaporation and the conductive layer (3); C) selective chemical etching in the exposed parts of the image is removed, the conductive layer (3) plating and adhesion sublayer (2); g) other selective herbs-Telem removes the layer mask (7), not dissolving conductive layer (3) and the adhesive sublayer (2); d) the obtained conductive tracks applied chemically barrier layer (4) and on top of it a layer (5) for soldering or razvedki elements of the chip on the conductive paths.

The figure 6 shows a view of the surface of a ceramic substrate of aluminum oxide with conductors (adhesive sublayer - Cr, a conductive layer is Cu, the barrier layer is a Ni layer for soldering - Sn), is received by way of thin-film technology with the increase of the 80's (a) and 500x (b) times.

Figure 7 shows a view of the surface of a ceramic substrate of aluminum oxide (polikor) with conductors (adhesive sublayer - Cr, a conductive layer is Cu, the barrier layer is a Ni layer for soldering - Au)obtained by the proposed method with the increase of the 80's (a) and 500x (b) times.

The figure 8 shows the surface appearance of keramicheskoi substrate of aluminum oxide with pre-applied metal layer (underlayer of Cr, the conductive layer C), the pattern of their conductive paths created by the vaporization laser beam conductive layer and the adhesion sublayer.

Examples of specific implementation of the method

Example 1.

On a polished (Ra<0.1) ceramic substrate of aluminum oxide (polikor) by magnetron sputtering for one process is applied to a multi-layer metallic coating consisting of layers, the characteristics of which are listed in Table 1. The multilayer coating in one process is provided in the magnetron installation that has the appropriate set magnetron targets (Cr, Cu, V).

Next on pulse laser facility designed for the engraving of the picture by scanning the laser beam on the surface of the substrate for a given program is selective evaporation of the upper thin layer of the mask of vanadium. Neoprene are still areas of the tracks. Parameters the market of laser radiation are shown in table 2.

Further, in the selective chemical provide the Etchant composition and conditions of etching are shown in table 3) is the etching of copper to chromium sublayer. Selective not provide the Etchant dissolves the figure of vanadium and does not dissolve the sublayer of chromium.

Further, in the selective provide the Etchant composition and conditions of etching are shown in table 3) is the etching of the underlayer of chromium, not etched figure of vanadium and not etched copper.

Next, in the third selective provide the Etchant composition and conditions of etching are shown in table 3) is discharged mask of vanadium. At the same time provide the Etchant does not react with the copper pattern of conductive tracks and a sublayer of chromium.

After these steps are selective etching remains on the surface pattern of conductive tracks, consisting of a chromium sublayer and the main conductive layer of copper.

Next, a chemical method is deposition on the surface of the conductive tracks of the barrier layer of Nickel followed by chemical methods - layer of gold.

Table 1
The composition and parameters of metallization layers, applied in one process (magnetron sputtering) and their purpose
No. layer from the surfaceThicknessPurpose
1Vanadium (V)1 micronSingle layer mask
2Copper (Cu)20 mmConductive layer
3Chromium (Cr)0.05 μmAdhesive sublayer

Table 2
The parameters of laser radiation to remove the layer mask
Laser typeThe wavelengthDlitelnoi pulsePRFAverage powerThe scanning speed of the beam on the surface
Fiber1.064 μm100 NS20 kHz8 W100 mm/s

Table 3
Options selective etching agents and modes of etching to create a pattern of metallization of the contact tracks
A number of provide the EtchantPurposeThe composition of provide the EtchantThe duration of the etchingAdditional terms
1Etching the conductive layer of copperCrO3- 150 g/l
HNO35 ml/l
HCl to 10 ml/l
5 minIntensive stirring at Room temperature
2Etching adhesive sublayer of chromiumHCl:H2O=1:15 minRoom temperature
3The etching mask vanadiumH2OConc2 minRoom temperature

Example 2.

On polished (Ra<0.6) ceramic substrate of aluminum nitride by the method of magnetron sputtering for one process is applied to a multilayer metal coating, comprising the it layer, characteristics of which are given in Table 4. In this process, as a mask, a two-layer coating is deposited vanadium/titanium. Two-ply reinforced mask necessary in connection with well-developed rough surface of the substrate. In this regard, the surface of the mask will have an increased roughness and to enhance its protective properties, be more complex (double-layer coating), unlike the case with polished surface of the substrate.

The multilayer coating in one process, i.e. in a single technological cycle, is provided in the magnetron installation that has the appropriate set magnetron targets (Cr, Cu, V, Ti).

Next on pulse laser facility designed for the engraving of the picture by scanning the laser beam on the surface of the substrate for a given program is selective evaporation of the upper layer mask consisting of a thin layer of vanadium and titanium. Neoprene are still areas of the tracks. The parameters of laser radiation are shown in table 5.

Further, in the selective chemical provide the Etchant composition and conditions of etching are shown in table 6) is the etching of copper to chromium sublayer. Selective provide the Etchant does not dissolve the vanadium and titanium of the two masks and does not dissolve the sublayer of chromium.

Further, in the selective provide the Etchant composition and conditions of etching is shown in table 6) is the etching of the underlayer of chromium, it does not dissolve the vanadium and titanium two-layer mask and not etched copper.

Next, in the third selective provide the Etchant composition and conditions of etching are shown in table 6) venting layer of vanadium and titanium two-layer mask. At the same time provide the Etchant does not interact with the copper pattern of conductive tracks and a sublayer of chromium.

After these steps are selective etching remains on the surface pattern of conductive tracks, consisting of a chromium sublayer and the main conductive layer of copper.

Next, a chemical method is deposition on the surface of the conductive tracks of the barrier layer of Nickel followed by chemical methods - layer of gold.

Table 4
The composition and parameters of metallization layers, applied in one process (magnetron sputtering) and their purpose
No. layer from the surfaceThe composition of the layerThicknessPurpose
1Titanium (Ti)1 micronTwo-layer mask
2Vanadium (V) 1 micron
3Copper (Cu)20 mmConductive layer
4Chromium (Cr)0.05 μmAdhesive sublayer

Table 5
The parameters of laser radiation to remove the layer mask
Laser typeThe wavelengthDlitelnoi pulsePRFAverage powerThe scanning speed of the beam on the surface
Fiber1.064 μm100 NS20 kHz8 W100 mm/s

Table 6
Options selective etching agents and modes of etching to create a pattern of metallization of the contact tracks
PurposeThe composition of provide the EtchantThe duration of the etchingAdditional terms
1Etching the conductive layer of copperSGAs3- 150 g/l
HNO35 ml/l
HCl to 10 ml/l
5 minIntensive stirring at Room temperature
2Etching adhesive sublayer of chromiumHCl:H2O=1:15 minRoom temperature
3Etching the layer mask - vanadiumH2OConc2 minRoom temperature
4Etching the layer mask - titaniumCON4%:HFend=10:210 secRoom temperature

Literature

1. The technology of thin and thick films for microelectronics: TRANS. from English. / Charles E. Jowett.- M.: metallurgy, 1980. - 112 S. - (V)

2. Getting tonkel the night of the items of chipset/ Bstanley - M: Energy 1977. - 135 [1] C.

3. Handbook of ceramics glasses, and diamonds/C.A. Harper - McGraw-Hill Professional 2001, R.

4. http://www.electrovac.com/sprache2/n160349/n.html

1. The way to create conductive paths, including the application of a continuous layer of metallization on a non-conductive substrate, forming a pattern of metallization, coating on the formed track protective barrier layer and the layer for soldering and/or welding of parts on a conductive track, wherein the deposition of continuous layers of metallization provide consistent application of the non-conductive substrate adhesive substrate, a conductive layer and a metal layer acting as a mask to form a pattern of metallization forming a mask by laser evaporation in areas of the metal layer, performing the role of the mask, not employed conductive paths, then removed by selective chemical etching of the conductive layer and the adhesive sublayer in uncovered areas, selective chemical etching to remove the mask, then put a protective barrier layer and a layer for soldering and/or welding.

2. The method according to claim 1, characterized in that the deposition of continuous layers of metallization carried out by magnetron sputtering in a single technological cycle.

3. The method according to claim 1, characterized in that the material of the adhesion sublayer use x is ω, as a material of the conductive layer of copper is used as material of the metal layer, performing the role of the mask, use vanadium.

4. The method according to claim 1, characterized in that the metal layer acting as a mask, put sequential deposition on a substrate of vanadium and titanium.

5. The method according to claim 1, characterized in that the chemical properties of the material of the mask are different from the properties of the material of the conductive layer and the material of the adhesion sublayer so that initially provide the Etchant chemical or stain selectively dissolves the conductive layer and the adhesive sublayer, while the layer mask is not dissolved, and then in another provide the Etchant selectively dissolves the layer mask and the conductive layer and the adhesive sublayer does not dissolve.



 

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2 cl, 10 dwg

FIELD: ink-jet printers and their printheads having small holes for programmable ejection of ink droplets.

SUBSTANCE: proposed method for producing printhead thin-film interconnection structure includes deposition of resistor layer and conductor layer onto insulated substrate, formation of patterns of layers deposited onto insulated structure to form resistive heating element, formation of insulating barrier layer onto pattern of mentioned conductor layer, formation of window in mentioned barrier layer, production of metal layer contacting mentioned conductor layer pattern through mentioned window whose geometry opens up predetermined area of mentioned conductor layer pattern, and metal layer pads on insulating barrier layer above heating layer; prior to arrangement of conductors from metal layer, insulating barrier layer is treated with etching solution for cleaning and recovering surface insulating barrier layer, and along with wiring of metal layer from mentioned conductor layer pattern through mentioned window in insulating barrier layer on adjacent area of mentioned insulated substrate metal layer wiring section is made in the form of pad on insulating barrier layer above heating element used as stabilizing evaporation surface. In this way insulating barrier layer is cleaned and its properties are recovered, metal layer wiring adhesion to insulating barrier layer, and especially adhesion of metal layer pad to insulating barrier layer above heating element, is enhanced.

EFFECT: enhanced quality and reliability of printhead.

3 cl, 11 dwg

FIELD: producing copper tracks on insulating substrates.

SUBSTANCE: negative image of track is projected onto copper halide solution layer in organic solvent of substrate with the result that concentric capillary flow occurs in layer which transfers solution to illuminated sections of substrate wherein copper halide tracks remain upon solvent evaporation. These tracks are reduced to copper ones in hydrogen current at temperature sufficient to conduct reducing reaction.

EFFECT: facilitated procedure, reduced cost and copper consumption, improved environmental friendliness due to elimination of wastes.

1 cl, 3 dwg

FIELD: microelectronics; complementary metal-oxide-semiconductor transistors.

SUBSTANCE: proposed method for producing CMOS transistor gate regions includes formation of regions of second polarity of conductivity, insulator, and gate silicon dioxide in substrate of first polarity of conductivity, deposition of polycrystalline silicon layer, its doping, formation of gate regions of p- and n-channel transistors, thermal cleaning in trichloroethylene and oxygen, deposition of separating silicon dioxide, modification, formation of drain and source regions of both polarities of conductivity, thermal cleaning in trichloroethylene and oxygen, deposition of pyrolytic insulating silicon dioxide, its modification by thermal firing in trichloroethylene and oxygen, opening of contact windows, metal deposition, and process operations (removal of natural silicon dioxide, formation of gate silicon dioxide, formation of polycrystalline silicon layer) conducted within single vacuum cycle of one reactor, whereupon polycrystalline silicon layer is doped.

EFFECT: improved and regulated electrophysical properties of gate silicon dioxide enabling enhancement of threshold voltage reproducibility and yield.

4 cl, 3 dwg

FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.

SUBSTANCE: proposed method includes production of vacuum in vacuum chamber, sequential electron-beam evaporation of Ti, Al, Ni, and Au in vacuum chamber onto section of AlGaN layer surface, and high-temperature annealing; prior to Ti, Al, Ni, Au evaporation Ti is sprayed in vacuum chamber to form 2-3 Ti monolayer on surfaces of elements disposed within vacuum chamber; Ti, Al, Ni, Au are evaporated onto section of AlGaN layer surface at vacuum of 1 x 10-7 to 1 x 10-8 mm Hg.

EFFECT: reduced contact resistance of ohmic contacts due to reduced amount of residual oxygen and water vapors in vacuum chamber.

1 cl

FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.

SUBSTANCE: proposed method includes sequential evaporation of Ti, Al, Ni, Au onto section of AlGsN surface layer and fast thermal annealing of semiconductor heterostructure; fast thermal annealing is conducted using contact method and graphite resistive heater, semiconductor heterostructure being disposed on heater surface. In the course of annealing temperature of GaN/AlGsN semiconductor heterostructure is controlled to ensure reproducibility of its parameters.

EFFECT: facilitated procedure, reduced time requirement, enhanced quality of heterostructure.

1 cl

FIELD: light devices production.

SUBSTANCE: method of quantum wells mixing within semiconductor device implies: a) formation of layer structure with quantum wells including doped upper layer; b) formation of etch preventing layer over mentioned upper layer; c) formation of temporary layer over mentioned etch preventing layer, and mentioned etch preventing layer has significantly lower etch rate than mentioned temporary layer on condition that etching requirements are preliminary specified; d) process of quantum wells mixing upon device structure making significant violation of at least a part of consumed layer; e) removal of temporary layer from at least device contact area by etching selective relative to etch preventing layer to uncover mentioned etch preventing layer within contact area; and f) formation of contact over layer structure with quantum wells directly on the surfaced uncovered after execution of stage e) at least within mentioned contact area.

EFFECT: improvement of device contact resistance.

15 cl, 10 dwg

FIELD: electronics.

SUBSTANCE: invention pertains to electronics, particularly to microelectronics, and can be used when making silicon semiconductor devices. The method of making a system for metal plating silicon semiconductor devices involves forming a dielectric film based on silicon dioxide on a silicon substrate with active regions, formation in this film of contact windows to active elements of the substrate, deposition of a film of molten aluminium with a given thickness, formation of the metal pattern and subsequent thermal treatment for obtaining ohmic contacts. Thermal treatment is carried out in a hydrogen atmosphere with addition of 0.5-3.0 vol.% water or 0.25-1.5 vol.% oxygen.

EFFECT: higher quality of the system of metal plating due to reduced defectiveness and improved electrical characteristics.

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