Method of making indium microcontacts by ion etching
SUBSTANCE: in the method of making indium microcontacts, a wafer with arrays of large integrated circuits or photodiode arrays is protected by a photoresist film which is perforated at contact points, a layer of indium having a thickness which corresponds to the height of the microcontacts is sprayed, and a photoresist mask is deposited by photolithography. Microcontacts are formed by etching with ions of an inert gas until indium is fully sprays in spaces between the contacts; remains of the photoresist mask on tops of the microcontacts and the bottom protective film are removed in organic solvents or by etching in oxygen plasma.
EFFECT: technique for forming microcontacts by a separating interval at the base.
The invention relates to the technology of indium point contacts for the connection of large-scale integrated circuits (LSI) and photodiode arrays.
One of the problems in the technology photodetector module is to obtain a system of indium pier point contacts as a matrix of photodiodes, and a matrix of silicon VLSI, joined by the method of the inverted crystal.
It is known that the formation of point contacts in the following ways:
1. Spraying a layer of indium thickness of 10-15 μm and chemical etching through a mask of photoresist [C.O bolter, I.D. Burlakov, M.V. Sednev Way to build photodetecting devices. Patent of the Russian Federation. No. 2308788 from 20.01.06].
2. Spraying a layer of indium over the free mask [Klimenko A.G., etc. Especially plastic indium microscopy for matrix FPU on CdHgTe //avtometriya p.4. - 1998. - C.105].
3. Spraying a layer of indium 10-15 μm through a mask of photoresist thickness greater than the thickness of India, and negative profile, followed by "explosion" [Jutao Jiang, Stanley Tsao et.al.. Fabrication of indium bumps for hybrid FPA applications. Infrared Physics and Technology. 45 (2004) 143-151].
4. Electrochemical deposition of indium in the openings of the photoresist [3, Jutao Jiang, Stanley Tsao et.al.. Fabrication of indium bumps for hybrid FPA applications. Infrared Physics and Technology. 45(2004) 143-151].
5. Spraying a layer of indium thickness of 5 μm through a mask of photoresist of a thickness exceeding 15 μm, followed by "Bang" and reflow in polyp the market [Young-Ho Kirn, Jong-Hwa Choi, Kang-Sik Choi, Her Chul Lee, and Choonh-Ki Kim, New Reflow Process for Indium Bump // Proc. of SPIE. 1996 - Vol.3061. - PP.60-67,,. Johann Ziegler, Markus Finck, Rolf Kruger Thomas Simon, Joachim Wendler, "Long Linear HqCdTe arrays with superior temperature-cycling-reliabyti", Proceedings of SPIE Vci. 4028, 2001, Tissot I.L. etc. Collective flip - chip technology for CdHgTe I.R.F.R.A. // Proc. SPIE, 1996. - Vol.2894. - P.115].
These methods have certain limitations when applied to technologies of formation of point contacts in industrial output photodetector matrix with a pitch between elements 15÷30 µm.
In the case of a direct etching the deposited layer of indium through a mask of photoresist dissolution process India is isotropic. Therefore, the minimum distance between the point contacts may not be less than the thickness of India. Thus, when the required height of the point contacts 10÷12 μm and the minimum width of the separating contacts grooves 5 μm, photoresistive mask will Podravina before the end of the etching layer. In addition, due to nonuniform etching area is difficult to make point contacts with the same dimensions on top of the plates more than 4÷5 cm2.
When forming point contacts plating over the free mask is almost impossible to avoid galvanic coupling between the elements of the matrix due to warping of the mask a large area and is associated with podpisaniem.
Deposition of thick layers of India through a mask of photoresist is accompanied by sarestoniemi masks and reduced bore holes. Therefore, the application of this method with step matrix 15÷17 μm and the height of the point contacts 10÷12 mm is very problematic.
Spraying a layer of indium thickness of 5 μm through a thick (15 ám) mask of photoresist followed by an 'explosion' and melt in the hemisphere does not provide the desired height of the point contacts 10÷12 μm due to the insufficient amount of indium in the deposited layer with a small step in the matrix. In addition, remelting is carried out at a temperature of 170°C. heating of the photodiode array to a temperature unacceptable due to the potential for degradation of p-n junctions in some cases.
To form point contacts by the method of electrochemical deposition, widely and successfully used in the manufacture of printed circuit boards, the creation of a continuous electrically conductive layer and then etching the purpose of the galvanic separation of point contacts. Certain difficulties in the implementation of the forming point contacts electrochemical deposition creates a non-uniform thickness of the growing layer and the need to remove residual salt solutions [3, Jutao Jiang, Stanley Tsao et.al.. Fabrication of indium bumps for hybrid FPA applications. Infrared Physics and Technology. 45 (2004) 143-151].
The most optimal method for forming point contacts on the matrix of PSEs and silicon BIS increments of 15÷30 µm is reactive ion etching. Ionized HF gas development is de chemically active ions, accelerated field autopolarity, bombarding the exposed areas of India turns it into gaseous products, pumped by a vacuum pump. Unfortunately connections India have high melting and boiling points. The lowest melting point 207°C at the connection InJ [NS Akhmetov, General and inorganic chemistry. M High school, 1981, S. 679]. Therefore, to obtain a significant increase in the rate of etching of India by the method of reactive plasma etching at a temperature not exceeding 100°C, it is not possible.
A known method of making point contacts of indium ion etching [Baltar C.O, Korneev PPM, among them US, Sednev MV, Applied physics. No. 1, 2011], taken as the closest analogue. Method of etching ions of the inert gas allows to reproduce with precision the dimensions of the mask deposited on the surface of any material. While the etching process is anisotropic in the direction of the ions of the working gas. Speed ion etching India three times greater than the etching rate of the photoresist and the thickness of the photoresist 3-4 μm, the depth of etching India will be 9÷12 μm. The etching rate of the molybdenum is much smaller and equal to 0.2 μm/hour, so for etching indium thickness of 10 μm, a sufficient mask of the Mo thickness of 0.6 μm.
The disadvantage of this method is vozmozhnosti selective spraying of a layer of India. This is a fundamental limitation of the method since all the materials are sprayed, but with different speeds. Therefore, as soon as a layer of indium treated, starts spraying base (photosensitive elements of the matrix or BIS reading)
The objective of the invention is to provide a technology of forming of the system of indium column of point contacts with the height of 4-12 μm in increments of less than 30 μm and a width of the separating their area 3-5 μm as a matrix of photodiodes, and a matrix of silicon BIS, joined by the method of the inverted crystal. The technical result of the invention is industrial technology of formation of point contacts in increments of up to 15 μm., height 4÷12 microns separating gap at the base of 3÷5 μm on the wafer size from units to tens of cm2.
The technical result is achieved by the fact that in the proposed method of fabrication of indium point contacts the plate with matrices BIS or photodiode matrix protects perforated at points of contact with a film of photoresist, sprayed on it a layer of India, the thickness of which is equal to the height of the point contacts, methods of photolithography put a mask of photoresist to form point contacts by etching with ions of inert gas until complete dispersion India in the intervals between contacts and debris removal photoresistive mask on top of point contacts the bottom of the protective film in the organic solvent or etching in oxygen plasma.
The process sequence of the proposed method is illustrated in Fig.1-6.
Figure 1 shows a surface plate with crystals of BIS readout or IR photodiode matrices with metal contacts.
Figure 2 shows the application of a protective layer of photoresist and opening Windows to the metal contacts of the matrix.
Figure 3 shows the deposition of a layer of India.
Figure 4 shows the fabrication of the mask of photoresist on the surface of India for the etching of point contacts.
Figure 5 shows ion etching of indium between the point contacts.
Figure 6 shows the removal of remnants of the photoresistive mask on top of the point contacts and the lower protective film in the organic solvent or etching in oxygen plasma.
On the figures presents the following elements:
1 - plate crystals IR photodiode array or silicon BIS reading;
2 - metal contacts (e.g., vanadium or Nickel);
3 - a protective layer of photoresist;
4 - layer, India;
5 - photoresistive mask;
6 - point contact from India.
Example: production of matrix indium point contacts is carried out in the following sequence:
on Si wafer with matrices BIS reading or matrix of photodiodes with metal contacts (Fig 1) put a protective layer of positive fo is resist thickness of 1-2 μm (figure 2);
- a protective layer of photoresist is dried on a hotplate at a temperature of 100-110°C for 5 min and hold a standard photolithography to open "Windows" to the metal contacts (figure 2);
- on a protective layer of photoresist sprayed sing India, whose thickness corresponds to the height of point contacts (figure 3);
- put the second layer of positive photoresist PPG-4 thickness of 3-4 μm and conduct standard photolithography for the manufacture of the mask (figure 4);
- etching by argon ions with an energy of 500-1000 eV to full atomization of India in places free from the photoresist to form point contacts (figure 5);
- remove the remnants of the photoresistive mask on top of the point contacts and the lower protective film in the organic solvent or etching in an oxygen plasma (6);
Next is cutting plate in a matrix BIS reading or matrix of photodiodes.
The method of manufacture of indium point contacts on semiconductor wafers with matrices BIS reading or photodiode matrices, including the deposition of a layer of India, the protection of places where there should be indium point contacts, a mask of photoresist to a thickness of 3-4 μm, ion etching layer, India, removal of residual photoresist in organic solvents and/or plasma of oxygen, characterized in that before the deposition of India put the protective mask of photoresist with a thickness of 1-2 μm vmesto, where there should be contact.
SUBSTANCE: in the method of making a nanosized conducting element, the initial condensation phase is carried out in a medium of inert gases by magnetic sputtering of material from which a nanowire is formed onto a single-crystal chip for a predetermined time interval t, sufficient for detecting separate nucleation centres of the condensed material on steps. A substrate is placed such that the normal to its surface makes an angle with the direction of flow of the condensed atoms, a priori preventing formation of nucleation centres between steps, but sufficient for formation of nucleation centres of the condensed material on the steps. A microphotograph of the surface of the single-crystal chip is then made, from which density of nucleation centres of the condensed material on the steps and distance between the steps are determined, which are used to calculate the time of formation of the nanowire. The final phase of condensation of the material takes place during a time when there is no electrical conductivity between steps.
EFFECT: simple technique of forming solid-state one-dimensional nanostructures from different metals, semiconductors and alloys thereof, having environmental resistance and higher breakdown voltage.
2 cl, 4 dwg
FIELD: electrical engineering.
SUBSTANCE: method for formation of nanosized structures on semiconductors surface for usage in microelectronics includes formation of a monoatomic thickness buffer layer of gold with formation of an orderly 2D underlayer Si(111)-Si(111)-α√3×√3-Au, subsequent precipitation of 1-3 fullerene layers of onto the 2D underlayer Si(111)-Si(111)-α√3×√3-Au to form a fullerite-like lattice and precipitation of a 0.6 - 1 gold monolayer onto the prepared substrate under extra-high vacuum conditions, the substrate temperature being 20°C.
EFFECT: invention enables controllable formation of ultrathin gold nanofilms with the preset electric conductivity value on a semiconductor substrate surface.
2 cl, 3 dwg
SUBSTANCE: in the method of making an ohmic contact to GaAs, a mask is formed on the surface of an n-GaAs plate, having a doped layer, in order to carry out a lift-off lithography process. To clean the surface in the windows of the mask, the n-GaAs plate is treated in aqueous H2SO4 or HCl solution and then washed in deionised water and dried. Further, via electron-beam and/or thermal evaporation in a vacuum at residual pressure lower than 5x10-6 torr, Ge and Cu are deposited with total thickness of 100-500 nm and weight content of germanium in the double-layer composition equal to 20-45%. Further, in a single vacuum cycle, the n-GaAs plate undergoes first thermal treatment at temperature T1=150-460°C in an atmosphere of atomic hydrogen with hydrogen atom flux density on the surface of the plate equal to 1013-1016 at.cm2 s-1. The n-GaAs plate is removed form the vacuum chamber, and after removing the mask, undergoes second thermal treatment in an atmosphere of an inert gas or in a vacuum at temperature T2=280-460°C for t=0.5-30 min.
EFFECT: lower value of reduced contact resistance.
2 cl, 1 dwg
SUBSTANCE: method of obtaining a thin-film copper-germanium joint involves successive deposition of Ge and Cu layers on the surface of a plate and forming a thin-film copper-germanium joint which is carried out over a time t≥0.5 minutes in an atmosphere of atomic hydrogen at temperature T=20-120°C and hydrogen atom flux density on the surface of the plate equal to 1013-1016 at.cm-2 s-1.
EFFECT: lower temperature and shorter time for obtaining a thin-film copper-germanium joint.
7 cl, 6 dwg
FIELD: material engineering.
SUBSTANCE: method of application of metallic nanolayers in chemical method involves the technology of chemical sedimentation of metals, in particular of copper (Cu) at the speed 1 μm/min with the solution temperature 50 to 60°C. As the basic copper-containing reagent for applying metallic nanolayers on silver electric contacts of silicon solar cells the inorganic copper salts are used. Technical result of the invention is the thickening of frontal electric contact of solar cell by sedimentation of metals, in particular copper, with good electric conductivity, in order to compensate or improve its increased electric conductivity.
EFFECT: increased effectiveness of solar cell operation during transformation of high-density radiation and decreased self-cost of its manufacturing.
4 cl, 4 dwg
SUBSTANCE: in the method to manufacture Cu-Ge ohmic contact on the surface of the plate n-GaAs or epitaxial heterostructure GaAs with n-layer a resistive mask is developed, fims of Ge and Cu are deposited, the first thermal treatment is carried out in the atmosphere of atomic hydrogen at the temperature from 20 to 150°C and density of hydrogen atoms flow to the surface of the plate equal to 1013-1016 at.cm-2 s-1. Plates are withdrawn from a vacuum chamber of a spraying plant, the resistive mask is removed before or after the first thermal treatment, and the second thermal treatment is carried out.
EFFECT: reduced value of the given contact resistance.
7 cl, 1 dwg
SUBSTANCE: method to metallise elements in products of electronic engineering includes application of a sublayer of a metallising coating on one of substrate surfaces with previously formed topology of elements in an appropriate product, and this sublayer is a system of metals with the specified thickness, providing for adhesion of the main layer of the metallising coating, formation of topology - protective photoresistive mask of the main layer of metallising coating, local application of the main layer of the metallising coating, removal of protective mask, removal of a part of the sublayer arranged outside the topology of the main layer of the metallising coating. Application of the sublayer of the metallising coating is carried out with the total thickness of 0.1-0.5 mcm, directly onto the specified sublayer additionally a technological layer is applied from an easily oxidable metal with thickness of 0.1-0.5 mcm, and formation of the metallising coating topology is carried out on the technological layer from the easily oxidable metal. Prior to local application of the main layer of the metallising coating a part of the technological layer is removed from the easily oxidable metal via the specified protective mask, and removal of the remaining part of the technological layer from the easily oxidable metal is carried out prior to removal of a part of the sublayer of the metallising coating arranged outside the topology of the main layer of the metallising coating.
EFFECT: increased quality of the metallising coating and reliability of electronic engineering products, improved electrical characteristics, increased yield of good products.
6 cl, 3 dwg, 1 tbl
SUBSTANCE: proposed method comprises pre-cleaning of GaSb p-junction conductance by ion-plasma etching to depth of 5-30 nm with subsequent deposition by magnetron sputtering of adhesion titanium 5-30 nm-thick layer and platinum 20-100 nm-thick barrier layer, evaporating thermally of 50-5000 nm-thick silver layer and 30-200nm-thick gold layer for contact with ambient medium.
EFFECT: reproducible ohmic contact with low specific junction resistance.
2 cl, 1 dwg
SUBSTANCE: method of depositing platinum layers onto a substrate involves pre-formation of an intermediate adhesion layer from a mixture of platinum and silicon dioxide nanocrystals on a silicon oxide and/or nitride surface. The intermediate adhesion layer with thickness 1-30 nm can be formed via simultaneous magnetron sputtering using magnetrons with platinum and silicon dioxide targets, respectively.
EFFECT: high quality of elements, processes, reliability during prolonged use, adhesion of the deposited layers to the substrate.
8 cl, 3 dwg
SUBSTANCE: method of making an ohmic contact to GaAs based on thin Ge and Cu films involves formation a mask on the surface of an n-GaAs wafer in order to perform lift-off lithography, deposition of thin Ge and Cu films onto the surface of the n-GaAs wafer, first thermal treatment in a single vacuum cycle with the deposition process, removing the n-GaAs wafer from the vacuum chamber, removing the mask and second thermal treatment. First thermal treatment is carried out in an atmosphere of atomic hydrogen at temperature 150-460°C and hydrogen atom flux density on the surface of the n-GaAs wafer equal to 1013-1016 at.cm2 s-1.
EFFECT: low value of the reduced contact resistance of the ohomic contacts made.
4 cl, 1 dwg
FIELD: electronic engineering; integrated circuit manufacture on silicon.
SUBSTANCE: proposed method includes formation of active areas of devices on substrate; masking; opening of contact cuts for active areas; formation of metal deposition system that has amorphous metallide possessing negative mixing heat and incorporating components characterized in higher pressure of inherent vapors or higher sublimation heat than substrate material, and other components of metal deposition system. High stability of metal deposition system provides for manufacturing semiconductor device capable of operating at high temperatures approximately over 650 °C.
EFFECT: provision for preventing ingress of metal deposition system components into active area and escape of impurities from the latter.
6 cl, 2 dwg, 1 tbl
FIELD: micro- and nanoelectronics, micro- and nanomechanics where insulated conductors are used.
SUBSTANCE: proposed method for filling pockets in solid body with conducting material includes coating of solid-body surface, bottom, and side walls of mentioned pockets with first layer that functions as barrier material preventing diffusion of mentioned conducting material in solid body; application of second layer onto first one that functions as wetting layer for conducting material; application of third layer by way of physical or chemical deposition onto third one from gas phase that has in its composition mentioned conducting material; coating of third layer with fourth one that also incorporates conducting material; melting of conducting material by heating and profile leveling; material melting by heating is conducted after applying third layer and fourth layer is applied by any method of physical deposition from gas phase, chemical deposition from gas phase, chemical deposition from solution, electrochemical deposition, or chemical-mechanical deposition.
EFFECT: facilitated procedure, enlarged functional capabilities.
12 cl, 17 dwg
FIELD: ink jet printers.
SUBSTANCE: method includes precipitating resistive layer and conductive layer on insulated substrate, forming a resistive heating element, forming of insulating barrier layer above contour of said conductive layer, forming of gap in said barrier layer, forming of metallic layer being in electrical contact with said conductive layer contour through said gap, having geometry, which opens predetermined portion of said contour of conductive layer, making a layout from metallic layer from said contour of conductive layer through said gap in insulating barrier layer to adjacent portion of said insulated substrate, so that layout from metallic layer on said adjacent portion of said insulating substrate forms a relatively large and flat area, remote from said conductive layer contour, for forming displaced spring contact. After precipitation of resistive layer and conductive layer on insulating substrate, contour of conductive layer is formed first, having a recess, forming later said resistive heating element, and then contour of resistive layer is formed with overlapping of conductive layer contour for value, exceeding precision of combination during lithography process and error of dimensions during etching of resistive layer.
EFFECT: higher quality, higher reliability, higher efficiency.
2 cl, 10 dwg
FIELD: ink-jet printers and their printheads having small holes for programmable ejection of ink droplets.
SUBSTANCE: proposed method for producing printhead thin-film interconnection structure includes deposition of resistor layer and conductor layer onto insulated substrate, formation of patterns of layers deposited onto insulated structure to form resistive heating element, formation of insulating barrier layer onto pattern of mentioned conductor layer, formation of window in mentioned barrier layer, production of metal layer contacting mentioned conductor layer pattern through mentioned window whose geometry opens up predetermined area of mentioned conductor layer pattern, and metal layer pads on insulating barrier layer above heating layer; prior to arrangement of conductors from metal layer, insulating barrier layer is treated with etching solution for cleaning and recovering surface insulating barrier layer, and along with wiring of metal layer from mentioned conductor layer pattern through mentioned window in insulating barrier layer on adjacent area of mentioned insulated substrate metal layer wiring section is made in the form of pad on insulating barrier layer above heating element used as stabilizing evaporation surface. In this way insulating barrier layer is cleaned and its properties are recovered, metal layer wiring adhesion to insulating barrier layer, and especially adhesion of metal layer pad to insulating barrier layer above heating element, is enhanced.
EFFECT: enhanced quality and reliability of printhead.
3 cl, 11 dwg
FIELD: producing copper tracks on insulating substrates.
SUBSTANCE: negative image of track is projected onto copper halide solution layer in organic solvent of substrate with the result that concentric capillary flow occurs in layer which transfers solution to illuminated sections of substrate wherein copper halide tracks remain upon solvent evaporation. These tracks are reduced to copper ones in hydrogen current at temperature sufficient to conduct reducing reaction.
EFFECT: facilitated procedure, reduced cost and copper consumption, improved environmental friendliness due to elimination of wastes.
1 cl, 3 dwg
FIELD: microelectronics; complementary metal-oxide-semiconductor transistors.
SUBSTANCE: proposed method for producing CMOS transistor gate regions includes formation of regions of second polarity of conductivity, insulator, and gate silicon dioxide in substrate of first polarity of conductivity, deposition of polycrystalline silicon layer, its doping, formation of gate regions of p- and n-channel transistors, thermal cleaning in trichloroethylene and oxygen, deposition of separating silicon dioxide, modification, formation of drain and source regions of both polarities of conductivity, thermal cleaning in trichloroethylene and oxygen, deposition of pyrolytic insulating silicon dioxide, its modification by thermal firing in trichloroethylene and oxygen, opening of contact windows, metal deposition, and process operations (removal of natural silicon dioxide, formation of gate silicon dioxide, formation of polycrystalline silicon layer) conducted within single vacuum cycle of one reactor, whereupon polycrystalline silicon layer is doped.
EFFECT: improved and regulated electrophysical properties of gate silicon dioxide enabling enhancement of threshold voltage reproducibility and yield.
4 cl, 3 dwg
FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.
SUBSTANCE: proposed method includes production of vacuum in vacuum chamber, sequential electron-beam evaporation of Ti, Al, Ni, and Au in vacuum chamber onto section of AlGaN layer surface, and high-temperature annealing; prior to Ti, Al, Ni, Au evaporation Ti is sprayed in vacuum chamber to form 2-3 Ti monolayer on surfaces of elements disposed within vacuum chamber; Ti, Al, Ni, Au are evaporated onto section of AlGaN layer surface at vacuum of 1 x 10-7 to 1 x 10-8 mm Hg.
EFFECT: reduced contact resistance of ohmic contacts due to reduced amount of residual oxygen and water vapors in vacuum chamber.
FIELD: ohmic contacts for microelectronic devices such as microwave field-effect transistors.
SUBSTANCE: proposed method includes sequential evaporation of Ti, Al, Ni, Au onto section of AlGsN surface layer and fast thermal annealing of semiconductor heterostructure; fast thermal annealing is conducted using contact method and graphite resistive heater, semiconductor heterostructure being disposed on heater surface. In the course of annealing temperature of GaN/AlGsN semiconductor heterostructure is controlled to ensure reproducibility of its parameters.
EFFECT: facilitated procedure, reduced time requirement, enhanced quality of heterostructure.
FIELD: light devices production.
SUBSTANCE: method of quantum wells mixing within semiconductor device implies: a) formation of layer structure with quantum wells including doped upper layer; b) formation of etch preventing layer over mentioned upper layer; c) formation of temporary layer over mentioned etch preventing layer, and mentioned etch preventing layer has significantly lower etch rate than mentioned temporary layer on condition that etching requirements are preliminary specified; d) process of quantum wells mixing upon device structure making significant violation of at least a part of consumed layer; e) removal of temporary layer from at least device contact area by etching selective relative to etch preventing layer to uncover mentioned etch preventing layer within contact area; and f) formation of contact over layer structure with quantum wells directly on the surfaced uncovered after execution of stage e) at least within mentioned contact area.
EFFECT: improvement of device contact resistance.
15 cl, 10 dwg
SUBSTANCE: invention pertains to electronics, particularly to microelectronics, and can be used when making silicon semiconductor devices. The method of making a system for metal plating silicon semiconductor devices involves forming a dielectric film based on silicon dioxide on a silicon substrate with active regions, formation in this film of contact windows to active elements of the substrate, deposition of a film of molten aluminium with a given thickness, formation of the metal pattern and subsequent thermal treatment for obtaining ohmic contacts. Thermal treatment is carried out in a hydrogen atmosphere with addition of 0.5-3.0 vol.% water or 0.25-1.5 vol.% oxygen.
EFFECT: higher quality of the system of metal plating due to reduced defectiveness and improved electrical characteristics.