Semiconductor device

FIELD: electrical engineering.

SUBSTANCE: semiconductor device includes thin-film diode and protection circuit with protective diode. Thin-film diode includes semiconductor layer with the first, second zones and channel zone, gate electrode, the first electrode connected to the first zone and gate electrode and the second electrode connected to the second zone. When conductivity type of thin-film diode is n-type then anode electrode of the protective diode is connected to the line which is connected either to gate electrode or to the first electrode of thin-film diode. When conductivity type of thin-film diode is P-type then cathodic electrode of the protective diode is connected to the line which is connected either to gate electrode or to the first electrode of thin-film diode. Protective circuit does not include other diodes which are connected to the line so that current direction is opposite to the protective diode.

EFFECT: deterioration of thin-film diode properties can be decreased when size of the circuit is minimised.

12 cl, 37 dwg

 

The technical FIELD TO WHICH the INVENTION RELATES.

The present invention relates to a semiconductor device with a circuit including a protection circuit against electrostatic discharge (ESD).

The LEVEL of TECHNOLOGY

Semiconductor device with a circuit, such as a substrate with an active matrix, usually has a built-in circuit to protect the semiconductor components in this circuit from ESD. This protection scheme is called "circuit ESD protection".

Generalized diagram of the ESD protection will be described with reference to Fig. 35, which shows an illustrative diagram of the ESD protection provided for the internal circuits of the IC with complementary structure of metal-oxide-semiconductor (CMOS structure). Diagram of the ESD protection is shown in Fig. 35, includes a protective resistance R, which is located between the input contact and the CMOS structure, and two protective diodes D1 and D2 with mutually different polarities. Each of these two diodes D1 and D2 connected to the input signal line CMOS structure.

In the scheme of ESD protection when the input pin receives static electricity, its potential or increases (+)or decreases (-). If the potential is increased (+), then turn on the protective diode D1, and sends the positive charges in line VCC. On the other hand, if the potential decreases (-), then turn on the protective diode D2 and healthy lifestyles is no negative charges in line VSS. In this case, the direction of current flow is regulated by a protective resistance R.

On the substrate with the active matrix display device, the circuit including thin film transistors (TFT), which function as switching elements for pixels, in most cases is formed by depositing a semiconductor film of silicon, metal oxide semiconductor, or any other suitable material. In addition, the substrate is an active matrix usually has a protection circuit to prevent damage to these TFT or interconnects due to static electricity (see Patent Document No. 1, for example).

Fig. 36 shows a conventional substrate with active matrix with protection circuits. This configuration is disclosed in Patent Document No. 1.

As shown in Fig. 36, the substrate is an active matrix has an array of thin film transistors 240, which includes a few lines 203 scanner and multiple signal lines 204, which were formed on the insulating substrate, and a number of thin-film transistors 205, which are located at their intersections. Each of these thin-film transistor 205 has its source electrode, gate electrode and drain electrode connected to the assigned signal line 204, associated with him in the line 203 is Alaverdi and assigned a pixel electrode (not shown), respectively. Everywhere in this array of thin film transistors 240 each line 203 scanner connects to the line 231 reference voltage correlated through with her scheme 250 protection. Each schema 250 protection includes two thin-film diode 228 and 229 with mutually different polarities. Similarly, each signal line 204 is also connected to line 232 reference voltage correlated through with her scheme 251 protection. In accordance with this configuration, even if the positive or negative charges are served either on line 203 scanner, or on the signal line 204, the circuit 250 or 251 protection may send these charges related to her line 231 or 232 of the reference voltage.

It should be noted that each of the thin-film diodes 226 - 229, which are part of the circuits 250 and 251 of protection, shown in Fig. 36, has a structure in which the source and gate thin-film transistor (for example, a thin-film transistor 205 pixel) close-circuited with each other. Diode with such a structure, in which the gate and source or drain of the thin-film transistor is closed-circuited with each other will be called in this document as the "three-prong diode".

Moreover, in recent times, not only such thin-film transistors that perform the functions of the switching element, and some or all of the TFT to use the deposits in the peripheral circuit, such as driver control signals, are arranged on a substrate with an active matrix. The peripheral circuit is not placed in a zone of the substrate with an active matrix, where the pixels (which will be called herein as a "display area"), and in another area of the substrate with an active matrix (which we will call in this document as the "framework"). In this case, the protection circuit must be provided for those elements, such as thin-film transistors, which form the peripheral circuit (see Patent Document No. 2, for example).

Fig. 37 shows a circuit for the transistors with insulated gates, which provides for the filing of the synchronization signal to the driver control signals, which is located in the area of the frame substrate with an active matrix. Circuit configuration shown in Fig. 37 is disclosed in Patent Document No. 2.

The diagram shown in Fig. 37, includes a circuit 1001 transistors with insulated gates, which is located between the contact pad (pad OLB) 1011, which receives the synchronization signal, and a section diagram of the driver control signals, and two circuit 1013 and 1016 protection. Scheme 1013 protection is located on the input end of the circuit 1001 and includes two diode 1014 and 1015 with mutually opposite polemos the Yami. On the other hand, the circuit 1016 protection is located at the output end of the circuit 1001 and includes two diode 1017 and 1018 with mutually opposite polarities. Diodes 1014 and 1017 are connected with a line VDD, while the diodes 1015 and 1018 are grounded. In accordance with this configuration, the static electricity, which was filed outside in line 1019 through the contact area CLB 1011, may withdraw the scheme 1013 protection, and static electricity, which was filed in the diagram of the driver control signals in line 1019, can do circuit 1016 protection.

As can be seen from the examples shown in Fig. 35, 36 and 37, the traditional scheme of ESD protection provided primarily for the protection of three-pin thin-film transistor. In addition, each of these circuits ESD protection includes at least two diodes with mutually opposite polarities, which are pramosone and ortoslon, respectively, to withdraw the charges supplied to the protected line, no matter whether these charges are positive or negative. Moreover, such a scheme ESD protection is located either at the input or at the output end of the circuit, which includes the protected thin film transistors, or even at both ends. That is why the diagram of the ESD protection can prevent static electricity is in circuit with three-pin thin-film transistors on an insulating substrate through either input, an output end. As a consequence, providing such a protection scheme based active matrix display device, for example, the protection circuit can prevent static electricity in the circuit of the driver control signals in the area of the frame (which may be a monolithic driver control signals from the external connection pads (which connects to the driver control signals on the input end)of the line scan, or from a signal line (which is on the output end of the driver control signals).

A list of the opposed material

Patent Literature

Patent Document No. 1: Lined Publication of the Patent Application of Japan No. 11-119256

Patent Document No. 2: Tiled Publication of the Patent Application of Japan No. 2000-98338

The INVENTION

TECHNICAL PROBLEM

Each of the traditional protection circuits shown in Fig. 35 - 37, includes at least two diodes. For this reason, with this protection scheme, the scheme size inevitably increases, which is a problem. For example, if the traditional protection scheme is applied to a monolithic driver control signals, the area of the frame of the display device must be increased and, therefore, the display area may, on the contrary, minisites is.

In addition to the traditional protection scheme is thus to protect three-pin thin-film transistors. However, the authors of the present invention have found through experimentation that the three transistors is not as easy as three diodes are destroyed by static electricity. The reasons for this will be described in detail below. That is why the protection circuit with a conventional configuration cannot be prevented for the scheme, which includes three diodes as its internal circuit components, the availability characteristics of the device, which are exposed to static electricity or malfunction due to the presence of static electricity.

Therefore, the present invention is to effectively prevent the destruction of the elements included in the circuits on an insulating substrate, by static electricity, without an excessive increase in the size of the schema.

Solution

A semiconductor device in accordance with the present invention includes a circuit that has been formed on the substrate and which includes a thin-film diode and a protection circuit with a protective diode. Thin-film diode includes: at least one semiconductor layer, the which is located on the substrate and which has a first region, the second region and a channel region located between the first and second regions; a gate electrode, which is located in such a way as to overlap with a channel region; an insulating layer shutter, which is located between the gate electrode and the semiconductor layer; a first electrode that is located on the first region and which is electrically connected with the first region and the gate electrode; and a second electrode, which is located on the second region and electrically connected with it. In this semiconductor device (a) - type conductivity thin-film diode may be N-type, and the anode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. Or (b) - type conductivity thin-film diode may be P-type, and the cathode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. The protective diode and the thin film diode is connected in parallel. The protection circuit does not include other diodes connected to the line to obtain the direction of current flow opposite to the protective diode.

In one preferred embodiment, the protective diode includes: at m is re, one semiconductor layer that is located on the substrate and which has a first region, a second region and a channel region located between the first and second regions; a gate electrode, which is located in such a way as to overlap with a channel region; an insulating layer shutter, which is located between the gate electrode and the semiconductor layer; a first electrode that is located on the first region and which is electrically connected with the first region and the gate electrode; and a second electrode, which is located on the second region and electrically connected with it.

The respective semiconductor layers of the thin-film diode and the protective diode can be made of the same semiconductor film.

The semiconductor device may further include multiple thin-film transistors, which have the same type of conductivity as the thin-film diode. While the respective semiconductor layers of thin-film transistors and thin-film diode may be made from the same semiconductor film.

In another preferred embodiment, does not provide circuit protection for the line, which connects to the gate electrode of each thin-film transistor.

Another site is Cetelem embodiment, the circuit includes either an input section for inputting the signal from the external device in the circuit, either the output section to output the signal from the circuit to an external device. Line that connects to each other thin-film diode and the protective diode has a smaller length than the line that connects with each other of the input or output section and the protective diode.

Preferably, if the line that connects to each other thin-film diode and the protective diode, has a length of 1 mm or less.

In another preferred embodiment, (a) - type conductivity thin-film diode may be N-type, and the anode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. When the high potential of the anode electrode of the protective diode potential of the cathode electrode of the protective diode can also be high.

In an alternative preferred embodiment, (a) - type conductivity thin-film diode may be N-type, and the anode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. The cathode electrode of the protective diode can be connected with a line leading to the power source VDD.

In another preferred embodiment, (b) - type conductivity thin-film diode may be of the type, and the cathode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. If you have a low potential of the cathode electrode of the protective diode potential of the anode electrode of the protective diode may also be low.

In an alternative preferred embodiment (b) - type conductivity thin-film diode may be P-type, and the cathode electrode of the protective diode can be connected with a line, which is connected to either the gate electrode or the first electrode of the thin-film diode. The anode electrode of the protective diode can be connected with a line leading to the power source VSS.

The circuit may include a shift register.

The predominant Effects of the Invention

The present invention can significantly reduce the harmful effects of electrostatic discharge on three diodes, which are part of the circuit on an insulating substrate, without excessive reduction of the size of the scheme. Due to this, the present invention can effectively prevent incorrect operation of the circuit under the influence of static electricity.

The present invention is particularly effective in cases when applied to the substrate is an active matrix scheme with shaper control signals.

BRIEF OPI is the W DRAWINGS

Fig. 1 shows how static electricity affects the in-circuit diode (N-channel type).

Fig. 2 demonstrates how static electricity affects in-circuit transistor (N-channel type).

Fig. 3(a)-3(c) show the scheme as the preferred option implementation of the present invention, each of the Figures 3(a) and 3(c) shows the N-channel in-circuit diode and protective circuit to protect the in-circuit diode, and Fig. 3(b) shows the waveforms of the signals change relative to each other on lines 3 and 9 of these schemes.

Fig. 4(a)-4(c) show the scheme as the preferred option implementation of the present invention, each of Figs. 4(a) and 4(c) shows a P-channel in-circuit diode and protective circuit to protect the in-circuit diode, and Fig. 4(b) shows the waveforms of the signals change relative to each other on lines 3 and 8 of these schemes.

Fig. 5 shows part of the circuit as Example No. 1 of the present invention.

Fig. 6 shows part of the circuit as Example No. 2 of the present invention.

Fig. 7 shows part of the circuit in Example No. 3 of the present invention.

Fig. 8 shows part of the circuit as Example No. 4 of the present invention.

Fig. 9 shows part of the circuit as P is of emer No. 5 of the present invention.

Fig. 10 shows part of the circuit as Example No. 6 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 11 shows part of the circuit as Example No. 7 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 12 shows part of the circuit as Example No. 8 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 13 shows part of the circuit as Example No. 9 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 14 shows part of the circuit as Example No. 10 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 15 shows part of the circuit as Example No. 11 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 16 shows part of the circuit as Example No. 12 of the present invention, in which the gate electrode her in-circuit diode is connected to multiple lines.

Fig. 17 shows part of the circuit as Example No. 13 of the present invention, in which the first electrode (El is trod source) in-circuit diode is connected to multiple lines.

Fig. 18 shows part of the circuit as Example No. 14 of the present invention, in which the first electrode (the source electrode) of the in-circuit diode is connected to multiple lines.

Fig. 19 shows part of the circuit as Example No. 15 of the present invention, in which type conductivity her in-circuit diode is P-type.

Fig. 20 is a schematic view in section, showing the in-circuit diode in accordance with the first preferred embodiment of the present invention.

Fig. 21(a) is a schematic view in plan showing a substrate with an active matrix for liquid crystal display (LCD) panel, while Fig. 21(b) is a view in plan schematically showing the structure of a single pixel.

Fig. 22 shows an illustrative configuration for a shift register in accordance with the second preferred embodiment of the present invention.

Fig. 23 shows an illustrative configuration for another shift register in accordance with the second preferred embodiment of the present invention.

Fig. 24 shows an illustrative configuration for a shift register as a comparative example.

Fig. 25(a) and 25(b) are graphs showing current-voltage features the s MM diode and transistor MN in the shift register of the comparative example.

Fig. 26 shows an illustrative configuration for another shift register in accordance with the second preferred embodiment of the present invention.

Fig. 27 shows the configuration for the scheme in accordance with a third preferred embodiment of the present invention.

Fig. 28 shows the configuration for the other schemes in accordance with the third preferred embodiment of the present invention.

Fig. 29 shows a configuration for another circuit in accordance with a third preferred embodiment of the present invention.

Fig. 30 shows the configuration for the next circuit in accordance with a third preferred embodiment of the present invention.

Fig. 31 shows the configuration for the next circuit in accordance with a third preferred embodiment of the present invention.

Fig. 32 shows the configuration for the next circuit in accordance with a third preferred embodiment of the present invention.

Fig. 33(a) shows the traditional scheme with the scheme ESD protection, and Fig. 33(b) shows part of the circuit shown in Fig. 33(a).

Fig. 34 shows how the protection circuit in accordance with the present invention.

Fig. 35 de will onstreet example of a conventional circuit ESD protection provided for the internal circuit IP.

Fig. 36 shows a conventional substrate with an active matrix scheme with ESD protection.

Fig. 37 shows the traditional scheme with the scheme ESD protection.

The IMPLEMENTATION of the INVENTION

When the circuit including thin film transistors and thin-film diodes fabricated by depositing a semiconductor film on an insulating substrate, sometimes three-pin thin-film diodes are formed as described above, in order to fabricate thin-film transistors and thin-film diodes through the same process. However, the authors of the present invention discovered and confirmed via experiments that the three-pin thin-film diodes in this scheme is more susceptible to static electricity than the three thin-film transistors. The reason for this will be described below.

In this description of the invention the diodes, which form the greater part of the scheme and which are necessary to enable this scheme to perform its intended her function will be called in this document as "in-circuit diode, whereas the diodes included in the protection circuit will be called in this document as "protective diode", in order to clearly distinguish between these two types of diodes from each other.

Fig. 1 and 2 demons is their, as static electricity affects the in-circuit diode and in-circuit transistor, which are assumed to be N-channel diode and the N-channel transistor, respectively, in this example.

In-circuit diode 1 shown in Fig. 1, has three output electrodes G, S and D gate, source and drain. Electrode G of the shutter is connected with line 3, whereas the electrode D drain connected to another line 5 (e.g., VDD). Electrode S of the source is closed-circuited with the electrode G of the shutter. In this in-circuit diode 1, when positive static electricity is supplied through line 3 to the electrode G of the shutter, while a positive voltage is also fed to the electrode S of the source, which is connected to the electrode G of the shutter. Therefore, the potential of the electrode S of the source is greater than that of the electrode D of the flow, thus including the diode 1 and producing the heavy current which flows between the electrodes S and D are source and drain. In the channel layer of the diode 1 may deteriorate.

On the other hand, in the in-circuit transistor 10 shown in Fig. 2, the electrode S of the source is not limited to the short-circuited with its electrode G of the shutter, but is connected to the third line 7, but with either line 3 or line 5. In this transistor electrodes G, D and S are connected with three different lines. That is why, even to the Yes positive static electricity is supplied to the electrode G of the shutter, for example, the levels of potential on the electrodes S and D are source and drain remain almost equal to each other. Thus, it is highly likely that the transistor 10 will not turn on. As a consequence, in-circuit transistor 10 is less prone to static electricity, and much less likely that the link layer circuit of transistor 10 will deteriorate due to static electricity.

Based on these results, the authors of the present invention found that, when provided a protection circuit for three-pin diode, which is one of the easiest to static electricity among the various circuit elements, this protection scheme can effectively prevent deterioration under the influence of static electricity characteristics of this circuit element or the conversion circuit to malfunction. This is the basic idea of the present invention.

Fig. 3(a) and 4(a) showing a configuration of circuits for use in a preferred embodiment of the present invention. Namely, Fig. 3(a) shows the circuit configuration for use in situations where the type of conductivity of the protected circuit diode is an N-type (i.e., if the in-circuit diode is an N-channel diode). On the other hand, Fig. 4(a) demonstriruet the configuration schema for use in situations when the type of conductivity of the protected circuit diode is a P-type (i.e., if the in-circuit diode is a P-channel diode).

The diagram shown in Fig. 3(a), includes N-channel in-circuit diode 1 and a protection circuit with a protective diode 20, which protects the in-circuit diode 1. In-circuit diode 1 is a three-pin diode, which has an electrode G1 of the gate, the first electrode S1 (source electrode) and the second electrode D1 (drain electrode). And his first electrode S1 and the electrode G1 shutter is closed-circuited with each other.

In this description of the invention one of the two electrodes of a three-pin diode, which is closed-circuited with the gate electrode will be called herein as a "first electrode", while the other electrode as the "second electrode". Therefore, assuming that the current flows from the source to the drain, the first electrode of N-channel diode is its source electrode and the first electrode of P-channel diode is its drain electrode.

The anode electrode of the protective diode 20 is connected to line 3, which is electrically connected with the electrode G1 of the gate in-circuit diode 1, while its cathode electrode connected to line 9 (which is a line VDD in this example). It should be noted that the line 9 should not be line VDD, and can also be a line that has a larger pot is potential, what line VDD. In addition, preferably, the line 9 is not connected with the transistor, and joined in parallel. Moreover, as shown in Fig. 3(b), the signal on the line 9 may be a synchronization signal, which is set at a high level when a high level signal on line 3. That is, the potential of the signal line 9 simply should not be less than line 3. In this case, no current flows from line 3 to line 9, the waveform is never truncated edges, and power dissipation never increases.

In the example shown in Fig. 3(a), the protective diode 20 is a three-pin diode, which includes a gate electrode, the first electrode and the second electrode. The type of conductivity of the protective diode 20 is N-type, which coincides with the type of conductivity of the in-circuit diode 1. The gate electrode and the first electrode of the protective diode 20 are connected with line 3, and its second electrode connected to a line 9 VDD.

When positive static electricity is supplied to the circuit shown in Fig. 3(a), through the line 3, the current flows from line 3 to line 9 VDD through a protective diode 20. As a result, the amount of current that flows through the electrode G1 of the gate protected the in-circuit diode 1, is significantly reduced, as the amount of current that flows between the first and second electrodes S1 and D1 vnutri the roadways diode 1. Therefore, the protective diode 20 can prevent damage to the in-circuit diode 1 due to the filing of static electricity, and can also prevent incorrect operation of the circuit.

On the other hand, no other protective diode is not positioned on the line 3 so that the current flows through the diode in the opposite direction relative to the protective diode 20. And so the negative charge of static electricity, which is introduced into the circuit through the line 3, is fed to the in-circuit diode 1. As a result, the first electrode S1 of the in-circuit diode 1 becomes lower potential than the second electrode D1. Even in this case, the current does not flow between the first and second electrodes S1 and D1, and therefore much less chance of damage to the in-circuit diode 1 due to the filing of the negative charge of static electricity. For this reason, even without considering other protective diode to a current flowed through it in the opposite direction relative to the protective diode 20, the in-circuit diode 1 can still be adequately protected from ESR, as expected.

Although in the example shown in Fig. 3(a), it is assumed that the protective diode 20 is a diode N-channel type, may also be provided with P-channel protective diode 22, as shown in Fig. 3(c).

Diagram, showing the Naya in Fig. 4(a), includes a P-channel in-circuit diode 2 and a protection circuit with a protective diode 22, which protects the in-circuit diode 2. In-circuit diode 2 is a three-pin diode, which has an electrode G2 of the gate, the first electrode D2 (drain electrode) and the second electrode S2 (source electrode). And his first electrode D2 and the electrode G2 shutter is closed-circuited with each other.

The cathode electrode of the protective diode 22 is connected to line 3, which is electrically connected with the electrode G2 of the gate circuit of the diode 2, while its anode electrode connected to a line 8 (which is a line VSS in this example). It should be noted that the line 8 should not be a line VSS, and can also be a line that has a lower potential than line VSS. In addition, preferably, the line 8 is not connected with the transistor, and joined in parallel. Moreover, as shown in Fig. 4(b), the signal on the line 8 may be a synchronization signal, which is set at low level when a low level signal on line 3. That is, the potential of the signal line 8 simply should not be more than line 3. In this case, no current flows from line 3 to line 8, the waveform is never truncated edges, and power dissipation never increases.

When negative static electricity is fed into the scheme, expressed terouanne in Fig. 4(a), through the line 3, the current flows from line 8 VSS in line 3 through the protective diode 22. As a result, the protective diode 22 can prevent the flow of negative charge of static electricity to the electrode G2 of the gate circuit of the diode 2 and can prevent the leakage current of large magnitude from the second electrode S2 to the first electrode D2.

In this example, no other protective diode is not positioned on the line 3 so that the current flows through the diode in the opposite direction relative to the protective diode 22. However, even if the negative static electricity is supplied to the electrode G2 of the gate circuit of the diode 2 through the line 3, the current does not flow between the first and the second electrodes S2 and D2 in-circuit diode 2. That's why, even without considering other protective diode in-circuit diode 2 can still be adequately protected from ESR, as expected.

Although the protective diode 20 in the example shown in Fig. 4(a), and is diode P-channel type N-channel protective diode 20 can also be used, as shown in Fig. 4(c).

As you can see, if type conductivity protected in-circuit diode 1 is N-type, as shown in Fig. 3, the protective diode 20, 22 must be located so that a direction of displacement, which minimizes however, is of positive charges on the electrode G1 of the gate and the first electrode S1 of the in-circuit diode 1. That is, if positive charges are served on the line 3, which is connected to either electrode G1 of the gate, either the first electrode S1 of the in-circuit diode 1, the protective diode 20 must be located in such a way as to take these positive charges from line 3 in another line 9 via a protective diode 20. On the other hand, if the type of conductivity of the protected circuit diode 2 is P-type, as shown in Fig. 4, the protective diode 20, 22 must be located so that a direction of displacement, which minimizes the accumulation of negative charges on the electrode G2 of the gate and the first electrode D2 in-circuit diode 2. That is, if negative charges are served on the line 3, which is connected to either electrode G2 of the gate, either the first electrode D2 in-circuit diode 2, the protective diode 22 must be located in such a way as to take these positive charges from line 3 in another line 8 through a protective diode 22.

According to this preferred variant implementation, since the protection circuit is provided for a three-diode 1 or 2, which is one of the easiest to static electricity among the various circuit elements, the diode 1 or 2 can be effectively protected from ESD without excessive increase of the size of the schema.

the beside this, the protection circuit of this preferred variant implementation does not include any additional protective diode, which would be situated in such a way that the current flowed through it in the opposite direction relative to the protective diode 20 or 22. Thus, compared with the traditional protection scheme (see Fig. 35-37). the number of protective diodes for equipment can be reduced by half. As a result, the size of the circuit can be reduced more effectively, with adequate protection from ESR in-circuit diode 1 or 2.

The protective diode 20 or 22 of this preferred variant implementation can be placed in any position, provided that if the voltage which is not lower than a preset voltage is applied to the in-circuit diode 1 or 2, the protection diode 20 or 22 is turned on and produces a discharge before they are included in-circuit diode 1 or 2. In addition, according to this preferred variant implementation, the electrode G1 or G2 of the gate and the first electrode S1 or D2 in-circuit diode 1 or 2 doesn't always have to be directly connected with the input/output section on the line 3. In some cases, another circuit element such as a transistor, may be placed between the input/output section and the in-circuit diode 1 or 2.

Preferably, the protective diode 20 or 22 are arranged on the line 3 as close as possible to the in-circuit diode 1 or 2. Traditional protection circuit is located on the input/output section circuit. the so line, which connects the protection circuit from the protected circuit element is large enough to work as a kind of antenna that attracts static electricity. As a result, the static electricity may flow into the protected element. On the other hand, if the protection circuit is located close to the protected element (i.e. the in-circuit diode 1 or 2), the characteristics of the in-circuit diode 1 or 2 does not deteriorate due to static electricity not only in cases when static electricity enters the circuit through its input/output section, but when static electricity is generated inside the circuit during the production process and enters the circuit through line 3.

According to this preferred variant implementation of the protective diode 20 or 22 just must be located so as to have a preset bias direction described above and need not be three-pin thin-film diode, as described above. However, to simplify the production process would be preferable if the protective diode 20 or 22 is a three-pin diode, since the protective diode 20 or 22 and the in-circuit diode 1 or 2 can be formed by patterning one and the same semiconductor film. In this case, prefer the Ino, to the in-circuit diode 1 or 2 and the protective diode 20 or 22 have the same type conductivity.

Preferably, the circuit of this preferred variant implementation included not only the in-circuit diode 1 or 2, but also thin-film transistor. This is especially preferable, because the thin-film transistor, the protective diode and the in-circuit diode can be formed at one time by applying the same semiconductor film. In this case, even more preferably, all of these items were three-prong, because then such elements can be manufactured by performing the same sequence of steps in the manufacturing process. It should be noted that may not provide a protection circuit for a thin-film transistor in the circuit (which will be called herein as "in-circuit transistor"). The fact that three-pin thin-film transistor is much less exposed to ESR than the thin-film diode. Plus, by eliminating this protection circuit, which protects the thin-film transistor, the circuit size can be reduced even more effectively.

(Option 1 implementation)

Further in this document will be described first preferred variant implementation of poluprovodnikov the device in accordance with the present invention. The semiconductor device of this preferred variant implementation has a scheme, which includes three thin-film diode (which will be called herein as "in-circuit diode") and the scheme ESD protection to protect the thin-film diode. It should be noted that the semiconductor device of this preferred variant implementation just has to have such a scheme and can be implemented in the form of a schema, such as a shift register, a substrate with an active matrix or a display device with such a scheme, or any other arbitrary form.

Further in this document will be described specific examples of the schemes, in accordance with this preferred embodiment, with reference to the accompanying drawings.

Fig. 5-18 show the appropriate parts diagrams representing Examples No. 1 to No. 14 of the present invention. In each of these examples, as in-circuit diode 1, and a protective diode 20 are N-channel three-pin thin-film diodes. In Fig. 5-18 any element that have the same, in essence, function, denoted by the same reference position, and its description will be omitted herein for simplicity.

<Examples No. 1 to No. 3>

Fig. 5 shows as Example No. 1 of the present invention scheme, which includes himself in-circuit diode 1 and a protection circuit with a protective diode 20. The first electrode and the gate electrode of the protective diode 20 are connected with a line 3 which is connected to the gate electrode of the in-circuit diode 1. On the other hand, the second electrode of the protective diode 20 is connected with a line VDD. Assume that the first electrode and the gate electrode of the protective diode 20 is connected with line 3 at points 3a and 3b connect, respectively, the first electrode of the in-circuit diode 1 is connected with line 3 at point 3c of the connection between these two points 3a and 3b of the connection.

According to this Example 1, when positive charges are served on the line 3, the current flows from line 3 to line VDD through the protective diode 20, as shown in Fig. 5. Therefore, the amount of current that flows in the in-circuit diode 1 can be significantly reduced.

It should be noted that, since the positive charges, which come in a circuit through line 3, to reach the first electrode of the protective diode 20 to arrive at the gate electrode of the in-circuit diode 1, point 3a, 3b and 3c of the connection between the line 3 and the first electrode and the electrode of the gate protective diode 20 and between the line 3 and the first electrode of the in-circuit diode 1 can be arranged in any order.

Fig. 6 and 7 show examples of circuits that point 3a, 3b and 3c compounds are arranged in a different order. In particular, as shown in Fig. Primera No. 2, point 3a and 3b connect the gate electrode and the first electrode of the protective diode 20 with the line 3 may be located between the point 3c of the connection of the first electrode of the in-circuit diode 1 by line 3 and the gate electrode of the in-circuit diode 1. Alternatively, as shown in Fig. 7 Example # 3, point 3c of the connection of the first electrode of the in-circuit diode 1 by line 3 may be located closer to the gate electrode of the in-circuit diode 1 than point 3a and 3b connect the protective diode 20 with line 3.

<Examples # 4 and # 5>

Fig. 8 shows an Example No. 4 of the present invention, in which the first electrode of the in-circuit diode 1 and line 3, taken together, are connected with a line 4 which is connected with the first electrode and the electrode of the gate protective diode 20. Thus, the first electrode of the gate protective diode 20 should not connect to line 3, and also can be connected with the line 4, which connects the first electrode of the in-circuit diode 1 by line 3. The circuit of this Example No. 4, when positive charges are served on the line 3, the current also flows from line 4 to line VDD through the protective diode 20. Therefore, the amount of current that flows in the in-circuit diode 1 can be significantly reduced.

On the other hand, in Example No. 5 of the present invention shown in Fig. 9, the gate electrode of the protective diode is 20 connects with line 4, but first electrode of the protective diode 20 is connected with line 3. Even in this case, positive charges, which are entered into the scheme through the line 3 may be directed from line 3 to line VDD, as indicated by the dotted arrow.

As can be seen from these Examples No. 4 and No. 5, since the first electrode of the gate protective diode 20 are connected with one of the two lines 3 and 4, these electrodes are electrically connected to the gate electrode of the in-circuit diode 1. Therefore, the effects of Examples No. 1 to No. 3 can also be achieved in Examples # 4 and # 5.

<Examples No. 6-No. 12>

Fig. 10 shows a diagram representing Example No. 6 of the present invention, which includes in-circuit diode 1-g and a protection circuit to protect the in-circuit diode 1-g. The gate electrode of the in-circuit diode 1-g is connected to the two lines 3 and 3'. Such a structure with a gate electrode, which is connected to two or more lines will be called in this document as "branched structure of the gate electrode". The protection circuit has at least two protective diode that includes a protective diode 20a, which protects the in-circuit diode 1-g from static electricity coming into the circuit through the line 3', and the protective diode 20b, which protects the in-circuit diode 1-g from static electricity coming into the circuit through the line 3.

In this Example the number 6, if positive charges are served on the line 3', the current flows from the line 3' to the line VDD through the line 3 and the protective diode 20a. On the other hand, if positive charges are served on the line 3, the current flows through line VDD through the protective diode 20b, as has already been described with reference to Fig. 5-9. Therefore, regardless of which one of these two lines 3 and 3', which is connected to the gate electrode of the in-circuit diode 1-g, enters into a scheme of static electricity, the in-circuit diode 1-g can always be protected.

Fig. 11-15 illustrate Examples No. 7 No. 11 of the present invention, each of which represents a different scheme, which includes in-circuit diode 1-g with such a branched structure of the gate electrode. In these Examples No. 7-No. 11 first electrodes and the gate electrodes of the protective diodes 20a and 20b are connected with any of the lines 3, 3' and 4. Line 4 connects the first electrode of the in-circuit diode 1 by line 3. Under any of these five examples, the effects of Example No. 6 can also be achieved.

In some cases, the gate electrode of the in-circuit diode 1-g may also be connected with three or more lines. In this case, for even more effective protection in-circuit diode 1-g, it is preferable that was provided the same protective diodes, many lines with which they are connected.

Despite this, nutrichem the second diode 1-g with such a branched structure of the gate electrode can be protected by only one protective diode 20, as in Example No. 12 of the present invention.

In the scheme shown in Fig. 16, representing Example No. 12 of the present invention, the length L33 of the line that passes from the point of connection between lines 3 and 4 (which will be called herein as a "branching point") through the protective diode 20, is less than the length L35 line, which runs from branching points through the first electrode of the in-circuit diode 1-g. In this case, in the first part, between the branching point and a protective diode 20, the resistance becomes lower than the second part, between the branching point and the first electrode of the in-circuit diode 1-g. And therefore, even when positive static electricity is fed through line 3', current 31 is discharged through the protective diode 20, not reaching the first electrode of the in-circuit diode 1. Therefore, the protection circuit can prevent the destruction of the in-circuit diode 1 under the influence of static electricity, even without additional protective diode.

<Examples of # 13 and # 14>

Fig. 17 shows a diagram representing Example No. 13 of the present invention, which includes in-circuit diode 1-s and a protection circuit to protect the in-circuit diode 1-s. The first electrode of the in-circuit diode 1-s is connected to the two lines 4 and 4'. And line 4 connects to line 3, which is connected with the electrode of the m shutter in-circuit diode 1-s. Such a structure with the first electrode, which is connected to two or more lines will be called in this document as "branched structure of the first electrode. The protection circuit has at least two protective diode that includes a protective diode 20a, which protects the in-circuit diode 1-s against static electricity coming into the circuit through the line 4', and the protective diode 20b, which protects the in-circuit diode 1-s against static electricity coming into the circuit through line 3. In this example, the first electrode of the gate protective diode 20a are connected with the line 4', whereas the first electrode and the gate electrode of the protective diode 20b are connected with one of the two lines 3 and 4.

In this Example, No. 13, if positive charges are served on the line 4', the current flows from the line 4' to the line VDD through the protective diode 20a. On the other hand, if positive charges are served on the line 3, the current flows through line VDD through the protective diode 20b. Therefore, regardless of which of these three lines 3, 4 and 4', which are connected with the first electrode of the in-circuit diode 1-s comes in the scheme of static electricity, the in-circuit diode 1-s can always be protected.

Fig. 18 shows an Example No. 14 of the present invention, which is a different scheme, which includes in-circuit diode 1-s branched with what ructural the first electrode. In Sample No. 14, the first electrode of the protective diode 20a is connected with the line 4', and its gate electrode is connected with line 4, what is the difference from Example No. 13, described above. Even in this example, the positive charges, which come in a circuit through line 4', can also be given a protective diode 20a. Therefore, the effects of Example No. 13 can be also achieved.

<Example No. 15>

Diagram representing Example No. 15 of the present invention has the same configuration as shown in Fig. 5 diagram representing Example No. 1 of the present invention, except that the in-circuit diode and the protective diode are changed to their counterparts of the P-channel type.

The diagram shown in Fig. 19, representing Example No. 15 of the present invention has a P-channel in-circuit diode 2 and a protection circuit with a protective diode 22, which protects the in-circuit diode 2. The protective diode 22 of this example is a three-diode P-channel type. The first electrode and the gate electrode of the protective diode 22 are connected with line 3. Assume that the first electrode and the gate electrode of the protective diode 22 are connected with line 3 at points 3a and 3b connect, respectively, the first electrode circuit of the diode 2 is connected with line 3 at point 3c of the connection between these two points 3a and 3b of the connection. On the other hand, the second electrode protecting the aqueous diode 22 is connected with a line VSS.

According to this Example, the number 15, when negative charges are served on the line 3, the current flows from line VSS to the line 3 through the protective diode 22, as shown in Fig. 19. Therefore, the amount of current that flows between the first and second electrodes of the in-circuit diode 2 can be significantly reduced.

Although not shown, in other examples, the No. 2-No. 14 of the present invention, shown in Figures 6-18 and described above, the type of conductivity of the in-circuit diode and the protective diode can also be changed to P-type in this way.

<Configuration for a three-diode>

Further in this document specific configuration for three-pin diode, which is used either as in-circuit diode, or as a protective diode will be described for N-channel diode as an example.

Fig. 20 is a schematic view in section, showing a three-conductor diode. Diode 500, which is an N-channel diode in this example, includes electrode 530 of the gate, the semiconductor layer 534, which was formed on the electrode 530 gate insulating film 532 shutter placed between them, and the first and second electrodes 536 and 538 (which function as electrodes of the source and drain, respectively, which are electrically connected with the semiconductor layer 534 on both to ncah. There is a contact layer 540, which is placed between the semiconductor layer 534 and the first and second electrodes 536 and 538. The first electrode 536 is connected with the electrode 530 of the shutter within the contact window 542. Channel region 544 semiconductor layer 534, which is located between the two electrodes 536 and 538, overlaps with the electrode 530 shutter. This diode 500 current flows from the first electrode 536 to the second electrode 538 through the channel region 544 semiconductor layer 534.

The semiconductor layer 534 may be a layer of amorphous silicon, a layer of polycrystalline silicon, a layer of microcrystalline silicon or a layer of metal oxide semiconductor (for example, the IGZO layer), although not limited to any of these layers. A layer of microcrystalline silicon has a grain boundary, which includes a set of columnar microcrystalline grains and amorphous phase. The amorphous phase can range from 5 to 40% of the volume of the layer of microcrystalline silicon. According to Raman spectroscopy, the peak height of the amorphous phase is from one-third to one-tenth of these microcrystalline grains. The layer of metal oxide semiconductor may be a layer that includes a semiconductor-based Zn-O (ZnO), semiconductor-based In-Ga-Zn-O (IGZO), semiconductor-based In-Zn-O (IZO), or semiconductor-based n-Ti-O (ZTO), for example.

If the diode 500 is used as the protective diode 20 shown in Fig. 5, the first electrode (anode electrode) 536 diode 500 may connect to the line 3, the second electrode (cathode electrode) 538 can be connected with a line VDD.

It should be noted that the protective diode, part of the circuit of this preferred variant implementation, can be any diode, provided that it is made in such a way as to have a preset bias direction and should not be three-conductor diode. In addition, in the above-described Examples No. 1 to No. 15 of the present invention, the type of conductivity of the protective diode 20 or 22 is assumed to be the same as for in-circuit diode 1 or 2. However, the conductivity types may be different from each other.

This preferred variant implementation can be effectively applied to the circuit, which includes, as circuit elements, thin-film transistor and thin-film diode. The fact that three-pin in-circuit diode 1 or 2 of this preferred variant implementation and thin-film transistor can be manufactured by performing the same sequence of steps in the manufacturing process. That is the reason lies in the fact that the production process can be simplified is this case. Especially when three-conductor diode is formed as the protective diode 20, the manufacturing process can be further simplified.

More appropriate to this preferred variant implementation was applied to the circuit with a single-channel structure. In this description, "scheme with a single-channel structure" means a scheme, in which each thin-film transistor, and each thin-film diode have the same type of conductivity (i.e. either N-type or P-type).

(Option 2 implementation)

Further in this document will be described a second preferred implementation of the semiconductor device in accordance with the present invention, with reference to the accompanying drawings. The semiconductor device of this preferred variant implementation is a shift register that can be provided to a substrate with an active matrix for a display device, for example.

First will be described the structure of the substrate with an active matrix. Fig. 21(a) is a schematic view in plan, showing the substrate 601 with active matrix for liquid crystal display (LCD) panel, while Fig. 21(b) schematically shows the structure of a single pixel.

On the substrate 601 with the active matrix driver 610 control signals with gates and formrouter control signals origins were integrated with each other. In the display area of the LCD panel 600 is a lot of pixels. In Fig. 21(a) specified area of the substrate 600 active matrix allocated to each pixel, denoted by the reference position 632. It should be noted that the imaging unit 620 of the control signals origins should not necessarily be an integral part of the substrate 601 with active matrix. Alternatively, the IP driver control signals origins, which was made separately, can be as well integrated with the substrate 601 with the active matrix in a known manner.

As shown in Fig. 21(b), the substrate 601 with the active matrix includes the electrode 601P pixel, which corresponds to one pixel of the LCD panel 600 and which is connected with the line 601S tires origins through the TFT 601T pixel. The gate electrode of the TFT 601T connects with line 601G bus gates. In some cases, each pixel may have a storage capacitor of a pixel (not shown).

Line 601G bus gate connects to the output driver 610 control signals with gates and subjected to sequential scan. Line 601S tires origins connected with the output of the shaper 620 control signals origins and it is supplied as a voltage signal display (voltage gradation of brightness).

Although it is not shown in Fig. 21(b), the imaging unit 610 of the control signals gate the mi includes a shift register, which is located on an insulating substrate such as glass substrate, which forms a part of the substrate 601 with active matrix. The shift register of this preferred variant implementation includes a TFT and a TFD (thin film diode), which are three-prong and which have been produced along with TFT 601T pixel area of the display substrate 601 has an active matrix, by performing the same sequence of steps in the manufacturing process.

Fig. 22 shows an illustrative configuration for a shift register in accordance with this preferred embodiment. Shift register 50 has multiple stages, of which only the first (n-1)-I and n-I is schematically shown in Fig. 22. These multiple steps are almost the same structure and are arranged in cascade with respect to each other. Output Gout of each stage of shift register 50 is served on the assigned line bus gates of the LCD panel.

The first stage of shift register 50 is connected through line 52 to the input signal S with external connecting the contact pad 51. Thus, the signal S is introduced from the external connection pads 51 on the first step. Starting from the second stage, on the stage (for example, n-th step) output signal Gout of the previous stage (e.g. the R, Gout (n-1)) is introduced as a signal S (e.g., Gout (n-1) S).

As shown in Fig. 22, each stage of shift register 50 includes three diode MM, which is connected to line 52 of the input signal S, MG transistor of the first type, which outputs the output signal Gout, and the transistors MN, MK and MH of the second type, which is either the area of the source or drain region is electrically connected to the electrode of the transistor MG of the first type. In this example, the MG transistor of the first type is the so-called "load transistor, and the line, which connects to the electrode of the transistor MG of the first type, called "A chain". The gate electrode and the first electrode of the diode MM are connected by line 52 to the input signal S, and its second electrode is connected with the circuit A. In accordance with this preferred embodiment, the type of conductivity of all these diodes and transistors is N-type.

For the line 52 of the input signal S is provided scheme 53 protection, which protects the diode MM. Scheme 53 protection is located close to the diode MM and includes a protective diode, whose anode electrode is connected by line 52 to the input signal S, and the cathode electrode is connected with a line VDD. The protective diode of this preferred variant implementation is an N-channel diode configuration that has already been described with reference is a of Fig. 20. As has already been described with reference to Fig. 5 - 9, scheme 53 protection is located so that the current is flowed from the line 52 to the input signal S to the line VDD.

Each stage takes the output signal Gout correlated in her line of bus gates only during the write period of the pixel. If you focus on one particular stage, this shift register is performed in such a way that the potential Gout is set at VSS greater part of one frame period which is a period of time consistent choice of one bus line paddles behind the other and which ends just before the same bus line gates is selected again.

The signal S, which is either the signal S is fed from the external connection pads 51, a signal Gout (n-1) S filed from the previous stage, is sent from the line 52 to the input signal S in the circuit A through the diode MM for pre-charging circuit A. At this point, all the transistors MN, MK and MH, the source or drain of which are connected with the circuit a, are in the off state.

Further, when a high level signal CK synchronized, in the circuit increases A voltage. At this time, the output signal Gout (n) is supplied to the bus line valves, thereby including the TFT of the pixel, which is connected to the bus line valves, and by applying a voltage signal display from the bus line itoko is on the pixel electrode. In other words, the liquid crystal capacitor consisting of the pixel electrode, counter-electrode (not shown) and a liquid crystal layer (not shown)placed between the two electrodes, charging.

After that, the potential difference between chain A and Gout decreases to VSS in the result signal R return to its original state (i.e. the output signal Gout (n+1) the next step).

In this example, the capacitor CAP1 retains the potential in the circuit and A complement output. In response to a signal R of the reset transistor MJ lowers the potential of the output signal Gout. On the other hand, in response to the signal CKB synchronization, the transistor ML lowers the potential of the output signal Gout. Signal CLR reset is served once per frame (i.e. in one vertical scan period) at each stage of the shift register during one interval of reverse vertical scan (i.e. the interval between the output of the last stage of the shift register and output of the first stage), resulting in a reduced level in the chain A of each stage. It should be noted that the signal CLR to reset performs the same function signal reset to the last stage of the shift register.

In some cases, the shift register of this preferred variant implementation may include even the additional protection circuit for the input sections and output sections of the respective steps.

Fig. 23 shows an alternative configuration for the shift register of this preferred option for implementation. In Fig. 23 any component, shown in Fig. 22 and having almost the same function as its counterpart, denoted by the same reference position, and its description will be omitted in this document.

Shift register 60 includes not only the scheme 53 protection, but the protection scheme 61, which is located next to the external connecting the contact pad 51 and circuit 63 protection provided to the bus lines of the gates of the respective stages. In other respects, the shift register 60 has the same configuration as the shift register 50 shown in Fig. 22.

Each of the circuits 61 and 63 protection includes two protective diodes D1 and D2 with mutually different directions of displacement. Therefore, if positive charges are served from the external connection pads 51 and line 52 to the input signal S, the current flows through the diode D1 circuit 61 protection, resulting in positive charges are discharged in line VDD. On the other hand, if negative charges are served from the external connection pads 51, the current flows through the diode D2 circuit 61 protection, resulting in negative charges are discharged in line VSS. Similarly, if a positive charge is fed from the pixel area in line W the t gates, the current flows through the diode D1 circuit 63 protection. And if there serves the negative charges, the current flows through the diode D2 circuit 63 protection. As a result, these charges can be discharged either in line VDD, or in line VSS.

Each of the shift registers 50 and 60 shown in Fig. 22 and 23, includes a circuit 53 to protect the diode MM from ESR and, therefore, has the following advantages.

For comparison, the shift register 70, which includes circuits 61 and 63 protection only on their input and output sections, shown in Fig. 24. The shift register 70 has the same configuration as the shift register 60 shown in Fig. 23, except that the shift register 70 no circuit 53 to protect the diode MM.

The shift register 70 scheme 61 protection can protect the circuit elements included in the first-stage shift register 70, from static electricity applied from the external connection pads 51 and line 52 to the input signal S. in the same way the scheme 63 protection provided for line bus gates for (n-1)-th stage, can protect the circuit elements included in the next stage (i.e. the n-th stage) of the shift register 70, from static electricity applied from the outside (of the pixel region) in this line of bus gates. However, since the line that runs from the circuit 61 is whether 63 protection through these protected circuit elements (such as MM diode and transistor MN), is long enough to function as a kind of antenna that attracts static electricity (which is indicated by the arrow 71 or 72), the current is very large magnitude may still flow through the protected circuit elements. For the final product static electricity coming from the external input and output contacts can be a problem. During the production process, on the other hand, static electricity can be formed in lines in the circuit, as described above, during the formation of the line by etching, for example.

As has already been described with reference to Fig. 1 and 2, three-conductor diode MM is likely to deteriorate characteristics, or even be destroyed, under the influence of static electricity in the number of various circuit elements. The authors of the present invention conducted experiments to see how the characteristics of MM diode and transistor MN shift register 70 will be affected by static electricity. The results are presented below.

Fig. 25(a) and 25(b) are graphs showing voltage-current (Vg-Id) characteristics of the diodes MM and transistors MH on 69th - 78th levels (which are indicated on the curves LINE 69 LINE 78) shift register 70 shown in Fig. 24. It should be noted that for comparison of their ha is acteristic as characteristics of the TFT, the measurements were carried out on the diodes after the electrodes were separated to produce a three-prong dimension. In this case, the voltage Vd of the drain was set to 10 V.

As can be seen in Fig. 25(a), it was confirmed that three of the ten diodes MM as measured characteristics are significantly deteriorated. It should be noted that other diodes MM, characteristics are not deteriorated particularly, had a mean threshold value Vth equal 3,55 V, and Vth variation(3 σ) threshold - 0,32 V characteristics of the three diodes MM deteriorated, probably because it was generated static electricity on the line connecting circuit 61 or 63 of the protection from the protected diode MM, and was caused by the leakage current of large magnitude through the diode MM. This result shows that it is difficult to completely protect the diode MM using circuit 61 or 63 protection.

On the other hand, there was no observed deterioration of characteristics in any of the transistors MN according to the measurement, which is shown in Fig. 25(b). In particular, transistors MN had a mean threshold value Vth, the equal of 3.78 V, and Vth variation(3 σ) threshold - 0,38 V. As can be seen from this result, it was confirmed that, even if static electricity from the outside entered the line for the signal CLR, the transistors MN were hardly damaged.

On the other hand, in sdvigovoi the register 50 or 60 of this preferred option implementation plan 53 protection, which protects the diode MM, is located closer to the diode MM, the circuit 61 or 63 protection on the input or output section. As you can see, it is preferable if the length (for example, 1 mm or less) a line that passes from the protective diode circuit 53 protection through the diode MM, much shorter than the length (e.g., 10 mm) of the line that passes from the input or output section of the external connection pads 51 through the protective diode circuit 53 protection. In this case it is much less likely to receipt of static electricity in the line between protection plan 53 and diode MM. As a result, the diode MM may be more fully protected against static electricity not only after the manufacture of the product, but even during the process of its production. In the examples shown in Fig. 22 and 23, the line going from the first electrode of the protective diode, and the line extending from the gate electrode to be connected to line 52 of the input signal S to be placed between the connection point of the first electrode of the diode MM line 52 of the input signal s And the length of the line between protection plan 53 and diode MM, essentially, zero.

Thus, the circuit 53 to the protection of this preferred variant implementation should not be on the input or output section of the circuit, as in the prior art, and it is preferable to position it closer to the protected diode. By the addition circuit 53 protection should not be directly connected with the line coming from the input or output section. Even the other circuit element may be provided between the input or output section of the and circuit 53 protection.

However, the shift register of this preferred variant implementation does not have to have the configuration shown in Fig. 22 or 23. On the contrary, this preferred implementation is applicable to any of various other shift registers, which include thin-film diode as a circuit element.

Fig. 26 shows another shift register 80 in accordance with this preferred embodiment. The shift register 80 has several levels, each of which has the configuration shown in Fig. 26.

Each stage of the shift register 80 includes a diode 81, which is located between the line 84 to the input signal S and the line circuit A and circuit 83 to protect the diode 81. The gate electrode and the first electrode of the diode 81 is connected by line 84 to the input signal S, whereas his second electrode is connected with the line circuit A. Circuit 83 protection includes a protective diode, whose anode electrode is connected by line 84 to the input signal S, and the cathode electrode is connected with a line VDD. The first transistor M5 and the transistor M2, which is connected to the line input signal CK, is also connected with line VDD.

If PR is the adoption of such a configuration can be achieved not only effects which have already been described with reference to Fig. 22 and 23, but also the following effects.

In accordance with the configurations shown in Fig. 22 and 23, to ensure the protection plan 53, line VDD, which is not connected to any circuit element shift register, must be lengthened, thus, possibly increasing the size of the diagram. On the other hand, according to the configuration shown in Fig. 26, at least one circuit element is connected with line VDD at each stage of the shift register. That is why there is no need to extend the line VDD to ensure that the scheme 83 protection. Therefore, a similar increase in the size of the circuit can be restrained even with greater efficiency.

In the above-described shift registers 50, 60, and 80, each of the transistors of the second type has a single-channel structure. However, the transistor can instead have a multi-channel structure (such as dual-channel structure). Including, when the transistors of the second type are formed by depositing a layer of microcrystalline silicon, preferably, if these transistors have a multi-channel structure. The reason for this will be described below.

As a rule, if in the circuit increases A voltage of the high voltage Vds is supplied between the source and drain of each transistor of the second type in the " off " status and, whose source or drain is connected to the circuit A. In this case, the high voltage circuit A is reduced earlier than when this occurs in response to the signal CK synchronized (low level), due to leakage current flowing through the transistor of the second type, whose source or drain is connected to the circuit A. if the voltage of circuit A is reduced, the output voltage Gout does not become high or coerced into a wave shape with truncated edges. As a result, a sufficiently high voltage can be supplied to the pixel electrodes, and the display quality in the end falls.

If the shift register is formed of TFT-based microcrystalline silicon single structure, there is a greater chance of failure caused by leakage current, because these TFT will be the leakage current of relatively large magnitude. On the other hand, the TFT-based microcrystalline silicon channel structure will be the leakage current of smaller magnitude in the subthreshold region than the TFT-based microcrystalline silicon single structure. As a result, the voltage reduction circuit and A truncation of the waveform of the output signal Gout, can be reduced. It should be noted that if two channel structure is entered for at least one TFT of the plural transistors of the second type, the leakage current can be reduced, as for the transistor, by at least.

(Option 3 implementation)

Further in this document will be described third preferred variant implementation of the semiconductor device in accordance with the present invention, with reference to the accompanying drawings. In the example which will be described below with reference to Figures 27 to 32, it is assumed that the protection circuit of the present invention is applied to a schema other than a shift register. The protection circuit of this preferred variant implementation has the same configuration and the same location (or direction of movement), and its analogue according to the first or second preferred variant implementation described above. Some of these drawings is indicated only where there should be a protection circuit, and the image of the protection circuit is omitted.

Fig. 27 shows the generator 90 tension bolt unlocking as an example. In this example, the circuit 93 to protect the in-circuit diode 91 is added to the traditional alternator tension bolt unlocking (disclosed in Laid out the Publication of the Patent Application of Japan No. 8-262407, for example).

Fig. 28 shows the voltage generator 100 of the locking bolt as an example. In this example, the circuit 103 to protect the in-circuit diode 101 is added to the traditional generator voltage lock-out button (tigerstriped Posted in the Publication of the Patent Application of Japan No. 8-262407, for example).

Fig. 29 shows a device 110 erase screen. In this example, the circuit 113 to protect the in-circuit diode 111 is added to the traditional device erase screen (disclosed in Laid out the Publication of the Patent Application of Japan No. 9-127486, for example).

Fig. 30 shows the generator 120 voltage off. In this example, circuits 123A and 123B to protect the in-circuit diode 121 is added to the traditional generator voltage shutdown (disclosed in Laid out the Publication of the Patent Application of Japan No. 9-222591, for example). In this example, two circuits 123A and 123B protection are located on the entrance side and the exit side of the in-circuit diode 121. However, the protection circuitry may also be located only on one side - input or output - circuit of the diode 121.

Fig. 31 shows the device 130 correction of the input signal. In this example, the circuit 133 to protect the in-circuit diode 131 is added to the traditional device correction input signal is disclosed in Laid out the Publication of the Patent Application of Japan No. 2007-82239, for example).

Fig. 32 shows the device 140 level shift. In this example, the circuit 143 to protect the in-circuit diode 141 is added to the traditional shifter level (disclosed in Laid out the Publication of the Patent Application of Japan No. 2008-22539, is the example).

As you can see, the protection circuit of this preferred variant implementation is applicable to various schemes with in-circuit diode, and the effects of the above-described preferred embodiments can be achieved also in any of these cases. In addition, as shown in Fig. 27-32 examples, the present invention is applicable not only to a circuit diode, but also to the scheme with line VDD. After all, since there is no need lengthening line VDD in order to ensure the protection circuit, the protection circuit can be added without increasing the overall size of the schema.

It should be noted that the protective diode of the present invention relates to the diode, which is included in the protection circuit in order to protect the in-circuit diode, but is not related to the diode, which protects the protective diode. This diode, which protects the protective diode is disclosed in Laid out the Publication of the Patent Application of Japan No. 3-206666, for example.

Fig. 33(a) shows a circuit 300, which is disclosed in Laid out the Publication of the Patent Application of Japan No. 3-206666, whereas Fig. 33(b) is a partially enlarged schematic view 300. Diagram 300 includes a diode 304, 305 and 306, which protects the thin-film transistor 10. In addition, the protective diodes 308 and 309, which protects the parasitic diodes 305 and 306, and protective diodes 305 and 306 soy is yaytsa in parallel with each other.

In the diagram 300 of the protective diodes 308 and 309 are provided to protect the protective diode (parasitic diode) 305 and 306, and not the in-circuit diode (i.e. diode, which forms the main part of the circuit). The protective diode 308 and the parasitic diode 305 is connected in parallel with each other. That's why, when the parasitic diode 305 is turned on when voltage is applied, the protective diode 308 is also included, and the current flows. Thus, the parasitic diode 305 and the protective diode 308 are activated simultaneously and their output currents flow through the same line (i.e. line VCC). Since the parasitic diode 305 does not form the main part of the circuit 300, there is no problem even if the parasitic diode 305 and the protective diode 308 is connected to the same line. However, if the parasitic diode 305 was the in-circuit diode, diode 308 could lead to incorrect operation of the circuit. This is so because the in-circuit diode and the protective diode connected in parallel with each other, it is impossible to include only in-circuit diode, and output currents as in-circuit diode and a protective diode will flow through the same output line.

On the other hand, in accordance with the present invention, the protected diode circuit is a diode. As shown in Fig. 34 protected in-circuit diode 1 and the protective diode 200 are connected with two different output lines. Therefore,even if the in-circuit diode 1 is turned on when the optimal supply voltage, the protective diode 20 is not included. Accordingly, the protective diode 20 does not affect the amount of current flowing through the output line of the in-circuit diode 1, and therefore will never lead to incorrect operation of the scheme.

INDUSTRIAL APPLICABILITY

The present invention is widely applicable for use in a wide variety of semiconductor devices that contain the circuit, fabricated on an insulating substrate. And the present invention can be used in any device with thin-film transistor. Examples of such semiconductor devices include a circuit Board, such as a substrate with an active matrix display device such as liquid crystal display device, organic electroluminescent (EL) display device and organic electroluminescent display device, the capture devices such as flat panel imaging unit in x-rays, and electronic devices, such as input device images and fingerprint scanning device. Among other things, the present invention is particularly effectively applicable to a liquid crystal display device which realizes excellent display quality due to a more rapid arousal, compared to normal is a display device, to the liquid crystal display device with a small scattering power or the liquid crystal display device with a large screen monitor.

DESCRIPTION LEGEND

D1, D2 protective diode

20 protective diode (N-channel type)

22 protective diode (P-channel type)

MM in-circuit diode

1 in-circuit diode (N-channel type)

2 in-circuit diode (P-channel type)

3, 8, 9 line

MK, MH, MJ, ML, MN thin-film transistor

50, 60, 70, 80 shift register

52 line input signal S

53 protection circuit

61, 63 protection circuit

1. Semiconductor device containing the scheme, which was formed on the substrate and which includes a thin-film diode and a protection circuit with a protective diode,
moreover, the thin-film diode includes:
at least one semiconductor layer that is located on the substrate and which has a first region, a second region and a channel region located between the first and second areas;
the gate electrode, which is located in such a way as to overlap with a channel region;
the insulating layer of the gate, which is located between the gate electrode and the semiconductor layer;
the first electrode, which is located on the first region and which is electrically connected with the first region and the electrode C is down; and
the second electrode, which is located on the second region and electrically connected with it, and
(a) the type of conductivity of the thin-film diode is n-type, and the anode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode thin film diode, or
(b) type conductivity thin-film diode is p-type, and the cathode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode of the thin-film diode, and
while the protective diode and the thin film diode is connected in parallel, and
thus, the protection circuit does not include other diodes connected to the line to obtain the direction of current flow opposite to the protective diode.

2. The semiconductor device according to claim 1, in which the protective diode contains:
at least one semiconductor layer that is located on the substrate and which has a first region, a second region and a channel region located between the first and second areas;
the gate electrode, which is located in such a way as to overlap with a channel region;
the insulating layer of the gate, which is located between the gate electrode and the semiconductor layer;
the first electrode, which RA is relies on the first region and which is electrically connected with the first region and the gate electrode; and
the second electrode, which is located on the second region and electrically connected with it.

3. The semiconductor device according to claim 2, in which the respective semiconductor layers of the thin-film diode and the protective diode is made of the same semiconductor film.

4. The semiconductor device according to one of claims 1 to 3, additionally containing multiple thin-film transistors,
when this thin film transistors have the same type of conductivity as the thin-film diode, and
while the respective semiconductor layers of thin-film transistors and thin-film diode are made of the same semiconductor film.

5. The semiconductor device according to claim 4, in which does not provide circuit protection for the line which is connected to the gate electrode of each of the above-mentioned thin-film transistors.

6. The semiconductor device according to one of claims 1 to 3 and 5, which circuit includes either an input section for inputting the signal from the external device in the circuit, or the output section to output the signal from the circuit to an external device, and
in this line, which connects with each other the thin-film diode and the protective diode has a smaller length than the line that connects with each other of the input or output section and the protective diode.

7. Poluprovodn ecovae device according to claim 6, in which line that connects to each other thin-film diode and the protective diode, has a length of 1 mm or less.

8. The semiconductor device according to claim 1, in which (a) the type of conductivity of the thin-film diode is n-type, and the anode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode of the thin-film diode, and when the potential of the anode electrode of the protective diode is high, the potential of the cathode electrode of the protective diode is also high.

9. The semiconductor device according to claim 1, in which (a) the type of conductivity of the thin-film diode is n-type, and the anode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode of the thin-film diode, and the cathode electrode of the protective diode is connected with a line leading to the power source VDD.

10. The semiconductor device according to claim 1, in which (b) type conductivity thin-film diode is p-type, and the cathode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode of the thin-film diode, and when the potential of the cathode electrode of the protective diode is low, the potential of the anode electrode protective diodato is low.

11. The semiconductor device according to claim 1, in which (b) type conductivity thin-film diode is p-type, and the cathode electrode of the protective diode is connected with a line which is connected to either the gate electrode or the first electrode of the thin-film diode, and the anode electrode of the protective diode is connected with a line leading to the power source VSS.

12. The semiconductor device according to one of claims 1 to 3, 5, and 7-11, in which circuit includes the shift register.



 

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