Neuron network for detection of errors in symmetrical system of residual classes
FIELD: information technologies.
SUBSTANCE: invention may be used for building of modular neural computers, which function in symmetrical system of residual classes. Stated neuron network comprises unit of neuron network of end ring of senior coefficient generation for generalised positional system of numeration, unit of polarity shift, unit of error detection, buses "with errors" and "without errors".
EFFECT: reduced hardware complexity.
The invention relates to the field of computer engineering and can be used to build neural computers operating in a symmetric system of residual classes (JUICE).
A device for detecting errors in the information presented in the JUICE (patent No. 2022471, EN 5H03 M 13/00), which contains the power conversion system of residual classes in the generalized positional number system (JUICE-SVR), blocks of calculating the index number, the computing unit additional code index, the adder, the computing unit entiendes amount, the power comparison unit multiplication by a constant counter. The disadvantage of this device is the complexity of the hardware implementation and low performance.
The closest to this invention is adaptive parallel-pipelined neural network for error correction (patent RU.2279131, G06N 3/04), which contains the block neural network finite rings (NJC) formation of digits in the representation of the generalized positional numeral systems, the block error detection, block error correction and block reconfiguration and localization errors.
However, this device has a large amount of equipment and cannot function in a symmetric JUICE, which operates with both positive and negative, are presented in the JUICE.
The purpose of the invention is to reduce the amount of equipment the equipment. This objective is achieved in that the device entered the block offset of positive and negative regions of the dynamic range, which shifts the Smoking area of the full range, which are allowed negative numbers in the JUICE in the first half of the permitted working range, and allowed positive numbers JUICE shifts in the second half of the permitted area. The proposed shift provides accommodation for positive and negative numbers symmetric JUICE within the operating range of the excess JUICE that will correctly identify the errors of both positive and negative numbers represented in the JUICE.
The figure 1 presents the scheme of the neural network for detecting errors in a symmetric system of residual classes, which contains an input layer neuron 1 to neuron 7, 8, the outputs of which are connected unit shift polarity 2, including the NJC 9 modulo piwhere i=1,2,..., k+r, the outputs of which are connected with the block NJC 19 the formation of the senior ratio SVR 3, the outputs of which are connected with a block error detection 4, consisting of the keys 14 and 15, the outputs of which are the outputs of the neural networks for the detection of errors in a symmetric system of deductions.
The input layer neuron 1 neuron 7 and 8 plays the role of the input register, the input of which receives the values of the digits (residues) controlled bus number 5 and discharges constant shift bus 6. From the outputs of the neurons of the input layer 1, the data arrives at the inputs of the NJC 9 modulo, where i=1,2,..., k+r.
The result of the modular sum of the digits of a controlled number and discharge constant shift of the tire 10, 11, 12, 13 is fed to the input of the neural network determination of the senior ratio SVR 19, consisting of the NJC (patent RU 2256213) modulo piwhere i=1,2,..., k+r. The coefficient senior level SVR bus 18 is supplied to the information input keys 14 and 15, to the control inputs of which receive control signals on buses 16 and 17, respectively, "no error" and "error". Consider the properties of redundancy JUICE and the principle of determining the errors that occur in the codes of JUICE.
Excess JUICE has properties that can be used for error control and fault digital processors. Excess JUICE has a k - work and r - control reasons. To ensure the uniqueness of the representation of each base system JUICE every reason p1, R2,...,Rk,..., Rk+nshould be relatively simple. Working Foundation of the p1, R2,...,Rkrepresent a non-redundant bases, and control r Foundation pk+1..., Rk+rredundant. In excess JUICE number is k+r residual numbers α1α2,..., αkαk+1,..., αk+r. In the symmetric JUICE for the tiravanija negative numbers use additional code, thus
Residual numbers αlα2,..., αkare non-redundant numbers, and αk+1,..., αk+r- redundant. Full range of excess JUICE denoted by [O,R], wherecovers the full set of States, represented by all k+r residual numbers. The entire range is divided into an adjacent region defined non-redundant and redundant bases. Region [O, P] is called the working range and scope [O, R] represents the full range.
To get redundancy, the operands and results of arithmetic operations performed in the JUICE, should be taken at the same scale so that they always fall within the operating range. This limit specifies the additional range of the system (area calculation) [- (R-1)/2, (P-1)/2] for odd P and [-P/2, P/2] for even R. note that when encoding additional code, the negative part of the dynamic range is at the upper limit of the full range. Positive number of additional band appears in the region [O(P+1)/2] for odd P and on the field of [O,P/2] for even & Display dynamic range for the corresponding region is shown in figure 2.
As can be seen from the drawing, the dynamic range of the zones, consisting of positive and negative parts is divided into areas in the workplace and full range. This circumstance complicates the detection and correction of errors, because errors are detected by the fact that the number of falls in an invalid area of the full range. Due to the fact that negative numbers appear in the upper part of the invalid region of the full range, the operation error detection implemented by the condition a>R, is the assignment of all negative numbers are misleading, which is not true due to the diversity of the dynamic range.
To overcome this difficulty it is necessary to hold the shift negative by residual rotation of the ring in the position shown on figure 3, resulting in dynamic range will be clearly displayed in the working range.
Shown in figure 3, the rotation is called the offset polarity and can be done by adding before performing the operation of detecting errors constantfor odd P andto each And∈[0,R]. It should be noted that for non-redundant JUICE is vzaimootnoshenie correspondence between integers in the dynamic range and the condition of the permissible working range.
If ithe shift of polarity within the JUICE is
a simple summation of the residues according to the formulain which αicdenotes the residual digits after the shift polarity.
Neural network for error detection in a symmetric system of residual classes works as follows. In the first synchronization cycle controlled by the number in the JUICE and constants Ciwhere i=1, 2,..., k+r arrive at the inputs 5, 6 neurons 7,8. In the second cycle synchronization with the outputs of the neurons 7.8 discharges controlled numbers and constants fed to the input of the NJC pi9 block shift 2. The NJC Ri9 implement a computational model ofin which αicdenotes the residual symmetric figures JUICE after shifting polarity.
In the third cycle synchronization αicthe tire 10, 11, 12 and 13 are received at the inputs of the neural network determination of the senior ratio SVR 19 block 3.
In the fourth cycle synchronization values are big-endian SVR αnbus 18 is supplied to the information input keys 14 and 15, to the control inputs of which receive control signals on buses 16 and 17 and where the key inputs are received simultaneously two signals is formed or the signal "no errors"or the signal "there is an error".
Thus, the detection of an error in simmetrichnaya is carried out for four cycles synchronization.
Neural network for error detection in a symmetric system of residual classes containing block of the neural network end ring formation senior coefficient generalized positional number system, characterized in that it includes a block shift polarity, with inputs controlled numbers and constants shift polarity are connected with the neurons of the input layer, the outputs of which are connected to the inputs of the neural networks of the end rings of the unit shift polarity calculating model
where ai- discharges controlled numbers represented in the system of residual classes, to shift polarity, Withi- a constant shift, pi- module of the system of residual classes, i=1,2,..., k+r, aicresidual numbers of controlled numbers represented in the system of residual classes, after shifting polarity, the outputs of which are connected with inputs of block neural network end ring formation senior coefficient generalized positional numeral systems, the output of which is connected with the information input keys, block error detection, the control inputs of which are connected with tires "there are errors" and "no errors", the outputs of which are the outputs of the neural networks for the detection of errors in a symmetric system of residual classes.
FIELD: information technology.
SUBSTANCE: invention relates to computer engineering and can be used in digital computing devices, as well as in devices for generating finite field elements and in cryptographic applications. The device has a unit for generating partial remainders in absolute magnitude, unit of modulus multipliers and unit of modulus adders.
EFFECT: faster operation.
4 cl, 3 dwg
FIELD: physics, computer engineering.
SUBSTANCE: invention is related to computer engineering and may be used in digital computing devices, and also in devices for formation of finite fields formation in cryptographic applications. Device comprises (n-k+1) summators, (n-k+1) multiplexers, register and delay element.
EFFECT: expansion of functional resources of device due to provision of formation of incomplete quotient.
FIELD: physics, computer facilities.
SUBSTANCE: computing mechanism concerns computer equipment and can be used in digital computing mechanisms, and also in devices of digital processing of a signal and in cryptographic applications. The device contains 2n-2 adders and n-1 multiplexers.
EFFECT: expansion of functionality of the device at the expense of provision of incomplete quotient formation.
FIELD: computer engineering.
SUBSTANCE: creator comprises units of partial reminder formation, multipliers by module, coefficients allocator, and adder by module. The result is achieved by increase of transformation base.
EFFECT: performance improvement by means of decrease of executable operations.
2 cl, 2 dwg
FIELD: computer engineering, possible use in devices for transformation of numbers from polynomial system of residual classes to positional code.
SUBSTANCE: device contains shift register, synchronization block, constant memory block, group of AND elements, positional accumulating adder, error detection block, data storage block, modulus two correcting adder. Error detection block is made in form of three-layered neuron network.
EFFECT: increased speed of transformation, expanded functional capabilities of device due to ensured error correction.
2 cl, 2 dwg, 5 tbl
FIELD: computer engineering; specific modular processors functioning in polynomial check-off class systems.
SUBSTANCE: proposed device is designed for use in modular processor units functioning in polynomial check-off class system (PCCS) to compute orthogonal bases upon occurrence of modulo pi(z) failures in computer circuits and their elimination from processes of modular PCCS code conversion to binary positioning code. Device has its starting input 1, group of shift registers 2, synchronization unit 3, device output 4, group of orthogonal bases computing units 5, units 6 of three-input AND gates, modulo two adder 7, group of information inputs 8, and group of device control inputs 9. Newly introduced in device are group of orthogonal bases computing units and modulo two adder.
EFFECT: ability of maintaining serviceable condition on error occurrence due to structure reconfiguration.
3 cl, 2 dwg, 1 tbl
FIELD: computer science, possible use in computing devices functioning in system of remainder classes, and also communication equipment for transferring information in remainder classes system codes.
SUBSTANCE: device contains a group of constant memorizing devices, a group of registers, discharge-parallel modulus adder.
EFFECT: decreased volume of equipment and increased speed of operation when transforming a number from remainder classes system to positional code.
FIELD: computer science, possible use in systems for communication and processing of information, functioning in remainder classes system.
SUBSTANCE: result is achieved due to serial calculation of all digits of required representation of number, two decrease total volume of hard memory of device and exclude adder of large capacity.
EFFECT: decreased hardware costs of numeric transformer from system of remainder classes to positional binary scale of notation.
3 dwg, 1 tbl
FIELD: computer science.
SUBSTANCE: network has three neuron networks of end ring, first one performs operation for adding digits of numbers, second one performs multiplication operation, and third neuron network determines position characteristics of non-positional input code.
EFFECT: higher speed of operation, broader functional capabilities, lesser dimensions.
FIELD: physics; computer engineering.
SUBSTANCE: present invention pertains to neurocomputers. The device has a unit for storing a binary input signal, a logic AND-OR circuit, internal memory unit, unit for generating the output string of codes, a generator of synchronising pulses, control unit, a unit for selecting duration and extracting information, analysis block and a corrector unit.
EFFECT: increased rate of operation, providing for the possibility of distinguishing change in state of processed signals, increased noise immunity, possibility of making super-complex neural networks, and simplification of design.
9 cl, 1 dwg
FIELD: modular neuro-computing systems.
SUBSTANCE: neuron network contains input layer of neurons, at inputs of which residuals of number being divided are received through system of modules, (n-1) neuron networks of finite ring for addition, (n-1) neuron networks of finite ring for multiplication, neuron network for expanding a tuple of numerical system of residues, and as output of neuron network for dividing numbers represented in system of residual classes are outputs of neuron network of finite ring for multiplication and output of neuron network for expansion of tuple of numerical system of residues.
EFFECT: expanded functional capabilities, increased speed of division, reduced volume of equipment.
FIELD: neuron-like computing structures, possible use as processor for high speed computer systems.
SUBSTANCE: device contains artificial neuron network composed of analog neurons, at least one controllable voltage block, a group of long neuron-like nonlinear communication units, each one of which contains serially connected circuit for synchronization and selection of radio impulse envelope, auto-generator with self-suppression circuit, a length of coaxial line, realizing functions of antenna, additional circuit for synchronization and selection of radio-impulse envelope.
EFFECT: increased information processing speed due to increased paralleling degree of computing processes.
FIELD: neuro-cybernetics, possible use in artificial neuron networks for solving various problems of logical processing of binary data.
SUBSTANCE: method for realization of logical nonequivalence function by neuron with two inputs is based on multiplication of input signals with corresponding weight coefficients and summing them, after that the total is transformed in activation block firstly by quadratic transfer function, and then by threshold function at neuron output.
EFFECT: realization by one neuron of first order of logical nonequivalence function of two variables.
5 dwg, 1 tbl
FIELD: computer engineering, possible use in modular neuro-computer systems.
SUBSTANCE: in accordance to invention, neuron network contains input layer, neuron nets of finite ring for determining errors syndrome, memory block for storing constants, neuron nets for computing correct result and OR element for determining whether an error is present.
EFFECT: increased error correction speed, decreased amount of equipment, expanded functional capabilities.
1 dwg, 3 tbl
FIELD: cybernetics, possible use as a cell for neuron networks.
SUBSTANCE: neuron-like element may be used for realization on its basis of neuron network for solving problems of estimation of functioning of complicated open systems, estimation of degree of optimality of various solutions by ensuring possible construction of model of researched system, both hierarchical and recurrent, with consideration of varying original and working condition of its elements and variants of their functioning, during modeling taking into consideration the level of self-sufficiency of neuron-like elements, susceptibility to effect of external signals, type and errors of setting of their parameters and parameters of input signals, and also provision of given precision of self-teaching of neuron network. Device contains input block, block for setting and normalizing weight coefficients, block for computing parameters of input signals, adder, signals share limiter, block for computing input part of condition, block for setting internal state, block for computing internal part of distance, block for counting distance, memory block, analyzer of state change value, block for determining precision of self-teaching of neuron network, block of determined dependencies, switch, output block, control block, random numbers generator.
EFFECT: creation of neuron-like element.
2 cl, 1 dwg
FIELD: technological processes.
SUBSTANCE: invention is related to the sphere of automatics and computer equipment and is intended for increase of RAM fault tolerance in control systems of true time. Device consists of memory address register (1) redundant RAM (2) equipped with Hamming code, controller of Hamming code (3) register of memory data (4) adder by module two (5) diagnostic cash memory (6) two registers - inverters (7) and (8) input (9) and output (10) multiplexers, element OR (11) element AND (12), adder of word error bits threshold (13) and control box (14).
EFFECT: increase of fault tolerance in relation to single, double and triple combined faults and malfunctions; expansion of functional resources.
5 dwg, 1 tbl
FIELD: automatics and computer science, possible use for engineering highly reliable matrix, conveyer, systolic, vector and other processors.
SUBSTANCE: device has block for selecting maximal continual address, flush block, address selection block, block for selecting minimal continual value, block for generating direction code, routing table, block for correcting direction, block for commutating accessibility signals, block for commutating continual address, adder block, source block of bearing voltages, message buffer block, messages commutation block, OR element, 2 analog-digital converters.
EFFECT: expanded application area of homogeneous environment of processor elements due to insertion of technical means providing transmission of message under conditions of appearing breakdowns of separate modules of homogeneous environment of processor elements and communications between them.
FIELD: automatics and computer science, possible use for construction of highly productive systems, control systems, systems for automatic control over technological processes and other systems, satisfying high conditions of reliable operation.
SUBSTANCE: device has maximal continual value selector, minimal continual value selector, block for determining isolated node, resistors, commutation elements, blocks for controlling commutation element.
EFFECT: expanded implementation spectrum due to decrease of adjustable cells and respectively time, needed for full readjustment of system having rationally positioned reserved processor elements.
8 cl, 19 dwg, 1 tbl