Method of quantum wells mixing within semiconductor device and semiconductor device structure made according to this method

FIELD: light devices production.

SUBSTANCE: method of quantum wells mixing within semiconductor device implies: a) formation of layer structure with quantum wells including doped upper layer; b) formation of etch preventing layer over mentioned upper layer; c) formation of temporary layer over mentioned etch preventing layer, and mentioned etch preventing layer has significantly lower etch rate than mentioned temporary layer on condition that etching requirements are preliminary specified; d) process of quantum wells mixing upon device structure making significant violation of at least a part of consumed layer; e) removal of temporary layer from at least device contact area by etching selective relative to etch preventing layer to uncover mentioned etch preventing layer within contact area; and f) formation of contact over layer structure with quantum wells directly on the surfaced uncovered after execution of stage e) at least within mentioned contact area.

EFFECT: improvement of device contact resistance.

15 cl, 10 dwg

 

The technical field to which the invention relates.

The present invention relates to the manufacture of optical devices having structures with quantum wells, and to the processes of mixing of quantum wells (QWI), used for the controlled change of the forbidden zone in the quantum well in pre-defined areas of quantum-well structures.

The level of technology

Referring to figure 1, note that the conventional semiconductor light emitting device 1 with the structure of quantum wells made on a suitable substrate 2, which represents, for example, a plate made of GaAs. Structure with quantum wells also contains the first shell layer 3, the optically active layer 4, the injection of charge carriers which can be used to generate photons or modulation of the behavior of photons, the second shell layer 5 and the upper layer 6.

In a typical case, the substrate 2 doped donor impurity (an impurity of n-type) to achieve the first concentration, and the first shell layer 3 doped donor impurity to achieve the second concentration. In addition, the optically active layer 4 in the typical case essentially has its own conductivity, and the second shell layer 5 typically doped with an acceptor impurity (an impurity of p-type) to achieve the third concentration. In addition, the upper layer 6 doped acceptance of the nuclear biological chemical (NBC admixture to achieve the fourth concentration.

Specialists in the art will understand that the upper layer 6 and the second shell layer 5 can etch with obtaining a ridge (not shown), acting as an optical waveguide to limit the optical modes within the optically active layer 4. In addition, at least part of the upper surface 8 of the device 1 can be made of the contact metallization (not shown) for providing the path to the injection of an electric current.

In some areas or regions of the device 1, for example, those that are designated as zone 10, it may be desirable impact locally shifted bandgap, i.e. a local increase of the band gap energy in the structure with quantum wells for education together possibly useful structures in visitors device.

When the customary processes of mixing of quantum wells is the mixing of the forbidden zone is carried out by replacing the atoms inside the structure with quantum wells (for example, in the upper layer 6) atoms of the adjacent layer or barrier material. This replacement of atoms occurs due to the interaction of atoms with point defects in materials and is carried out at high temperatures.

Point defects can occur in the provisions of the internodes, where the atom can diffuse from one internode to another through the structure of the crystal lattice, or vacancies, where the structure of the crystal lattice has free space for diffusing atom.

In the General case, impurities such as silicon (as a donor dopant) and zinc (as acceptor dopant), improve the use of point defects (vacancies or interstitials) and thereby reduce the temperature at which there is QWI. In addition, implantation and other processes that contribute to the disturbances in the crystal lattice, can contribute to the local better use of point defects and thus reduce the temperature at which there is QWI.

When carrying out another method of forming the upper layer 12 of dielectric, such as silicon dioxide, on the surface of the semiconductor structure with quantum wells with subsequent high-temperature annealing leads to the creation of vacancies in the top layer 6, which then diffuse through the semiconductor structure.

The effect of mixing of quantum wells is regulated to increase the bandgap semiconductor structures with quantum wells. As shown in figure 2, having an area of 20, the conduction and valence zone 21 structures with quantum wells in GaAs AlAs barriers are present as before QWI (line 22), and after QWI (line 23). This effect is very useful for making a wide nomen is latory light devices.

For example, quantum well in GaAs with AlGaAs barriers can be quantum pit mix to create a parabolic holes 23, which is purple to offset relatively unbiased quantum wells. Methods QWI can be used to improve the performance of individual devices, for example, to create different mirrors on the faces of the crystals lasers in order to reduce catastrophic optical damage.

Although using QWI for the manufacture of optical devices have significant advantages, violations due to high temperature processing and other violations of the crystal lattice, usually caused by some or all of the above methods QWI, they can cause some or all of the following undesirable aspects: (a) the introduction of irregularities in the surface 8; (b) segregation of dopant; (b) diffusion of impurities from the upper layer 6 of dielectric in the other layers of the semiconductor.

Thus, the carried out after the QWI process deposition of a metal contact on top of the layer subjected to QWI, may result in contact with high resistance, which has a negative effect on your device performance.

In the General case one or more of the above effects in combination can contribute to the large contact resistance of the p-t is PA, a big turn-on voltage and a gentle current-voltage characteristics of the manufactured device. High turn-on voltage will help supply more unwanted heat in the device, to limit the output power and reduce the service life of the device.

Disclosure of inventions

The present invention is to develop a process of manufacturing optical devices using mixing of quantum wells, which prevents, alleviates or at least reduces the problems associated with poor work contacts, which result in any of the above processes QWI or all of such processes.

Technical result achieved in the implementation of the present invention is to improve the contact resistance of the device, manufactured using the technology of mixing of quantum wells.

Additional technical result achieved by carrying out the invention in the case of forming contacts to p-type, is to provide a contact having a low resistance, resulting in improved performance of the semiconductor device.

The present invention is solved by the method of performing the mixing of quantum wells in the structure of the semiconductor device, enabling the m stages, on which:

a) forming a layered structure with quantum wells comprising doped upper layer;

b) form a stop etch layer over the said upper layer;

C) forming a temporary layer over the said stop etch layer, and mentioned stopping the etching layer has a much lower etching rate than said temporary layer, when it turns out in the pre-defined conditions of etching;

g) carry out the mixing process of quantum wells in the structure of the device, which makes a significant violations, at least in part temporary layer;

d) removing at least a temporary layer, at least in the contact area of the device using the procedure of etching, selective to stop the etching of the layer to reveal the aforementioned stop etch layer in the contact area; and

e) forming a contact on top of the layered structure with quantum wells, and directly on the surface as disclosed in step d), at least in the above-mentioned contact area.

Brief description of drawings

Next, with reference to the accompanying drawings and as will be described specific embodiments of the present invention, in which:

figure 1 presents the cross-section structures with quantum wells for optical devices suitable for use with the processes of mixing of quantum wells;

figure 2 presents a diagram illustrating the effect of mixing of quantum wells in the forbidden zone in the structure with quantum wells shown in figure 1;

figure 3 presents the conditional cross-section of a semiconductor structure with quantum wells in accordance with one aspect of the present invention; and

figure 4 shows the results of the analysis by secondary ion mass spectroscopy (SIMS) profile of the dopant distribution of beryllium in sealing R+and meningeal layers of semiconductor material grown by molecular-beam epitaxy;

figure 5 shows the results of analysis by SIMS profile of the dopant distribution of zinc in the upper p+and meningeal layers of semiconductor material grown by chemical vapour deposition of ORGANOMETALLIC compounds (MOCVD); and

figure 6 shows the results of analysis by SIMS profile of the dopant distribution of silicon in the upper R+and meningeal layers of semiconductor material grown by MOCVD.

The implementation of the invention

In accordance with the present invention found that the presence of the upper layer of the time part to be removed after processing by means of the PTO QWI, a major advantage when restoring the surface of the top layer to achieve a state in which still possible high-quality contacts. To this end, the invention proposed stopping the etching layer and a temporary upper protective layer over a top layer 6, as shown in figure 1, so that with violations and depleted mixed material obtained as a result of processing by QWI, can be easily removed to provide a deposition with low contact resistance of the p-type structure with mixed quantum wells. This significantly improves the performance of the device by increasing the output power and lifetime.

The preferred specific implementation of the finished structure with quantum wells with a layer that stops etching, and the temporary top layer before carrying out the mixing process of quantum wells is shown in figure 3.

The structure of the device 30 includes a substrate 32 of n-type (for example, a wafer of GaAs), which is applied to the semiconductor layers 33 to 36. On the substrate formed by the first shell layer 33. The first shell layer 33 preferably is an n-type material, such as an AlGaAs doped with silicon. More specifically, the first shell layer can include multiple sublayers, e.g. the first, the second and third sublayers 33a, 33b and 33 C.

On the first shell layer formed of optically active layer 34. Optically active layer 34 is preferably undoped material with its own conductivity. More specifically, the optically active layer 34 may include multiple sublayers, for example, the first, second, and third sublayers 34a, 34b and 34C.

On the optically active layer formed of the second shell layer 35. The second shell layer 35 preferably is a material of p-type, such as an AlGaAs doped with zinc. More specifically, the second shell layer 35 may include multiple sublayers, for example, the first, second, and third sublayers 35A, 35b and 35C

On top of the second shell layer 35 formed of the upper layer 36. The top layer 36 preferably is a material of p-type, for example is a GaAs doped with zinc. The top layer 36 will remain after processing through the QWI process. The top layer preferably does not contain aluminum to prevent oxidation of this layer when exposed to air.

In accordance with the present invention over the top layer 36 has a stop etch layer 37. Stopping the etching of the layer 37 preferably contains a material of the p-type doping levels, similar to the top layer. On top of stopping trawl the tion layer has a temporary layer 38. This temporary layer preferably contains a material of the p-type doping levels, similar to the top layer. In a more preferred embodiment, the temporary layer contains the same material as the top layer.

Generally speaking, stopping the etching layer 37 has electrical properties similar to the electrical properties of the temporary layer, but provides much greater than the temporary layer, the resistance to etching by any of methods such as chemical, gas, or plasma etching.

The above-described structure of the device is preferably formed using epitaxial techniques of cultivation, such as molecular beam epitaxy (MWe)or chemical vapour deposition of ORGANOMETALLIC compounds (MOCVD). However, you can use any suitable method of growing or deposition, such as epitaxy from the vapor phase (VPE) or epitaxy from the liquid phase (LPE).

Possible semiconductor laser having output radiation at a wavelength of 980 nm and manufactured using the above-described preferred structure, in the typical case will consist of layers described in the following table 1.

In the example corresponding to table 1, stopping the etching layer is formed of GaInP.

In an additional specific embodiment, done by the means of stopping the etching layer is formed of AlAs. The preferred structure for this particular variant of the implementation described in the following table 2.

Table 1
layermaterialmol (initial state)fraction (final state)strain, %photoluminescence, fluorescence (nm)thickness (m)DC voltage PV (initial state)level (end-state)typealloying impurity
38GaAs1>2e19pZn
37Ga(x)InP0,500,05>2e19pZn
36GaAs0,1>2e19pZn
35SAl(x)GaAs0,320,00,122e18 pZn
35bAl(x)GaAs0,321,72e18pZn
35aAl(x)GaAs0,320,22e172e18pZn
34CAl(x)GaAs0,10,320,11i
34bGaIn(x)As0,171,199700,008i
34aAl(x)GaAs0,320,10,11i
33Al(x)GaAs0,3212e18nSi
33bAl(x)GaAs00,320,252e18nSi
33aGaAs0,52e18nSi
Table 2
layermaterialmol (initial state)fraction (final state)strain, %photoluminescence, fluorescence (nm)thickness (m)DC voltage PV (initial state)level (end-state)typealloying impurity
38GaAs0,1>epZn
37AlAs0,01>epZn
36GaAs0,1>epZn
35SAl(x)GaAs0,32 0,00,122e18pZn
35bAl(x)GaAs0,321,72e18pZn
35aAl(x)GaAs0,320,22e172e18pZn
34CAl(x)GaAs0,10,320,11i
34bGaIn(x)As0,171,199700,008i
34aAl(x)GaAs0,320,10,11i
33Al(x)GaAs0,3212e18nSi
33b00,320,252e18nSi
33aGaAs0,52e18nSi

QWI process is performed on the above-described structure. When implementing the preferred procedure QWI process on top of the precipitated semiconductor layer of silicon dioxide, followed by a thermal annealing process.

After conducting QWI process and removal of the silicon dioxide is detected significant destruction extreme top layer 38 of the structure. It should be clear that the application of the normal process at the top layer, in fact, may represent the upper layer 36. This degradation can significantly degrade the performance of any contact is formed by depositing a suitable metallization layer on the top layer 36.

Destruction takes the form of: (a) physical damage to the semiconductor surface; (b) diffusion of the acceptor dopant (in this example - Zn) surface and (b) contamination by impurity, moving from silicon dioxide in the semiconductor layer.

With regard to paragraph (a), the Nar is the relationship of the surface after QWI process can be observed in the optical microscope.

With regard to paragraph (b), the diffusion of acceptor dopant can be seen when held by the method of SIMS measurements of the device structure before annealing and after annealing. Figure 4 and 5 shows conducted by the method of SIMS measurement, illustrating the distribution profile of the acceptor dopant. Figure 4 shows the profile for the material grown by MWe-material (in this example, doped with beryllium), before the annealing process, and after this process. Figure 5 shows the profile for the material grown by MOCVD material (and doped zinc), before the annealing process, and after this process. The concentration of the dopant is illustrated as a function of depth is plotted on the horizontal axis as time of etching in seconds. The results of both of these measurements can be noticed that the concentration of acceptor impurities decreased with a factor of ˜2, which leads to a corresponding reduction of the electrical resistivity of the material.

With regard to paragraph (C), figure 6 illustrates carried out by the method of SIMS measurement for silicon in a state of cultivation as compared with the samples after annealing (annealing was performed at 850 and 900° (C)that demonstrate that there is a high level of impurities of silicon, diffusionally in material polyp is wodnika after QWI process.

Returning to figure 3, note that the present invention uses selective etching (wet or dry) to remove damaged epitaxial material, i.e. a temporary layer 38. The etching process is chosen so that it was highly selective for temporary layer 38 and the material stopping the etching layer 37, using methods common in the art.

Thus, the process of selective etching terminates at the stop etch layer 37. Specialists in the art known a number of suitable technological transitions of wet and dry etching required to identify holes between layers of gallium arsenide and phosphide layers.

Then you can spend the deposition of a metal contact directly on stopping the etching of the layer if the material stopping the etching layer suitable for receiving contact with a low resistance.

Alternatively, you can use the second technological transition selective etch, which is selective for stopping the etching layer and the top layer 36, to delete selective etching stopping layer, exposing the semiconductor surface quality of the top layer 36 with the required levels of acceptor dopants, and the OS is the establishment of a metal contact can be done on this layer.

It should be clear that to carry out the first and/or second technological transition selective etching is necessary only in those areas where it is fitting to form contacts. In other regions of the device, you can save time layer and/or stopping the etching of the layer.

When performing normal QWI process without using a temporary layer 38 and stopping the etching of the layer 37 of the contact resistance contacts to p-type, formed on the upper layer 36, as a rule, tend to increase in value from about 2 to more than 5 Ohms and the voltage increase include approximately from 1.2 V to 2 V in the semiconductor laser with the wavelength of the radiation component of 980 nm.

Possible specific embodiments of, described above, showed that the QWI process essentially no impact on the contact resistance and the turn-on voltage of a semiconductor laser with wavelength radiation component 980 nm.

Consequently, it is possible to benefit from QWI process when forming the offset regions of the forbidden zone of the device (for example, those benefits can be used for forming different mirrors in the laser device that does not lead to the appearance of imperfections, due to high contact resistance and turn-on voltage).

In CA the arts, the above described laser based on AlGaAs wavelength radiation component of 980 nm. However, the invention also can be applied to any photonic device based on gallium arsenide, phosphide, nitride, or antimonide of an element of groups III to V of the periodic system of elements that require mixing areas of quantum wells and the availability of electrical contacts.

The invention finds primary use in the manufacture of semiconductor lasers and amplifiers for telecommunications applications, but, generally speaking, can be applied for the manufacture of any device requiring QWI process.

Using a combined temporary layer 38 and stopping the etching layer 37 provides a large number of advantages compared with the prior art.

Defects in the layers, which are due to the processes of mixing of quantum wells may penetrate deeply in the temporary layer, and stopping the etching layer helps to prevent the movement of such defects in the top layer.

Also found that the use of stopping the etching of the layer allows to obtain proper, atomically flat surface after etching, which significantly improves the contact resistance after deposition of the metal. In contrast, a simple synchronized etching in the volume is "thick temporary layer plus the top layer gives a rough surface (in particular, because of the variability of the speed of etching due to broken top areas consumable layer), and this rough surface creates problems when forming contacts.

In addition, energy and optical spectra of the laser comb waveguide are determined mainly by the width and height of the ridge. Wet or dry etching in the volume "thick top layer plus the temporary layer to obtain the exact height of the ridge is difficult and undesirable in a robust manufacturing process. Stopping the etching of the layer determines the height of the ridge with a very good (atomic) precision.

The use of the stop etch layer may also guarantee an overall reduction in the thickness of the top layer, thereby using less stringent conditions QWI process to obtain the required degree of mixing, and hence further reduction of violations that are made in the semiconductor structure.

7 to 10 illustrate the use of stopping etching and temporary layers described above, in the context of the QWI process used in the formation of a semiconductor laser.

Referring to Fig.7, we note that the structure 70 conventional laser device containing a meningeal layers 70A and 70C together with has its own conductivity optically active the m layer 70b, performed on a substrate (not shown) to limit the quantum well. Each of these layers may contain additional sublayers as described previously.

In order to carry out the mixing process of quantum wells to limit additional characteristics of the optical device at the above-mentioned structure is formed by stopping the etching layer 71 and the temporary layer, as described previously. For the implementation of the QWI process sprayed layer of silicon dioxide on a previously restricted area 73, 74. A suitable mask material deposited photolithographic method, such as a photoresist (not shown)protects the other 75 surface during sputtering deposition. After removal of the applied layer of the photosensitive photoresist from the surface 75 by means of plasma-chemical cooling of the vapor phase (PECVD process) precipitated silicon dioxide 76, essentially covering the surface 75.

The device is then subjected to thermal annealing, preferably using a process of rapid thermal annealing (RTA) in accordance with known techniques. During this process, the RTA gallium from the underlying structure 70 laser migrates in the deposited layers 73, 74 SiO2resulting deposited under layers 73, 74 SiO2there is a formation of the offset areas bandgap of the quantum well. SiO2caused the first through PECVD process, inhibits QWI process.

On Fig shown that layers of SiO2removed. This makes a significant breach in the open surface of the temporary layer, so that there is a segregation of the acceptor dopants from the surface. Referring to figure 9, note that the temporary layer is removed using an etch process that is selective to the stop etch layer 71, as described previously.

As shown in figure 10, then stopping the etching layer is removed using a suitable etching process, and left a high-quality surface structure 70 of the laser, which enables the deposition of a suitable metal contact.

Other specific ways of implementation are within the scope of the claims appended claims.

1. The method of mixing of quantum wells in the structure of a semiconductor device, comprising the steps are:

a) forming a layered structure with quantum wells comprising doped upper layer;

b) form a stop etch layer over the said upper layer;

C) forming a temporary layer over the said stop etch layer, and mentioned stopping the etching layer has a much lower etching rate than said temporary layer when they are in the seat reservation certain conditions, the etching;

g) carry out the mixing process of quantum wells in the structure of the device, which makes a significant violations, at least in part temporary layer;

d) removing at least a temporary layer, at least in the contact area of the device using the procedure of etching, selective to stop the etching of the layer to reveal the aforementioned stop etch layer in the contact area; and

e) forming a contact on top of the layered structure with quantum wells, and directly on the surface as disclosed in step d), at least in the above-mentioned contact area.

2. The method according to claim 1, wherein step d) further includes the step, which removes the stop etch layer using procedures etching, selective to legirovannom the top layer to reveal the aforementioned doped top layer at least in said region of contact.

3. The method according to claim 1, in which step g) includes the step of heat treatment.

4. The method according to claim 1, in which step g) includes the implementation of the method of disordering vacancies without impurities, comprising a stage on which is formed a dielectric layer over at least part of the temporary layer during the mixing process of quantum wells.

5. The method according to claim 1, in which et is p (e) includes the step which precipitated metal layer on said stop etch layer for the formation of this contact.

6. The method according to claim 2, in which step e) includes the step on which the precipitated metal layer on said doped top layer for the formation of this contact.

7. The method according to claim 1, wherein the temporary layer has one or more levels of alloying similar electrical properties and/or similar diffusion coefficients, as in the doped top layer.

8. The method according to claim 7, in which the temporary layer is formed from the same semiconductor material and doped top layer.

9. The method according to claim 1, in which the layered structure with quantum wells contains a substrate with a first level of doping doping an impurity of the first type, the first shell layer with a second doping level of the doped impurity of the first type on the substrate, the optically active substance layer having essentially private conductivity, the second shell layer with a third doping level of the doped impurity of the second type, and the top layer with the fourth doping level of the doped impurity of the second type.

10. The method according to claim 9, in which the alloying impurity of the first type is a donor (an impurity of n-type, and doping an impurity of the second type is the acceptor (an impurity of p-type).

11. The method according to claim 9, the which, at least one of the layers is formed from a combination of different sublayers.

12. The method according to claim 1, wherein the doped top layer contains GaAs, stopping the etching layer includes GaInP, and a temporary layer contains GaAs.

13. The method according to claim 1, wherein the doped top layer contains GaAs, stopping the etching of the AlAs layer contains, as a temporary layer contains GaAs.

14. The method according to claim 1, further comprising a stage on which form the light emitting device of the above structure of the semiconductor device.

15. The structure of the semiconductor device manufactured using the method according to any one of claims 1 to 14.



 

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