Device for checking efficiency of local network segments

FIELD: computer science.

SUBSTANCE: device has programmable controller with software integrated in random-access and hard memory for functions of gathering and processing of information about peripheral devices of segment, buffer memory, output register, input register, clock generator, power block, buffer output cascade of force outputs ad buffer input cascade for inputs.

EFFECT: higher efficiency, broader functional capabilities.

4 cl, 6 dwg

 

The invention relates to digital computing, and in particular to means to the control means and Troubleshooting devices using discrete nature of the operation.

Known diagnostic system digital devices containing a computing device with a Central processing unit, a multiplexer and bus connection with the diagnostic object (RU # 2127447, G 06 F 11/26, 1999).

The lack of technical solutions known system is the inefficient use of resources of the computing device by reason of its borrowing large section of the secondary functions.

More perfect and the closest analogue of the claimed invention is a device to verify that the LAN segments containing programmable controller with integrated RAM and permanent storage software functions of collecting and processing information about peripheral devices segment, the buffer memory, the output register, input register, the clock frequency and power supply (US No. 5919250, G 06 F 15/17, 1999).

The specified device ensures efficient use of resources of the local network by converting moderate amount of information in the places of its occurrence. However, this result is due to the complexity of the CX is modernisasi solutions of hosts on the local network, which ultimately increases costs and excludes the use of non-specialized for this hardware.

The task, which is aimed by the invention, is to provide a reliable and relatively inexpensive means to test LAN segments (e.g., Ethernet) and remote control of connected equipment by issuing digital discrete signals, as well as primary data collection from sensors connected to discrete digital inputs of the device.

The technical result, which can be obtained by carrying out the invention, is to provide opportunities to apply the device in various cases requiring the interaction of specialized devices, sensors, and actuators with discrete control interfaces with a local area network, for example, on the basis of Ethernet technology and a group of TCP/IP protocols.

This technical result is achieved by the device to verify that the LAN segments containing programmable controller with integrated RAM and permanent storage software functions of collecting and processing information about peripheral devices segment, the buffer memory, the output register, the input re the ister, the clock frequency and power supply, due to the fact that it is equipped with a buffer output stage of the power outputs to connect external equipment to the local network and the buffer input cascade input for connecting external equipment to the local network, while the clock frequency is connected to a programmable controller, a buffer memory connected to the programmable controller, the power unit is connected to a programmable controller, a clock generator and an external non-volatile memory, a programmable controller via the output register is connected to the buffer output stage, and through the input register is connected to the buffer input stage, and the input register is executed in the form of a shift register with the possibility of parallel recording information, and the output register is executed in the form of a shift register with the possibility of sequential recording information.

And also due to the fact that it further comprises a network controller, designed for validation and identification of packages.

And also due to the fact that the buffer memory is executed in an external nonvolatile memory, connected via serial interface to a programmable controller.

And also due to the fact that the PSU is in the form of integral parametricism the voltage regulator with rectifier diode bridge with aristera at the entrance and a smoothing capacitor on the output.

The solution provides connection to standard local area computer network based on Ethernet technology, support for standard protocols in networks based on TCP/IP technology and the use of the device in a huge number of existing networks based on this technology, including the composition of the global computer network Internet. Support for ICMP Protocol and static IP address, allow you to use the device for testing fact the health of the local network segment, in which it is installed, and scan external sensors digital signals. And if the network controller corresponding to the Ethernet standard, as the control Protocol device uses standard SNMP Protocol, it allows you to control the device using the standard SNMP clients that are included with all the most popular operating systems and meet all the standards for connecting to a local computer networks based on Ethernet technology.

The chance to own the software implementation of all major protocols in networks based on group protocols TCP/IP, and all functions of the unit for the control of discrete inputs/outputs on the controller with minimal resources as possible to reduce the price of the device without compromising E. what about the functionality, the external non-volatile memory allows you to perform the remote update device software without threatening to bring the device in an unusable state due to the distortion of information during transmission and without any physical action on the device.

The application of programmable controller with integrated RAM and permanent storage software functions of collecting and processing information about peripherals segment maximally reduced the number of external elements and, consequently, reduced the device and made it more compact.

The combination of the buffer output stage of the power outputs to connect external equipment to the local network with the output register in the form of a shift register on the basis chip with the possibility of sequential recording information, the conditions for the independent control of discrete output channels, where each channel has an output current amplifier and the output type open collector, which allows the use of output signals in a wide range of voltages and output currents.

The combination of the buffer input cascade input for connecting external equipment to the local network with an input register in the form of a shift register on the basis chip with the possibility of the parallel recording of information, creating the conditions for reception of signals with independent discrete inputs, when each input is protected against overvoltage, current limiter, and passive protection from external noise.

The presence of a power source in the form of integrated parametric voltage regulator with rectifier diode bridge with aristera at the entrance and a smoothing capacitor at the output as possible to extend the input voltage range of the device and to provide power to the device from the power supply with the output as a variable, and constant voltage and insensitivity to pereproshivka input voltage.

The essence of the invention is illustrated by drawings, where figure 1 shows a block diagram of the device, figure 2 is a variant of an electrical circuit buffer input stage in figure 3 - possible variant of an electrical circuit buffer output stage, figure 4 - possible variant of an electrical circuit of the power supply of Fig. 5 - algorithm programmable controller, and figure 6 - the algorithm process to exchange information with expansion Board".

Device to verify that the LAN segments includes a programmable controller 1 is integrated into its operational and permanent memory software functions of collecting and processing information is and peripherals segment. As such can be applied PIC16F876 microcontroller Microchip software that supports IP Protocol stack, ARQ, ICMP, and SNMP. All these protocols are standard and described in the RFC series of documents of the IETF, which began in 1969, and contains a description of the Internet Protocol Suite and related information).

To store tables of settings, as well as temporary storage of firmware in the process of the upgrade version of the software, the device comprises a buffer memory, made in the form of an external non-volatile memory 2 (e.g., based on microchip Microchip 24LC128)connected via serial interface (e.g., I2C) to the programmable controller 1.

The device comprises a network controller 3 interface 4 (for example, IEEE 802.3 and physical 10Base-T) LAN (e.g. Ethernet, damn. not shown). Network controller 3 performs validation packages (verifies the checksum of the packet) and identification of packets entering the device, highlighting the intended device and discarding all the rest. The network controller can be made on the basis of standard RTL8019AS chip company company Realtek.

The synchronization of the controllers in the device enables the generator 5 clock frequency (e.g., the first quartz crystal SS2 company Jauch), connected as an external generator and programmable 1 and the network 3 controllers.

Electric power for operation is supplied through unit 6 power supply, made in the form of parametric integral stabilizer 7 power (for example, LM78L05 Series 3-Terminal Positive Regulators company National) rectifier diode bridge 8 aristera 9 at the entrance and a smoothing capacitor 10 at the output.

The control information for the outputs of the programmable controller 1 transmits through the output register 11, is made in the form of a shift register on the basis chip with the possibility of sequential recording information, and information from the inputs read from the input register 12, made in the form of a shift register on the basis chip with parallel recording of information. Specified as an output register can be registers Philips 74HC595; ST; 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state, and the input register register Philips 74HC/HCT597; 8-bit shift register with input flip-flops.

The device is equipped with a buffer output stage 13 of the power outputs to connect external equipment to the local network, the output key which is assembled on the circuit of the transistor 14 with "common-emitter" and the current-limiting resistor 15. The control information is fed into a cascade of 13 from the output of the register 11, all of you who adnie signals in order to reduce cost and size are not galvanically isolated.

The device has a buffer input stage 16 input to connect external equipment to the local network. Circuit solution input stage with current-limiting resistor 17, a load resistor 18 and diode Assembly 19 allows to extend the range of input signals, to protect the input of the input register and to suppress noise induced on unconnected input device. Control information flows from the cascade 16 in the input register 12, in this case, all output signals in order to reduce cost and size are not galvanically isolated.

Structurally, the input 12 and output 11 registers can be composed of 8 identical blocks (one block for each discrete input-output). This feature in combination with a circuit solution to buffer the input 16 and the output 13 of the cascades provides the possibility of increasing the number of discrete inputs / outputs by simply increasing the number of input 12 and output 11 registers, including cascading one after another, without any other changes in the structure of the device.

The device supports various control modes digital inputs/outputs, allowing you to build different configurations of control systems and scan input signals. In order not to become attached to a specific logic level is th key buffer output stage 13 introduces the concept of active and inactive status. Inactive is considered state of the key when the device is switched on. If you want to proinvestirovatj output signal, simply change the signal state at startup.

In particular, for translating the output signal in the desired state according to the control frame via SNMP Protocol, any of the output signals of the device can be set or reset the corresponding bit in the status byte outputs. The set will be saved in non-volatile memory 2 device and recover the device is switched on. The translation of any of the output signals to the active state from the previous state of the signal mode output cascade 13. This operation does not affect the state of the outputs when the device is switched on. The translation of any of the output signals in the inactive state is also carried out regardless of the previous state of the signal mode output cascade 11 and does not affect the state of the outputs when the device is switched on. To translate any of the output signals in the generation mode, you can set different frequency and duty cycle rectangular pulse using register values time activity and register the timeout value of the output signal of the programmable controller 1. Similarly, translation of any and the output signal in output mode single pulse with adjustable length.

Input signals in addition to displaying the current status can be changed to output mode TRAP message when the status changes. To this end, the input through the input register 12 can be programmed to send TRAP messages such as during the transition from active state to inactive, and Vice versa, and also for both cases. Sending TRAP messages will be up until the remote host does not acknowledge this TRAP messages by writing the appropriate mask in the input register 12. If necessary, the Executive management equipment exits the device through the buffer output stage 13 is set in the inactive state when the device is switched on, and for hardware enable signal remotely translates into an active state. In this case, the read input register 12 provides information about the success/failure of the command.

To reset the hardware output device is configured as output active level of the reset signal and operation mode with the issuance of a single pulse. If you need to generate the reset signal, receives a control frame, the parish of which the device generates a reset signal preset duration. Thus, it is possible to reset the network equipment, which determines the communication with the device itself.

If you connect the input device to which gnlu reset (or to another digital output discharged inside equipment), then programming the entrance to issue a TRAP message when switching to the active state, the device will automatically send notification of completion of reset of the equipment. If you need multiple discharge equipment, the output can be translated in a generation mode (the reset signal), and on arrival TRAP messages about the end of the reset disable this mode the frame, and up until the TRAP message is not confirmed and the generation mode is not turned off, the device will issue periodic signals reset the equipment.

The device automatically generates the reset signals when the connection to the host lost. The output of the device into the mode of generation with active duration equal to the desired duration of the reset signal, and the duration of the inactive level equal to the time to verify connectivity. Then when you switch the device will issue a reset signal to a hub, then if during the time of inactivity of the reset signal will forward to cleaning the internal timer, the reset will not be performed, if this team doesn't come, it means that the connection is lost and the device will reset the hub and will have to repeat the reset operation once during the inactivity signal until the communication is restored.

If necessary, you can connect the input signal to the reset signal and configured to automaticallyoperated TRAP messages about the reset signal. The device can connect several independent signaling loops, each customized to send TRAP messages in the event of termination, and, if necessary, in the case of recovery loop. It is also possible to automatically send TRAP messages about the integrity of the train. For this purpose it is necessary to translate the output signal in the generation mode, when each status change TRAP will be sent a message indicating that the plume is not damaged.

1. Device to verify that the LAN segments containing programmable controller with integrated RAM and permanent storage software functions of collecting and processing information about peripheral devices segment, the buffer memory, the output register, input register, the clock frequency and power supply, characterized in that it is provided with a buffer output stage of the power outputs to connect external equipment to the local network and the buffer input cascade input for connecting external equipment to the local network, while the clock frequency is connected to a programmable controller, a buffer memory connected to the programmable controller, the power supply is connected to the programmable controller, a clock generator and an external non-volatile memory, programmable USB circuits is p via the output register is connected to the buffer output stage, and through the input register is connected to the buffer input stage, and the input register is executed in the form of a shift register with parallel recording information, and the output register is executed in the form of a shift register with the possibility of sequential recording information.

2. The device under item 1, characterized in that it further comprises a network controller, designed for validation and identification of packages.

3. The device under item 1, characterized in that the buffer memory is executed in an external nonvolatile memory, connected via serial interface to a programmable controller.

4. The device under item 1, characterized in that the power supply is made in the form of integrated parametric voltage regulator with rectifier diode bridge with aristera at the entrance and a smoothing capacitor on the output.



 

Same patents:

FIELD: wireless communications.

SUBSTANCE: estimate of time needed for transfer and confirmation of receipt is synchronized by both sides of radio communication line protocol without necessity for three-side synchronization of communication establishing process usually necessary for said synchronization. Method includes procedures used by both sides of communication line to dynamically renew and correct their starting estimates of time needed for transfer and confirmation of receipt.

EFFECT: higher efficiency, broader functional capabilities.

7 cl, 8 dwg

FIELD: wireless interface technology.

SUBSTANCE: one protocol of network messaging is a control protocol for NDIS device. Also, multiple software products for operation in circuit-based, i.e. bus-connected, network, can also be used for any wireless Bluetooth network.

EFFECT: broader functional capabilities.

3 cl, 3 dwg, 1 tbl

The invention relates to the field of computer management remote access networks

The invention relates to a two-way multimedia services

The invention relates to a system for creating messages e-mail

The invention relates to wireless local area networks (WLAN) consisting of a set of transceiver devices (SRD), is able to communicate with each other-type operating in a peer-to-peer"

The invention relates to wireless local area networks (WLAN) consisting of a set of transceiver devices (SRD) users and enables simultaneous scanning of the antenna beam in different directions PPU, in the reception mode, and transmission omnidirectional signal as the calibration signal and the data packet is one of the PPU, in the transfer mode detection signal PPU, in the reception mode, and the subsequent orientation of their antenna beams per source

The invention relates to a radio system and radio communications, and more particularly to a device and method for transmitting and receiving multimedia data including video data, via the packet radio communication system, radio transmission and radio reception

The invention relates to systems and methods of the interconnect sites of the world network connection

The invention relates to postal services, specifically to the delivery of mail to the addressee, primarily using the capabilities of existing post offices and telecommunication networks

FIELD: electric communications.

SUBSTANCE: method includes counting rules of setting up and maintaining of communication session by increasing number of recorded message packets and using maximal allowed number of coincidences, which is necessary for stable functioning of automatic systems, including offering services to authorized clients. For monitoring sensitivity threshold is predetermined for safety monitoring system of automated system, which threshold is determined by maximal allowed number of matches and number of standards, while values of coefficients can be selected dependently on required trustworthiness of attack detection.

EFFECT: higher trustworthiness.

3 dwg

FIELD: technical systems diagnostics.

SUBSTANCE: method includes forming an equivalent standard model of connections, gaps of which include standard models of composition parts of current type of products, combinations of input signals are set in certain order, parameters of response on outputs of standard model of diagnosed product are determined as well as in characteristic intermediate points between standard models of composition parts of product, values of response parameters together with parameters of test input signals are recorded in database, after which process is repeated until fully searching all states of standard model.

EFFECT: possible forming of tests in absence of standard samples of control subject for different classes of products in different areas.

4 dwg

FIELD: control systems, for lasers in particular.

SUBSTANCE: each laser on each factory is connected to appropriate server of terminal, while at each factory server of central control node exchanges information with each laser through local network. Gathering of information from lasers is realized via server device of central control and this information is used for forming of total information, which is accessible for interested parties, which are allowed to view content of Web-server.

EFFECT: higher efficiency.

14 cl, 5 dwg, 2 tbl

FIELD: computer science.

SUBSTANCE: network has end ring neuron network, Hopfield neuron network, demultiplexer and multiplexer.

EFFECT: broader functional capabilities, higher efficiency, higher speed of operation.

1 dwg

FIELD: computer science.

SUBSTANCE: device additionally includes first and second block for address selection of minimal continual value, block for permission of program transfer receiving, first and second demultiplexer blocks, fatal breakdown detector block, support voltages forming block, first, second, third and fourth range selection blocks, vitality signals separation block, block for determining minimal continual value and block for forming vitality signals.

EFFECT: broader functional capabilities.

20 dwg, 1 tbl

FIELD: measuring equipment.

SUBSTANCE: in turns, on each device, included in diagnosed block, feeding voltage amplitude is decreased in steps from nominal value Enom to threshold value Ethri with step ΔEn, while on each step of decreasing of amplitude of feeding voltage of device pseudo-random multi-digit code sets are sent to inputs of diagnosed block, consisting of logical zeroes and ones with even possibility of appearance of logical zero or logical one in each digit, received logic levels are recorded on outputs of diagnosed digital block and compared to standard levels, and when error frequency Fc appears, voltage value Ethri is recorded (functioning threshold) for each device and its functioning area is calculated on basis of feeding voltage ΔEpi. Defective (potentially malfunctioning) device is detected on basis of lowest value in functioning area ΔEpi, which is selected on basis of comparison of functioning areas of all devices, included in diagnosed digital block.

EFFECT: higher precision, higher efficiency.

1 dwg

FIELD: computer science.

SUBSTANCE: in the method, called program prior to execution checks data, sent from calling program directly or indirectly.

EFFECT: higher efficiency.

2 cl, 3 dwg

FIELD: computer science.

SUBSTANCE: method includes protective mathematical conversion of service data of network frame prior to transfer to environment for transfer of a LAN. To said protective conversion the data is subjected, which is contained in headers of network frames of channel level, and also in headers of all encapsulated network packets and segments. As a result the very possibility of interception is prevented.

EFFECT: higher efficiency.

7 cl, 2 dwg

FIELD: computer science.

SUBSTANCE: signals from each two bits of code of inputted data are converted to 1 of 4 code, calculations in said code are performed in accordance to operation code, result signals in said code are recorded, recorded signals are inputted into code control device and in case of mismatch error signal is generated and processing result output is blocked.

EFFECT: higher trustworthiness.

1 dwg

FIELD: computers.

SUBSTANCE: method includes, on basis of contents of central processor registers, received after processor performs some sort of command, by means of mathematical logical operation, forming certain finite control sum and storing it in memory, and on basis of contents of registers, received before start of execution by said processor of directly next command, certain starting checksum is formed, while if starting checksum mismatches finite checksum, error message is generated, which can be followed by halting of processor operation or blocking of chip board with its removal from circulation.

EFFECT: higher reliability.

2 cl, 2 dwg

FIELD: computers.

SUBSTANCE: device has commutation block, checked microcontroller, block of read-only memory devices of checked microcontroller, block of operative memory devices, PC, controlling microcontroller, block 7 of serial interface, indication block, commutation block of serial interface, block for forming a signal of starting setting of block for forming ROM addresses, block for forming addresses of Rom of checked microcontroller, block for decoding control signals, data-reading block, RAM recording block, block of memory access constants for checked microcontroller, block for forming addresses of checked microcontroller, block for forming start setting signal for controlling microcontroller, RAM reading block, block for forming RAM addresses and power buses.

EFFECT: higher efficiency.

3 dwg

Up!