Method for filling pockets with material

FIELD: micro- and nanoelectronics, micro- and nanomechanics where insulated conductors are used.

SUBSTANCE: proposed method for filling pockets in solid body with conducting material includes coating of solid-body surface, bottom, and side walls of mentioned pockets with first layer that functions as barrier material preventing diffusion of mentioned conducting material in solid body; application of second layer onto first one that functions as wetting layer for conducting material; application of third layer by way of physical or chemical deposition onto third one from gas phase that has in its composition mentioned conducting material; coating of third layer with fourth one that also incorporates conducting material; melting of conducting material by heating and profile leveling; material melting by heating is conducted after applying third layer and fourth layer is applied by any method of physical deposition from gas phase, chemical deposition from gas phase, chemical deposition from solution, electrochemical deposition, or chemical-mechanical deposition.

EFFECT: facilitated procedure, enlarged functional capabilities.

12 cl, 17 dwg

 

Applications of the invention are micro - and nanoelectronics, micro - and nanomechanics, where are isolated by a dielectric conductors. In particular, the invention can be used for manufacturing a multi-tiered system of interconnection of silicon integrated circuit (IC).

The progressive technology of forming a multilevel system of interconnection of IP is a DAMASCENE technology [1, 2], which includes the formation of a dielectric layer of the recesses which are transition Windows and trenches, the deposition of diffusion barrier layer on a dielectric surface, bottom and side walls of Windows and trenches, filling boxes and trenches conductive material, a chemical-mechanical polishing to remove conductive material from the dielectric surface and planarization relief without affecting the conductive material in the transition boxes and trenches.

However, reducing the size of the elements and increase the aspect ratio (i.e. ratio of the depth of a window or trench width) that cause problems with homogeneous (without voids) filling a conductive material boxes and trenches.

Because of the lower rate of deposition of conductive material on the walls and bottom of the boxes and trenches than on the surface of the dielectric filling boxes and trenches by physical deposition from the gas the phase (PVD) having voids, that imposes a limitation on the use of PVD for this purpose. In this regard, the application was received by the methods of chemical and electrochemical deposition of conductive material from a solution. However, these methods require the presence of the seed layer. In the case of chemical deposition of this layer provides the required value of the electrochemical potential of the surface to a deposition process began. In the case of electrochemical deposition, it must be low impedance to ensure the homogeneity of the electrical power supply to the entire surface of the substrate. In addition, when reducing the width of the Windows and trenches problem besposchadnogo fill albeit later than in the case of PVD, but still occurs. This is because due to the small size of the solution in the window and a narrow trench is depleted of ions of a conductive material, resulting in a decrease in the deposition rate at the bottom and the side walls of these boxes and trenches relative to the speed of deposition on the dielectric surface.

At the present stage of development the trend towards miniaturization and expansion capabilities of different devices has given rise to the desire for complexity of integrated circuits, i.e. when a single crystal is performed as a managing digital part (CMOS), and power (bipolar). In this case, the problem of filling the recesses in Loznitsa, because you fill depressions of various sizes which are irregularly.

The closest technical solution of the present invention is a method of filling a conductive material irregularly spaced grooves having different sizes and different aspect ratio, in a solid [3], which includes the deposition on the surface of a solid body, bottom and side walls of these recesses of the first layer that is a barrier material to prevent diffusion of conductive material into a solid coating over the first layer of the second layer, which is wetting for the conductive material, the application of the method of physical (PVD) or chemical (CVD) deposition from the gas phase on top of the second layer, the third layer, which consists of conductive material, the coating on top of the third layer fourth layer, which also consists of a conductive material, melting conductive material by heating to fill these holes in a solid, planarization relief, which removes all the superimposed layers with a solid surface, without affecting the specified layers in the recesses of a rigid body.

One disadvantage of this method [3] is a large number of technological operations. Another disadvantage is that toparliament fourth layer is performed solely by chemical or electrochemical deposition from a solution, which limits the technological feasibility of the process of filling a conductive material in the recesses.

The purpose of the present invention is the simplification of filling a conductive material in the cavities in a solid and expanding the technological capabilities of a process for filling cavities in a solid conductive material, resulting in the possibility of using any of the known methods of deposition of conductive material.

To achieve the mentioned technical result in the method of filling irregularly arranged in a solid grooves having different sizes and relationships of depth to width, a conductive material, comprising coating the surface of a solid body, bottom and side walls of these recesses of the first layer that is a barrier material that prevents diffusion of the specified conductive material into a solid coating over the first layer of the second layer, which is wetting for the conductive material, the application of the method of physical or chemical deposition from the gas phase on top of the second layer, the third layer, which consists of a specified conductive material, the coating on top of the third layer fourth layer, which also consists of a conductive material, melting conductive material by N. grewe to fill these holes in a solid and planarization relief, which removes all the superimposed layers with a solid surface, without affecting the specified layers in the recesses of the solid, melting conductive material by heating to fill these recesses in the solid is carried out after deposition of the third layer.

Thus, the distinctive features of the invention is that the melting conductive material by heating to fill these recesses in the solid is carried out after deposition of the third layer.

This set of distinctive features allows to solve the problem and eliminate the disadvantages of the method [3], simplifying the technology of filling recesses in a solid and expanding the technological capabilities of the implementation process of filling holes in a solid conductive material.

The nature of the filling recesses in a solid as a result, the melting of the third layer is such that allows for the deposition of the fourth layer (i.e., for final disappointe these recesses) any of the known deposition methods. Thus, it is advisable not to limit the application of the fourth layer only by chemical and electrochemical deposition, but also to use the methods of PVD and CVD that, firstly, allows the use of similar equipment n the all stages of the formation of metallization, including auxiliary layers, and secondly, expanding the technological capabilities of the implementation process of filling these holes in a solid.

Thus, the hallmark of the invention is that the deposition of the fourth layer is carried out by any of the methods of physical vapor deposition (PVD), chemical vapor deposition (CVD), chemical vapor deposition from solutions, electrochemical deposition, chemical mechanical deposition.

After deposition of the fourth layer again to produce a melt with a view to further planarization of relief.

Thus, the hallmark of the invention is that after the deposition of the fourth layer again produce melting conductive material by heating.

Possible that the fourth layer is precipitated in several stages, producing a melt conductive layer after each stage of deposition. It is known [4, 5]that the melting temperature of thin films decreases with decrease of their thickness. When applying a fourth layer in several stages at each stage of the precipitates is smaller by the thickness of the quantity of conductive material, followed by melting at a temperature considerably lower than the melting temperature of the fourth layer applied in one step. Thus, the reduced temperature is tours the process of filling the recesses, what is important from the point of view of not exceeding thermal budget, achieved in the previous operations of the technological route.

Thus, the hallmark of the invention is that the fourth layer is precipitated in several stages, producing a melt conductive layer after each stage of deposition.

Appropriate application of the third and fourth layers, and the operation of melting to produce in a single vacuum cycle, in order to minimize the adsorption of impurities, particularly oxygen, which form refractory compounds with a conductive material, which negatively affects the process of filling the recesses.

Thus, the hallmark of the invention is that the application of the third and fourth layers and the melting operation are performed in the same vacuum cycle.

Preferably, the planarization operation is performed by the method of electrochemical polishing (eSMR) [6], which provides a uniform removal of conductive material from a solid surface without depressions filled in the recesses. These depressions occur when using the conventional process of chemical-mechanical polishing, since the conductive material is softer than the material of the solid body, which is made deeper, and easier removed by the abrasive.

Thus, the hallmark of the invention is that the planarization operation is performed by the method of electrochemical mechanical polishing (eSMR).

It is also suitable planarization operation is performed by the method of free abrasive polishing (AFP) [7], which selectively relative to underlying layers removes the material of the third and fourth layers from the surface of a solid body, but not removed from the recesses, and then with a solid surface by dry etching selectively with respect to the surface of a solid body and in relation to the conducting material of the third and fourth layer remaining in the recesses, deleted the second and first layers. This method also provides high-quality planarization surface without the formation of cavities filled in the recesses.

Thus, the hallmark of the invention is that the planarization operation is performed by the method of free abrasive polishing (AFP), which selectively relative to underlying layers removes the material of the third and fourth layers from the surface of a solid body, but not removed from the recesses, and then with a solid surface by dry etching selectively with respect to the surface of a solid body and towards conducting material Proc. of the third and fourth layers, remaining in the cavities, removes the second and first layers.

In the case of use for the deposition of the fourth layer of the method of chemical deposition from solution it is after melting of the third layer to produce a planarization operation, which removes deposited layers with a solid surface, without affecting the precipitated material in the recesses, and further to perform the operation of deposition of the fourth layer, which will occur locally, i.e. only in the hollows, where he remained conductive material after the planarization operation.

Thus, the hallmark of the invention is that after melting to produce a planarization operation, removing the deposited layers from the surface of a solid body, then in these depressions locally precipitated fourth layer.

Appropriate local deposition of the fourth layer to be implemented in a chemical-mechanical polishing. In this case, the suspension for HMP contains components for chemical vapor deposition of a conductive material. When using this method, i.e. a method of chemical-mechanical polishing-deposition (CMPD), the stage shown Fig, is excluded.

Thus, the hallmark of the invention is the fact that the local deposition of the fourth layer is performed by the method of chemical-mechanical is aerovane-deposition (CMPD).

Preferably, the material of the conductive layer was material on the basis of one of a number of: aluminum, copper, silver, gold. A distinctive feature of these elements is the low specific resistance, which is important to create interconnects.

Thus, the hallmark of the invention is that the conductive material layer is a material based on one of a number of: aluminum, copper, silver, gold.

With the aim of expanding the use of the proposed method possible material of the body in which you have cavities, is an insulator, conductor, semiconductor.

Thus, the hallmark of the invention is that the material of the body in which you have cavities, is an insulator, conductor, semiconductor.

It is desirable as a material of the first layer, which is a diffusion-barrier, to use an amorphous alloy W-Ta-N. it is Known that neither tungsten nor tantalum do not interact with copper [8]. In [9, 10] it is shown that the film alloy W-Ta-N, formed by the PVD method is amorphous and in the structure of Cu/Ta-W-N/Si retains its properties at least at 700°and in the structure of Cu/Ta-W-N/TiSi2/Si up to 800°C.

Thus, the hallmark of the invention is that the material of the first layer, which is diffusion-b is remem, amorphous alloy W-Ta-N.

Suitable as the material of the wetting layer to use titanium. Good wetting to expect when conductive material capable of forming with a wetting layer of chemical compounds. Titanium forms with copper intermetallic compounds [8].

Thus, the hallmark of the invention is that the material of the second layer, which is wetting is titanium.

On Fig-1.5 shows the stages of the method of filling, made in accordance with the prototype.

On Fig presents the section of the structure after formation in a solid grooves 1 and consistent coating on the surface of a solid body, bottom and side walls of these recesses of the first layer 2, which is a barrier material to prevent diffusion of conductive material into a solid body, the second layer 3, which is wetting for the specified conductive material using PVD or CVD third layer 4, which is bare and consists of a specified conductive material.

On Fig presents incision patterns after forming over the third layer 4 by a method of chemical or electrochemical deposition from a solution of the fourth layer 5, which also consists of the specified conductive material.

On Fig presents incision patterns after opleve the Oia fourth layer 5 by heating, in the resulting conductive material partially fills the cavities in the solid.

On Fig presents incision patterns after dosagee fourth layer 5 of conductive material using chemical or electrochemical deposition from a solution to fill the recesses in the solid.

On Fig presents incision patterns after surgery planarization method of chemical mechanical polishing, which results in the destruction of the fourth layer 5, the third layer 4, the second layer 3, the first layer 2 with a solid surface, without affecting the specified layers in the recesses of a rigid body.

On Fig-2.4 shows the stages of the proposed method of filling recesses in a solid.

On Fig presents the section of the structure after formation in a solid grooves 1 and consistent coating on the surface of a solid body, bottom and side walls of these recesses of the first layer 2, which is a barrier material to prevent diffusion of conductive material into a solid body, the second layer 3, which is wetting for the specified conductive material, the third layer 4, which consists of a specified conductive material using PVD or CVD.

On Fig presents the section of the structure after reflow of the third layer 4 by heating, resulting in Provo is ashy material partially fills the cavities in the solid.

On Fig presents incision patterns after forming over the third layer 4 layer 5, which also consists of the specified conductive material, any of the known methods of deposition of conductive material, including PVD, CVD, chemical and electrochemical deposition from a solution.

On Fig presents incision patterns after surgery planarization, resulting in the destruction of the fourth layer 5, the third layer 4, the second layer 3, the first layer 2 with a solid surface, without affecting the specified layers in the recesses of a rigid body.

On Fig-3.5 shows the stages of a variant of the proposed method of filling recesses in a solid, when planarization relief produced after melting of the third layer and the fourth layer deposition carried out locally by chemical deposition from a solution.

On Fig presents the section of the structure after formation in a solid grooves 1 and consistent coating on the surface of a solid body, bottom and side walls of these recesses of the first layer 2, which is a barrier material that prevents diffusion of the specified conductive material in solid, over a specified first layer second layer 3, which is wetting for the specified conductive material, over a specified second layer third sloa, which consists of a specified conductive material using PVD or CVD.

On Fig presents the section of the structure after reflow of the third layer 4 by heating, resulting in a conductive material partially fills the cavities in the solid.

On Fig presents incision patterns after surgery, chemical mechanical polishing, which results in the removal of the third layer 4, the second layer 3, the first layer 2 with a solid surface, without affecting the specified layers in the recesses of a rigid body.

On Fig presents incision patterns after local disappointe holes in a solid fourth layer 5, which consists of a specified conductive material by chemical vapor deposition from a solution.

On Fig presents the section of the structure after planarization, resulting in the destruction of surplus fourth layer 5 with a solid surface, without removing conductive material from the recesses in the solid.

4 shows a micrograph of the chip structure after deposition of the third layer by the PVD method.

Fig-5.2 show microphotographs of sections of the chip patterns with different sizes of the recesses after the stage of melting of the third layer.

Conducted patent studies have shown that the set of features offered what about the invention is new, that proves the novelty of the method of filling recesses conductive material. In addition, patent research showed that in the literature there are no data affecting the distinguishing features of the claimed invention to achieve a technical result, which confirms the inventive step of the proposed method.

Example 1. In the insulating layer of SiO2the silicon structure in which the semiconductor devices, using the processes of photolithography and chemical etching was formed contact (transitional) open depth of 3 μm and a width of from 0.5 μm to 5 μm. Later in the same insulating layer through the processes of photolithography and chemical etching was formed grooves for future guides, interconnects depth of 1 μm and a width of from 0.5 μm to 5 μm. Then on the structure in one vacuum process consistently applied by magnetron sputtering the first layer with a thickness of 30 nm, consisting of amorphous alloy W-Ta-N, which is a diffusion-barrier material for silicon, the insulating layer and the conductive material of the interconnect, the second layer 20 nm thick, consisting of titanium, which is wetting for the conductive material of the interconnect, and a third layer of a thickness of 75 nm, consisting of copper, which is used as a conductive material is of isoamylene. After this was done, the operation of filling the recesses (contact (transient) Windows and grooves) by melting, for which the structure was subjected to heat treatment in vacuum at a temperature of 850°within 10 minutes the Next step again by magnetron sputtering on the structure was put forth layer thickness of 500 nm, composed of copper. Next, the operation was performed planarization of the surface structure, for which a method of chemical mechanical polishing from the surface was removed all the layers up to the insulating layer, leaving, therefore, applied materials only in the recesses.

Example 2. In the insulating layer silicon structure in which the semiconductor devices, using the processes of photolithography and chemical etching was formed contact (transitional) open depth of 3 μm and a width of from 0.5 μm to 5 μm. Later in the same insulating layer through the processes of photolithography and chemical etching was formed grooves for future guides, interconnects depth of 1 μm and a width of from 0.5 μm to 5 μm. Then on the structure in one vacuum process consistently applied by magnetron sputtering the first layer with a thickness of 30 nm, consisting of amorphous alloy W-Ta-N, which is a diffusion-barrier material for silicon, the insulating layer and navigating the th material interconnects, the second layer 20 nm thick, consisting of titanium, which is wetting for the conductive material of the interconnect, and the third layer with a thickness of 30 nm, consisting of copper, which is used as a conductive material interconnects. After this was done, the operation of filling the recesses (contact (transient) Windows and grooves) by melting, for which the structure was subjected to heat treatment in vacuum at a temperature of 760°C for 10 minutes In the next step, the operation was performed planarization of the surface structure, which method of chemical-mechanical polishing-deposition from the surface was removed all the layers up to the insulating layer and the deposition of conductive material occurred locally, only deepening.

The proposed method of filling recesses conductive material, taking into account the distinctive features of an industrial implement due to the fact that the necessary operations can be performed on standard equipment using known materials. The inventive method is useful for the fabrication of multilevel metallization with the design standards in the deep submicron range.

Sources of information

1. Helneder H., Komer H., Mitchell, A., M. Schwerd, U. Seidel Comparison of copper damascene and aluminum RIE metallization in BICMOS technology // Microelectronic Engineering, v.55, 2001, p.257-268.

2. Steinlesberger G.,Engelhardt M., Schindler G., J. Kretz, Steinhogl W., Bertagnolly E. Processing technology for the investigation of sub-50 nm copper damascene interconnects // Solid-State Electronics, v.47, 2003, p.1237-1241.

3. U.S. patent No. 6077780 prototype.

4. Komnik Û.F. Physics of metal films. Dimensional and structural effects. - M.: Atomizdat, 1979. - 264 C.

5. Gusev A.I., Rempel A.A. Nanocrystalline materials. - M.: Fizmatlit, 2001. - 224 S.

6. Stickney C., Nguyen C., Basol Century, C. Uzoh, Talieh H. Topography reduction for copper damascene interconnects // Solid State Technology, No. 8, 2003, p.49-54.

7. Kondo, S., Sakuma, N., Homma Y., Goto Y., Ohashi N., Yama guchi H., N. Owada Abrasive-free polishing for copper damascene interconnection // J.Electrochem. Soc., v.147, No. 10, 2000, R-3913.

8. Hansen M. Patterns of double alloys. Reference: 2 tons / Mhansen, Kandenko. - M., 1962. - 1488 S.

9. Gromov became popular, Evdokimov, V.L., Klimovitsky A.G., Lishmanov ACTING, Mochalov A.I., Suliman ROAD Materials for the metallization of silicon VLSI // Electronic industry. - 2002. No. 1. - P.60-66.

10. Klimovitsky A.G., Mochalov A.I., Gromov became popular, Leonova E.V., Mochalov Z.A. Study the barrier properties of the alloy Ta-W-N in the composition of the multilayer metallization system IP // Izvestiya vuzov, electronics, No. 5, 2003, page 3-8

1. The method of filling recesses in a solid conductive material, comprising coating the surface of a solid body, bottom and side walls of these recesses of the first layer that is a barrier material to prevent diffusion of conductive material into a solid coating on the above the first layer of the second layer, which is wetting for the conductive material, the application of the method of physical or chemical deposition from the gas phase on top of the second layer, the third layer, which consists of a specified conductive material, the coating on top of the third layer fourth layer, which also consists of a conductive material, melting conductive material by heating, planarization relief, characterized in that the melting conductive material by heating is carried out after deposition of the third layer, and applying a fourth layer perform any of the methods of physical vapor deposition (PVD), chemical vapor deposition (CVD), chemical vapor deposition from solutions, electrochemical deposition the chemical-mechanical deposition.

2. The method according to claim 1, characterized in that after deposition of the fourth layer again produce melting conductive material by heating.

3. The method according to claim 1, characterized in that the fourth layer is precipitated in several stages, producing a melt conductive layer after each stage of deposition.

4. The method according to claims 1 and 3, characterized in that the application of the third and fourth layers and the operation of melting produced in a single vacuum cycle.

5. The method according to claim 1, characterized in that the operation to perform planarization, electrochemical mechanical polishing (EU is R).

6. The method according to claim 1, characterized in that the planarization operation is performed by the method of free abrasive polishing (AFP), which selectively relative to underlying layers removes the material of the third and fourth layers from the surface of a solid body, but not removed from the recesses, and then with a solid surface by dry etching selectively with respect to the surface of a solid body and in relation to the conducting material of the third and fourth layer remaining in the recesses, deleted the second and first layers.

7. The method according to claim 1, characterized in that after the melting of the third layer to produce a planarization operation, removing the deposited layers from the surface of a solid body, then in these depressions locally precipitated fourth layer.

8. The method according to claim 1, characterized in that after the melting of the third layer, the operation is carried out by chemical-mechanical polishing-deposition (CMPD), in which the local deposition of the fourth layer in the recess in a solid with simultaneous planarization relief.

9. The method according to claim 1, characterized in that the material of the conducting layer is a material based on one of a number of: aluminum, copper, silver, gold.

10. The method according to claim 1, characterized in that the material of the body in which you have cavities, is on the electrician, a conductor, semiconductor.

11. The method according to claim 1, characterized in that the material of the first layer, which is a diffusion-barrier is an amorphous alloy W-Ta-N.

12. The method according to claim 1, characterized in that the material of the second layer, which is wetting is titanium.



 

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EFFECT: facilitated procedure, enlarged functional capabilities.

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