# Device for scaling number in modular scale of notation

FIELD: computers.

SUBSTANCE: device has N blocks for calculating remainders, each of which has N devices for calculating remainders from bases of modular notation scale, including multiplication blocks, module adders of 3N numbers and tabular calculators.

EFFECT: higher speed of operation.

5 dwg, 1 ex

The invention relates to computer science, designed to scale the works of integers, represented in modular code, and can be used in digital computing devices.

A device (analogue) (ed. St. USSR №A, MKI G 06 F 7/72, B. I. No. 28, 1991), containing a block of delay elements, the computing unit interval index number, delay element, the first and second shift registers, the register modular code number, the register interval index, the first and second blocks of multiplexers, the first and second storage units, constants, control unit, first and second blocks of elements OR.

The disadvantage of this device is low speed.

The closest in technical essence (the prototype of the present invention is a device (ed. St. USSR №1140114, MKI G 06 F 7/ 72, B. I. No. 6, 1985)containing the input and output register storage units constants units summation deductions for auxiliary module, a delay element, an additional unit summation, two groups of auxiliary registers, a comparison circuit, a reversible counter and adders correction.

The disadvantage of the prototype low speed operation zoom in modular number system (MSS) due to the large number of cycles, during which national who is this operation and end time of the switching semiconductor logic gates that form the basis of the prototype.

The task, which directed the inventive device is to improve the performance of advanced models of computer technology.

The technical result is expressed in performance (reduction of the time cost of performing a scaling operation in modular number system.

The technical result is achieved that the device containing the input register N inputs of the first and N second inputs of the operands are the inputs of the device (N is the number of bases MCC), is entered N of blocks calculation of residues, the outputs of which are the outputs of the device, and the i-th output of the k-th operandthe input register is connected to the i-th inputs of the k-th operand blocks calculation of residues, while the n-th computing unit balancecontains N devices calculation of the remaining n-th base and adder 3N integers modulo m_{n}(m_{n}- the n-th basis MSS,), and the j-th device computing the remainder n-th base (j≠ n) contains five tabular calculators, while the n-th input of the first operand is connected to the first input of the first and second tabular calculate the her
and n-th input of the second operand from the first input of the third and fourth table of the transmitter, the j-th input of the first operand to the second input of the first table of the transmitter and the first input of the fifth table of the transmitter, the j-th input of the second operand to the second input of the second and third table of the transmitter, the outputs of the first and third tabular calculators connected respectively to the second inputs of the fourth and fifth tabular calculators, fourth tabular calculator is the first output of the j-th device computing the remainder n-th basis, the output of the second tabular calculator - second output of the j-th device calculation of residue on the n-th ground, and the output of the fifth table calculator - the third output of the j-th device computing the remainder n-th ground, with the n-th device computing the remainder n-th base contains three computational block and two block multiplication, and the i-th inputsthe first and second operands respectively connected to the i-th inputsthe first and second computing unit, the outputs of which are connected respectively to the first inputs of the first and second multiplier units, to the second inputs of which are connected to n-th inputs of the second and first operands, respectively, and to the inputs of the third computing b is the eye connected n-th inputs of the first and second operands,
moreover, the outputs of the first and second multiplier units and the output of the third computing unit are respectively the first, second and third output of the n-th device computing the remainder n-th ground, with the outputs of the devices calculate the residues are connected to the inputs of adder 3N integers modulo m_{n}whose output is the output of the n-th computing unit balance.

The invention consists in obtaining a residue compositions of an integer and a rational number b, represented as the fractionwhere In is an integer.

It is assumed that the numbers a and b presents the modular codes: A=(α_{1}that α_{2},... , α_{N}), In=(β_{1}that β_{2},... , β_{n}); α_{i}=A mod m_{i}; β_{i}=Mod m_{i}; m_{i}- a set of relatively Prime integers;M - range of number representation in the MSS

The basis of operation of the proposed device is based on the following principles. Based on theorem of arithmetic product of relatively Prime integers [1, s] the product of an arbitrary integer And an arbitrary rational numbercan be represented as the sum of

in which integers d_{j
defined as the solution of the equation:}

In MCC all variables and the results of arithmetic operations must be integer [1, p.12]. Therefore, the result of scaling (1) you must cast to an integer by rounding the quotient. To this end, imagine the amount of (1) in the following equivalent form:

Note that the expression under the sign of the first sum in the right part of formula (2) always lead to integers. Then the rounded value of the quotient (1) can be computed using the approximate relation:

wherethe symbol of rounding to the nearest integer.

Numerical calculation (3) for 0≤ And<M and 0≤<M shows that in 67% of cases it turns out the exact result, while 33% is different on ± 1. It is not worse than in similar arithmetic devices operating in positional notation.

From the expression (3) shows that for finding modular code privateyou must calculate the remains of its constituent components on the grounds

where

R_{nj}is determined from the solutions of comparison (R_{
nj}·_{}m_{j})mod m_{n≡}1.

For finding residues γ_{n,n}and δ_{n,n}can be applied the approach outlined in [2, p.8-9].

Under this approach, take into account that for 0≤ And<M and 0≤<M always fair inequality:

Since the only condition for the choice MCC is mutual simplicity of its bases [1, s], the numbering of these grounds can be arbitrary. Accordingly, when determining residues privateandFoundationcan be numbered within so that the base m_{n}corresponded to the number N in the new system:Then in the article code privateandsenior category code will be zero, and the remnants of the γ_{n,n}and δ_{n,n}can be calculated by the formulas [2, p.8]:

where a_{r}and b_{r}- r digit article code privateanddetermined in accordance with [3, p.21-22] expressions:

Hereis solution of the comparison

Thus, the algorithm for calculating the modular code privateis to obtain for all nresiduesby the formula (4).

To calculate these residuals are calculated 3N values of q_{n,j}that γ_{n,j}and δ_{n,j}by the formulas (5), (6) and (8)which are then added modulo m_{n}.

Values γ_{n,j}and δ_{n,j}(nn≠ j), and q_{n,j}can be defined in tabular calculators, such as those described in [3, p.16-17]. Such tabular calculator containing m_{n}·_{}m_{j}two elements "And"represents a matrix decoder, the input of which receives two operands in a unitary code. Elements And are located at the intersections of the data bus of the operands in a unitary code corresponding to the double operation (5) or (6), and the outputs of the elements And are combined in the respective items "OR"equal in number to the m_{n}. Because the logical signal in such a tabular calculator is distributed across the two logic element,
the calculation of q_{n,j}that γ_{n,j}and δ_{n,j}will be equal to

where τ_{PE}the time delay in the logic element.

For the addition of 3N integers modulo m_{n}can be applied to the adder described in [patent RF №2188448, IPC G 06 F 7/72, B. I. No. 24, 2002], which contains managed phasers, the harmonic signal generator, phasers at a fixed value of the phase and measuring the phase of the harmonic signal. The time of addition of 3N numbers in this adder is equal to

At the conclusion of the formula (11) believed that the oscillator frequency of the harmonic signal is equal to 100 GHz, and the decision about the value of modular operation -10^{-10}C.

To obtain discharges article code a_{r}and b_{r}(9) can be applied to a device for converting numbers from the code system of residual classes in the article code described in [patent RF №2187886, IPC H 03 M 7/18, B. I. No. 23, 2002], which contains the input registers, the harmonic signal generator, controlled phasers and a measure of the phase of the harmonic signal. Obtaining discharges article code in such a Converter will be equal to

At the conclusion of the formula (12) we assumed that the frequency of the harmonic signal generator 100 is Hz,
the decision about the value of modular operation -10^{-10}and time switching managed phasers -10^{-11}c.

Obtaining residues γ_{n,n}and γ_{n,n}can be implemented in a computing unit that contains a grid solvers values γ_{n,j}and δ_{n,j}(nn≠ (j) (6), a device for converting numbers from the code system of residual classes in the article code, a display device performing a unary transformationand the adder N-1 integers modulo m_{n}. Structural diagram of such a computing unit is provided in [2, p.8 1]. Obtained in [2, S. 10] to estimate the time of balances γ_{n,n}and δ_{n,n}is 3· 10^{-9}C.

Compare the performance of the prototype and the proposed device

In the prototype, the time of receipt of the scale is equal to

where is ][ the symbol of rounding in a big way; t_{MT}- the duration of the modular quantum devices.

When assessing the values of t_{MT}take into account that the main functional elements of the prototype (registers, adders, counters, etc. contain from 10 to 50 or more logical elements. Accordingly, the delay time of the logic signal in these functional ele the customers can reach more than 50τ
_{PE}. Since t_{MT}may not be less than the largest delay time of the logic signal to the functional elements of the prototype, then take

t_{MT≈}50τ_{PE}.

Then

We assume that the minimum delay time in the logic element is τ_{LAYE≈}10^{-10}from [4, s].

In the proposed device the calculation time T_{PU}the remainder of the rounding privateon the basis of m_{n}consists of time determination of residues γ_{n,n}(δ_{n,n})-3· 10^{-9}with time balances γ_{n,j}that δ_{n,j}and q_{n,j}with time and summation 3N numbers - τ_{3N}={(3N+3)· 10^{-11}+10^{-10}}, C.

For example, when N=6 we get

T_{CR}=50· 10^{-10}·^{}(3+3)=30· 10^{-9}C=30 NS;

T_{PU}=3· 10^{-9}+2· 10^{-10}+(18+3)· 10^{-11}+10^{-10≈}the 3.5 NS.

The structural scheme of the device for scaling the numbers in modular number system is presented in figure 1.

In this scheme I 1.1-I 1.N and 2.1 I-I 2.N (N is the number of bases MCC) inputs of the first (a) and second (B) operands, respectively, 1 - input register, 2.1-2.N - units calculating residues, 3.13.N - the outputs of the device.

The input operands a and b are connected to information inputs I 1.1-I 1.N and 2.1 I-I 2.N input register 1, respectively. Outputs Output 1.1-1.N O and O 2.1-2.N O input register 1 is connected to the inputs I 1.1-I 1.N and 2.1 I-I 2.N blocks calculate the residues 2.1-2.N, the outputs are connected to respective outputs of the device 3.1-3.N.

Implementation of the main components for scaling the numbers in modular number system is shown in figure 2-5.

Figure 2 presents the structural diagram of the n-th computing unit balance 2.n,where I 1.1-I 1.N and 2.1 I-I 2.N - inputs of the computing unit balance, 4.1.n-4.N.n - device computing the remainder of the n-th base, 5 - adder 3N integers modulo m_{n}, 3.n output of the n-th computing unit balance.

3 shows the structural diagram of the j-th device computing the remainder n-th basewhere I 1.n, I 2.n, I 1.j and I 2.j - input device, 8.1-8.5 - tabular calculators, O 1-O 3 - outputs of the device computing the remainder of the n-th base.

4 shows the structural diagram of the n-th device computing the remainder n-th base, where I 1.1-I 1.N and 2.1 I-I 2.N-input device, 6.1-6.3 - computing units, 7.1-7.2 - blocks multiplication, O 1-O 3 - outputs the n-th device computing the remainder n-th base.

Figure 5 presents the Jena structural diagram of the computing unit 6.1 (6.2).
In this scheme I 1.1-I 1.N and 2.1 I-I 2.N - inputs of the computing unit, 9.1-9.(N-1) - tabular calculators, 10 - a device for converting numbers from the code system of residual classes in the article code, 11.1-11.(N-1) - display device, 12 - adder (N-1) of integers modulo m_{n}.

Consider the operation of the device.

Residues (α_{1}that α_{2},... ,α_{N}) operand a and residues (β_{1}that β_{2},... ,β_{N}) operand In the MCC serves for informational inputs I 1.1-I 1.N and 2.1 I-I 2.N, respectively, and are written in the input register 1. Outputs Output 1.1-1.N O and O 2.1-2.N O input register remains α_{j}and β_{j}in unitary code received on the corresponding input blocks calculate the residues 2.1.-2.N.

In the j-th unit calculating a residue on the n-th basis 4.j.nbalance α_{j}(from input I 1.j) comes on I 1 table calculator 8.5 and I 2 table calculator 8.1, balance α_{n}(from input I 1.n) - I 1 tabular calculators 8.1 and 8.2, balance β_{j}(from input I 2.j) - I 2 tabular calculators 8.2 and 8.3, and balance β_{n}(from input I 2.n) - I 1 tabular calculators 8.3 and 8.4.

In tabular calculators 8.1 and 8.3 by the formula (6), respectively, are calculated residues γ_{n,j}and δ_{n,j}and tablin the m transmitter 8.2 by the formula (5) calculates the remainder of q_{
n,j}which goes to O 2 of the device computing the remainder 4.j.n.

Then in tabular calculators 8.4 and 8.5, respectively, are calculated components of the formula (4): (d_{j}·_{}γ_{n,j}·_{}β_{n})mod m_{n}and (d_{j}·_{}δ_{n,j}·_{}α_{j})mod m_{n}who is coming to the O 1 and O 3 device computing the remainder 4.j.n.

In the n-th device computing the remainder n-th basis 4.n.nthe remnants of the α_{i}(with inputs I 1.i) come on I 1.i computing unit 6.1, residues β_{i}(with inputs I 2.i) come on I 2.i computing unit 6.2, and the remnants of the α_{n}and β_{n}(with inputs I 1.n and I 2.n) - I 1.n and I 2.n computing unit 6.3. In the computing unit 6.3 by the formula (5) is calculated as the remainder of q_{n,n}that goes to the Output 3 of the device computing the remainder 4.n.n.

In the computing unit 6.1 remnants α_{i}(i≠ n) with inputs I 1.i come on I 2 tabular calculators 9.1 (when i<n) and 9.(i-1) (when i>n), and for I 1 these tabular calculators arrives balance α_{n}from input I 1.n computing unit.

Given that the computing unit 6.1 the Foundation of the m_{k}renumbered with edusim follows:
in tabular calculators 9.1-9.(N-1) are calculated remainswhere is the restequal balance α_{i}in the original basis, the number of which - i corresponds to the number z in the new system bases.

With outputs tabular calculators 9.1-9.(N-1) remainsgo on an input device for converting numbers from the code system of residual classes in the article code - 10, where by the formula (9) are calculated discharges a_{r}article code. These bits with O 1-O (N-1) of the NAT device 10 are received at the inputs of the display devices 11.1-11.(N-1), where, respectively, are unary conversionsand in the adder (N-1) of integers modulo m_{n}12 in accordance with the formula (8) is obtained residue γ_{n,n}.

Similarly when replacing α_{i}on β_{i}in the computing unit 6.2 calculated balance δ_{n,n}.

From the outputs of the adders 12 compute units 6.1 and 6.2 residues γ_{n,n}and δ_{n,n}come on I 1 (7.7) and second (7.2) blocks the multiplication by I 2 which act upon the remnants of the β_{n}(from input I 2.n) and α_{n}(from input I 1.n). In the blocks to multiply the Oia 7.1 and 7.2 respectively obtained the components of the formula (4): (d_{
n}·_{}γ_{n,n}·_{}β_{n})mod m_{n}and (d_{n}·_{}δ_{n,n}·_{}α_{n})mod m_{n}who is coming to the O 1 and O 2 of the device computing the remainder 4.n.n.

Data O 1-O 3 j-th element of the device computing the remainder n-th basis 4.j.nproceed accordingly I 1.j-I 3.j adder 3N integers modulo m_{n}where in the formula (4) calculates the remainder of the zoomwhich is output 3.n device for scaling the numbers in MSS.

Example: Let set the Foundation of the modular number systems: m_{1}=3, m_{2}=5, m_{3}=7, m_{4}=11 (N=4), where a=100 and B=578 codes presents: =(1, 0, 2, 1); In=(2, 3, 4, 6). The range of digits in such MSS:while the coefficients in the formula (4) take the following values: d_{1}=1, d_{2}=-4, d_{3}=2, d_{4}=2. You want to find the modular code of the scale private

Consider the work of the proposed device for the above source data.

Codes operand And=(1, 0, 2, 1) and operand In=(2, 3, 4, 6) go to corresponding inputs of the I 1.1-1.4 and I I 2.1-2.4 I input register 1. Outputs Output 1.1-O 1.4 and O 2.1-O 2.4 input register 1 operands a and b arrive at according to the respective inputs I 1.1-1.4 and I I 2.1-I 2.4 blocks calculate the residues 2.1-2.4.

We illustrate the order of evaluation of the balance of the scale on the example of calculation of balance under the first base (m_{1}=3) in the computing unit balance 2.1.

Codes of operands a and b to the inputs of the I 1.1-1.4 and I I 2.1-I 2.4 computing unit balance 2.1 act respectively to the inputs I 1.1-1.4 and I I 2.1-2.4 I-device computing the remainder 4.1.1. At the same time balances α_{1}(from input I 1.1) and β_{1}(from input I 2.1) served on 1.1 and I I 2.1 device computing the remainder 4.2.1-4.4.1. On I 1.j and I 2.j device computing the remainder 4.j.1act accordingly remains α_{j}and β_{j}. In tabular calculators 8.2 device computing the remainder 4.2.1-4.4.1 by the formula (5) are calculated remains

These balances come on O 2 device computing the remainder 4.2.1-4.4.1.

At the same time in a grid solvers 8.1 and 8.3 of the device computing the remainder 4.2.1-4.4.1 by the formula (6) are determined by the remnants of the γ_{1,j}and δ_{1,j}

γ_{12}=(R_{12}·_{}(α_{1}-α_{2}))mod m_{1}=(2· (1-0))mod 3=2;

γ_{13}=(R_{13}·_{}(α_{1}-α_{3}))mod m_{1}=(1· (1-2))mod 3=2;

γ_{14}=(R_{14}·_{}(α_{1
-α4))mod m1=(2· (1-1))mod 3=0;}

δ_{12}=(R_{12}·_{}(β_{1}-β_{2}))mod m_{1}=(2· (2-3))mod 3=1;

δ_{13}=(R_{13}·_{}(β_{1}-β_{3}))mod m_{1}=(1· (2-4))mod 3=1;

δ_{14}=(r_{14}·_{}(β_{1}-β_{4}))mod m_{1}=(2· (2-6))mod 3=1,

where R_{12}=R_{14}=2; R_{13}=1.

Then in tabular calculators 8.4 and 8.5 of the device computing the remainder 4.2.1-4.4.1 calculated remnants of the summands in the formula (4) (d_{j}·_{}γ_{1,j}·_{}β_{1})mod m_{1}and (d_{j}·_{}δ_{1,j}·_{}α_{j})mod m_{1}

(d_{2}·_{}γ_{1,2}·_{}β_{1})mod m_{1}=((-4)· 2· 2)mod 3=2;

(d_{3}·_{}γ_{1,3}·_{}β_{1})mod m_{1}=(2· 2· 2)mod 3=2;

(d_{4}·_{}γ_{1,4}·_{}β_{1})mod m_{1}=(2· 0· 2)mod 3=0;

(d_{2}·_{}δ_{1,2}·_{}α_{2})mod m_{1}=((-4)· 1· 0)mod 3=0;

(d_{3}·_{}δ_{1,3}· α_{3})mod m_{1}=(2· 1· 2)mod 3=1;

(d_{4}·_{}δ_{1,4}·_{}α_{4})mod m_{1}=(2· 1· 1)mod 3=2.

Next residue (d_{j}·_{}γ_{1,j}·_{}β_{1}) mod m_{1}will occupait on O 1,
and the rest (d_{j}·_{}δ_{1,j}·_{}α_{j})mod m_{1}- O 3 device computing the remainder 4.j.1.

In the device computing the remainder 4.1.1 remains α_{i}(with inputs I 1.i) come on I 1.i computing unit 6.1, residues β_{i}(with inputs I 2.i) come on I 2.i computing unit 6.2, and the remnants of the α_{1}and β_{1}(with inputs I 1.1 and 2.1 I) - I 1.1 and I 2.1 computing unit 6.3. In the computing unit 6.3 by the formula (5) is calculated balance

which goes to O 3 device computing the remainder 4.1.1.

In the computing unit 6.1 remnants α_{i}with inputs I 1.i come on I 2 tabular calculators 9.i and I 1 these tabular calculators arrives balance α_{1}from input I 1.1 computational block.

In the computational box 6.1 the Foundation of the m_{k}renumbered as follows:Accordingly, in tabular calculators 9.1-9.3 are calculated remainswhere, as noted above, the balanceequal balance α_{i}in the original basis, the number of which - i ratio is esthet number z in the new system grounds
and oddstake the following values:

With outputs tabular calculators 9.1-9.3 remainsgo on an input device for converting numbers from the code system of residual classes in the article code - 10, where by the formula (9) are computed discharges and_{r}article code:

These bits with O 1-O 3 conversion device 10 are received at the inputs of the display devices 11.1-11.3, where, respectively, are unary conversions

Converted in accordance with the formula (8) are added together in the adder 12 three numbers modulo 3, where it turns out the rest γ_{1,1}=0, which comes on I 1 unit multiplying 7.1, and for I 2 of block multiplication is balance β_{1}(from input I 2.1). In block multiplication 7.1 calculated item formula (4): (d_{1}·_{}³
_{1,1}·_{}β_{1})mod m_{1}=(1· 0· 2)mod 3=0, which is supplied to the Output 1 of the device computing the remainder 4.1.1.

In a similar way when replacing α_{i}on β_{i}in the computing unit 6.2 calculated balance δ_{1,1}:

b_{1}→_{}2; b_{2}→_{}0; b_{3}→_{}1; δ_{1,1}=0;

(d_{1}·_{}δ_{1,1}·_{}α_{1})modm_{1}=(1· 0· 1)mod3=0.

The calculated value (d_{1}·_{}δ_{1,1}·_{}α_{1})mod m_{1}served on O 2 of the device computing the remainder 4.1.1.

And, finally, the data obtained with O 1-O 3 devices calculate residues 4.j.nproceed accordingly I 1.j-I 3.j adder twelve numbers modulo 3, where by the formula (4) calculates the remainder of the zoom

μ_{1}=(0+2+2+0+0+0+1+2+1+0+2+1)mod 3=2,

which is output 3.1 device for scaling the numbers in MSS.

In a similar way in blocks calculate the balance 2.2 - 2.4 are calculated values μ_{2
=0; μ3=1; μ4=6.}

Thus, the modular code of the scale hasthat corresponds to the number 50 in the positional code.

Check:

SOURCES of INFORMATION

1. Akutski IA, yuditsky DI Machine arithmetic in residual classes. - M.: Owls. radio, 1968. - 440 S.

2. Ovcharenko L.A., Lopatin D.S. Division number in modular code for the radix.// Telecommunications, 2002, No. 6, p.7-10.

3. Dolgov A.I. Diagnostics devices operating in the system of residual classes. - M.: Radio and communication, 1982, 64 S.

4. Akaev A.A., Maiorov S.A. Optical methods of information processing. - M.: Higher. HQ., 1988. - 273 C.

Device for scaling the numbers in modular number system (MSS), which contains the input register N inputs of the first and N second inputs of the operands are the inputs of the device (N is the number of bases MCC), characterized in that it introduced N units of residue calculation, the outputs of which are the outputs of the device, and the i-th output of the k-th operand (the input register is connected to the i-th inputs of the k-x operands blocks calculation of residues, while the n-th computing unit balancecontains N devices calculate residue on the n-th basis and shall amator 3N integers modulo m_{
n}(m_{n}- the n-th basis MSS,), and the j-th unit calculating a residue on the n-th base (j≠ n) contains five tabular calculators, and the first and third tabular calculators are designed to calculate residues γ_{n,j}and δ_{n,j}and γ_{n,j}= (R_{nj}·_{}(α_{n}-α_{j}))mod m_{n}that δ_{n,j}=(R_{nj}·_{}(β_{n}-β_{j}))mod m_{n}, R_{nj}is determined from the solution of the comparison (R_{nj}·_{}m_{j})mod m_{n≡}1, α_{j}=A mod m_{j}that α_{n}=A mod m_{n}that β_{j}=Mod m_{j}that β_{n}=B mod m_{n}And In respectively the first and second integer operands, while the second table calculator is designed to calculate the residue of q_{n, j}and

wherethe symbol of rounding to the nearest whole number,

and integers d_{j}defined as the solution of the equation

and the fourth and fifth tabular calculators are designed to calculate the values (d_{j}·_{}γ_{n,j}·_{}β_{n})mod m_{n}and (d_{j}·_{}δ_{n,j}·_{}α_{j})mod m_{n}while the n-th input of the first the second operand connected to the first input of the first and second tabular calculators,
and the n-th input of the second operand from the first input of the third and fourth tabular transmitter j-th input of the first operand to the second input of the first table of the transmitter and the first input of the fifth table of the transmitter, the j-th input of the second operand with the second inputs of the second and third tabular calculators, the outputs of the first and third tabular calculators connected respectively to the second inputs of the fourth and fifth tabular calculators, fourth tabular calculator is the first output of the j-th device computing the remainder n-th basis, the output of the second tabular calculator - second output of the j-th device calculation of residue on the n-th ground, and the output of the fifth table calculator - the third output of the j-th device computing the remainder n-th ground, with the n-th device computing the remainder n-th base contains three computing unit for computing residues q_{n,n}that γ_{n,n}that δ_{n, n}and two block multiplication, and

wherethe symbol of rounding to the nearest whole number, integers d_{n}defined as the solution of the equation

α_{n}=Amod m_{n},

β
_{n}=Bmod m_{n},

A and b respectively of the first and second integer operands,

moreover, the i-th input (the first and second operands respectively connected to the i-th inputs (the first and second processing units, the outputs of which are connected respectively to the first inputs of the first and second multiplier units, to the second inputs of which are connected to n-th inputs of the second and first operands, respectively, and to the inputs of the third computing unit is connected to the n-th inputs of the first and second operands, and outputs the first and second multiplier units and the output of the third computing unit are, respectively, the first, second and third outputs of the n-th device computing the remainder n-th ground, with the outputs of the devices calculate the residues are connected to the inputs of adder 3N integers modulo m_{n}whose output is the output of the n-th computing unit balance.

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EFFECT: simplified construction of device.

3 dwg

FIELD: computer science, in particular, modular neuron-computer means.

SUBSTANCE: network has input layer of neurons, neuron network of end ring for determining number rank, neuron network of end ring for calculating remainder at base n+1, n-neuron networks of end ring for calculating scaled number, neuron network for calculating difference in numbers between input remainders and base remainder.

EFFECT: decreased volume of equipment, increased speed of numbers rounding and expanded functional capabilities.

1 dwg

FIELD: cryptographic method and chip-card for encoding information, methods for creating electronic signatures.

SUBSTANCE: at least one calculation step is performed, providing for realization of E operation of modular exponentiation in accordance to formula E=x^{d}(mod p·q), where d and mod p·q are components of a secret key, while parallel represent first simple multiplier, q is second simple multiplier, d is level coefficient, and x represents base, while operation E of modular exponentiation is performed in accordance to Chinese theorem about remainders.

EFFECT: decreased amount of computing operations and machine time costs during simultaneous increase of level of data protection from unsanctioned access.

4 cl

FIELD: computer science, possible use in computing devices functioning in system of remainder classes, and also communication equipment for transferring information in remainder classes system codes.

SUBSTANCE: device contains a group of constant memorizing devices, a group of registers, discharge-parallel modulus adder.

EFFECT: decreased volume of equipment and increased speed of operation when transforming a number from remainder classes system to positional code.

1 dwg

FIELD: computer engineering, possible use in digital computing devices, and also in devices for forming elements of finite fields.

SUBSTANCE: device contains adders, inverters, multipliers, multiplexer.

EFFECT: expanded functional capabilities due to expanded range of input number values.

1 dwg

FIELD: computer engineering, possible use in digital computing devices, and also in devices for forming finite field elements.

SUBSTANCE: device contains multiplier, adders, inverters, constant multipliers, multiplexer.

EFFECT: expanded functional capabilities.

1 dwg

FIELD: computer engineering, possible use in digital computing devices for forming code series, creation of which is based on finite fields theory.

SUBSTANCE: device contains block for forming partial remainders, modulus multiplexers, modulus adders.

EFFECT: expanded functional capabilities due to creation of remainders by double modulus, by calculating partial remainders from polynomial powers with their following addition in acc to coefficients of polynomial powers.

3 dwg