The method of limiting the output current

 

(57) Abstract:

The invention relates to electrical engineering and can be used in the integral analog devices. Speed limits the output current, as well as expansion of the range of regulation of the shape of the transfer characteristic is achieved in that in the method of limiting the output current is to use the dependence of the amount of alternating currents flowing in the two nonlinear electrical circuits containing a counter included p-n junction, the input voltage applied to these circuits perform linear combination of the specified sum of currents of the alternating current flowing in the third nonlinear electric circuit under the influence of the input voltage. 2 Il.

The invention relates to electrical engineering and can be used in the integral analog devices.

A known method of limiting the output current, which consists in the fact that the input voltage is applied to a nonlinear electrical circuit containing a pair of counter enabled p-n junctions, and arising in the circuit of an alternating electric current is used as the output current. (S Soclof. Analog integrated circuits. M Myristicae. M Energy, 1973. S. 15).

Also known a method of limiting the output current (the United Kingdom Patent N 2217541, CL H 03 F 1/32, 3/45), namely, that the input voltage fed to the inputs of two composite differential amplifier, and the output current is obtained by summing the output currents of these amplifiers.

The disadvantage of these methods current limitation is the slow performance while reducing the level of the output current, as well as the inability to control the shape of the transfer characteristic.

The closest to the technical nature of the claimed method is a method of limiting output current [1] consists in the fact that the input voltage is served on the first nonlinear electrical circuit formed by the first and the second counter is enabled by AC pramosone p-n-transitions, and the second nonlinear electrical circuit formed by the third and fourth counter included AC pramosone p-n-transitions.

The disadvantage of this method is the low performance at low levels, limiting the output current, as well as a small range control form transmitting characteristics.

The purpose of sirovanija shape of the transfer characteristic.

The purpose of the invention is achieved by the fact that the input voltage is served on the first nonlinear electrical circuit formed by the first and the second counter is enabled by AC pramosone p-n transitions, the second nonlinear electrical circuit formed by the third and fourth counter included AC pramosone p-n-transitions, and the third non-linear electrical circuit formed by the fifth and sixth counter included AC pramosone p-n-transitions, and the output current is formed by the formula (io=a1(i1+i2)+a2i3where i1, i2, i3the currents flowing respectively in first, second and third nonlinear electrical circuits under the influence of the input voltage; a1and a2constants.

New the essential feature of the proposed method is that the nonlinearity sold with it, the transfer characteristic is a function of the different nonlinearities three nonlinear electrical circuits, and the parameters of nonlinearity of each of these circuits can be set independently (by the proper choice of values flowing through the p-n junction displacement currents).harakteristiki, in particular, considerable non-linearity characteristics at very small values of the input voltage, when the nonlinearity of each individual nonlinear circuit is even slightly. The latter circumstance allows to effectively limit the output current at levels significantly lower values of current bias p-n junctions. As in this case, p-n-transitions remain in small-signal mode in the entire range of variation of the output current, provides better performance compared with the prototype and analogues, in which the output current limiting is achieved by operation of the respective p-n junctions in a substantially non-linear mode.

In Fig. 1 shows the electric diagram of the device, which can be implemented by the proposed method.

The device comprises a first 1 and second 2 transistors, basic-emitter p-n junction which, together with the capacity of 3 form a first non-linear circuit, the third 4 fourth 5 transistors, basic-emitter p-n junction which, together with the capacity of 6 form the second non-linear circuit, the fifth 7 and 8 sixth transistors, basic-emitter p-n junction which, together with the capacity of 9 or input device, base 2 second, fourth, 5 and 8 sixth transistors are of a second input device, the collectors of the transistors connected to the corresponding inputs of the Converter 10 which forms the output current according to the formula io=a1(i1+i2)+a2i3the outputs of the Converter 10 are the outputs of the device and connected to the load circuit 11, the bias currents of p-n junctions defined by the current generators 12 17.

In Fig. 2 depicts the transfer function implemented by the proposed method.

The proposed method is carried out using a shown in Fig.1 device as follows.

Originally electrodes of the transistors and the power bus serves a voltage of this magnitude to bring all the transistors in the active mode. After that, between the first and second inputs of the device applied input voltage.

In this case, assuming that the input frequency is much less than the cutoff frequency of the transmission factor of the transistors used in the current in the circuit with a common base, the base currents and the reverse currents of p-n junctions of the transistors are negligible in comparison with their collector currents, the resistance of the containers 3, 6 and 9 pre is transitory identical, the output current of the current generator 12 is equal to an output current of the current generator 16, the output current of the current generator 13 is equal to an output current of the current generator 17, we can write the following expression relating the magnitude of the input voltage values occurring in nonlinear electrical circuits, currents

< / BR>
where i1, i2, i3the alternating currents flowing in the first, second and third nonlinear electrical circuits, respectively;

I01the value of the output currents of the current generators 12 and 16;

I02the value of the output currents of the generators 13 and 17;

I03the value of the output currents of the current generators 14 and 15;

ttemperature potential.

Ratio (1) allow to Express the values of the currents i1+i2and i3through UI< / BR>
< / BR>
Therefore, the output current is equal to

< / BR>
An equation was implemented using the proposed method transfer characteristics may be conveniently presented in normalized form

< / BR>
From expressions (2)-(4) it follows that the shape of the transfer characteristic is determined by the coefficients k and m, i.e. the values of the constants a1and a2and the ratio of the displacement currents of p-n junctions.

Changing these settings aredata characteristic y(x) when m=2, k, as well as the corresponding dependence of y1(x) and y2(x). The dependence y(x) shown by the solid line, y1(x) and y2(x)- dashed lines.

If the ratio of m different from unity (i.e., the currents I01and I02different), and the coefficient k is negative (i.e. the constants a1and a2have opposite signs), in order to limit the iothe value of UImay be significantly less than the values UIat which there is a current limitation i1+i2and i3(see Fig. 2). This implies that the proposed method provides the ability to effectively limit the output current when the p-n junctions in small-signal mode corresponding to the minimum inertia.

Thus, the proposed method differs from the prototype and analogues advanced control range form transfer characteristics and performance limitations of the output current.

The method of limiting the output current, which consists in the fact that the input voltage is served on the first nonlinear electrical circuit formed by the first and the second counter is enabled by AC pramosone p - n perekhodnomu current pramosone p - n transitions, characterized in that the input voltage can also be enjoyed on the third nonlinear electrical circuit formed by the fifth and sixth counter included AC pramosone p n transitions, and output current is formed by the formula

ioa1(i1+ i2) + a2i3,

where i1, i2, i3the currents flowing respectively in first, second and third nonlinear electrical circuits under the influence of the input voltage;

a1and a2constants.

 

Same patents:

Bilateral limiter // 2003218

The invention relates to the field of microelectronics and can be used to amplify signals

The invention relates to an analog technique and can be used in ultra-wideband communication devices, automation, measurement and computing

Amplifier // 2065662
The invention relates to electronic devices and can be used to amplify signals with high dynamic accuracy

The invention relates to the measurement electronics, and more specifically to precision measuring operational amplifiers, and can be used, for example, in medical diagnostic equipment in the field of Electrocardiology, electroencephalography, electromyography, etc

The invention relates to measuring electronics, in particular for precision measurement of operational amplifiers, and can be used, for example, in medical diagnostic equipment in the field of electrocardiography, electroencephalography, electromyography, etc

The invention relates to the measurement electronics, and more specifically to precision measuring operational amplifiers, and can be used, for example, in medical diagnostic equipment in the field of cardiology, encephalography, biografii, etc

Amplifier // 2053592

The invention relates to electrical engineering, is designed to power the stator windings bdpt and can be used in electric drives of various devices, such as tape recorders, electromyographically and digital laser turntable

FIELD: radio and communications engineering; miscellaneous microelectronic amplifying devices.

SUBSTANCE: proposed differential amplifier has first and second parallel-balanced stages 1, 2 whose inputs are connected in parallel with transistors 1.1, 1.2 of first stage 1 whose polarity of conductivity is other than that of transistors 2.1, 2.2 of second stage 2; emitters of transistors 1.1, 1.2 are coupled with base of first additional transistor 5 whose emitter is connected through first auxiliary resistor 6 to integrated emitters of transistors 2.1, 2.2; integrated emitters of transistors 2.1, 2.2 are connected to base of second additional transistor 7 whose emitter is connected through auxiliary resistor 8 to integrated emitters of transistors 1.1, 1.2.

EFFECT: enlarged effective operating range; enhanced maximal rate of rise of output voltage.

2 cl, 15 dwg

FIELD: radio and communications engineering.

SUBSTANCE: proposed operational amplifier designed for amplifying broadband signals, including pulsed ones, in analog interface structures of various functional applications has input stage 1 made in the form of differential amplifiers whose output current is unlimited at input voltage fluctuations up to several volts; p-n-p transistors 8, 9; and n-p-n transistors 10, 11. Emitters of transistors 8 through 11 are connected to respective antiphase current outputs of stage 1; collectors of transistors 9, 11 are integrated and coupled with correcting capacitor 16 and with output buffer amplifier 17. Current followers 19, 18 are introduced between collectors of transistors 8, 9 and collectors of transistors 10, 11. Use of micron technologies with layout standards of 1.5 to 2 μm provides for speed growth at level of 4000 - 6000 V/μs.

EFFECT: enhanced speed.

8 cl, 11 dwg

FIELD: radio engineering; high-linearity voltage-current converters designed for active operation in wide range.

SUBSTANCE: proposed differential amplifier is designed for operation in miscellaneous analog integrated circuits (for instance, in high-speed operational amplifiers, analog signal multipliers, and the like), within a wide range of 50 to 60 mV up to units of Volts in nonlinear modes limited by final speed of differential amplifier. Speed of the latter rises due to dynamic growth of recharge currents through correcting capacitor at maximal rate of output voltage rise comparable with its speed in linear modes. Differential amplifier has input transistors 1, 3, reference current supplies 2, 4, auxiliary resistor 5 inserted between emitters of transistors 1, 3, and load circuit connected to collectors of transistors 1, 3. Newly introduced are transistors 8, 9 of different structure whose emitters are connected through additional resistors 10, 11 to emitters of transistors 3 and 1, respectively. Bases of transistors 8, 9 are connected to those of transistors 3, 1, respectively.

EFFECT: enlarged active operating range of differential amplifier.

4 cl, 5 dwg

FIELD: radio and communications engineering.

SUBSTANCE: proposed differential amplifier that can be used in miscellaneous microelectronic devices for amplifying and converting analog signals has input parallel-balance stage 1 incorporating first and second inputs 2, 3, as well as first and second antiphase current outputs 4, 5 and first output transistor 6 whose emitter is connected to second current output 5 of input parallel-balance stage 1, base of first output transistor 6 being coupled at ac end with first input 2 of input parallel-balance stage 1.

EFFECT: reduced input conductance of amplifier in wide frequency range and, hence, enhanced high value of boundary frequency.

12 cl, 16 dwg

Broadband amplifier // 2277752

FIELD: radio and communications engineering; miscellaneous microelectronic analog-signal amplifiers and converters.

SUBSTANCE: proposed broadband amplifier has differential stage built around transistors 3, 4 with main input 1 that functions as amplifier input and auxiliary input 2; emitters of these transistors are interconnected and collectors are coupled with load-circuit resistors 5, 6; it also has non-inverting current amplifier built around output transistor 7; differential-stage transistors 3, 4 have different polarities of conductivity and non-inverting current amplifier is provided in addition with input transistor 8 whose collector and base are integrated and connected to current supply 9 and to differential-stage auxiliary input 2, and its emitter is coupled with that of output transistor 7 having reverse polarity of conductivity whose collector is connected to differential-stage main input 1.

EFFECT: reduced input conductivity within broad frequency band and, hence, enhanced higher frequency limit.

1 cl, 4 dwg

FIELD: radio engineering.

SUBSTANCE: proposed amplifier (Fig. 3) that functions to amplify broadband and pulse signals in structure of various interfaces has input transistors 1 - 4 whose emitters are coupled with bases of respective output transistors 15 - 18, emitters of the latter being connected to those of respective input transistors 1 - 4 through additional resistors 24 - 26; inserted between emitters of output transistors 15 - 18 is resistor-diode matching sub-circuit 19.

EFFECT: enhanced speed due to reduced impact of collector junction capacitances on transient variables of nonlinear recharge processes.

4 cl, 18 dwg

FIELD: radio and communications engineering.

SUBSTANCE: proposed method designed for application in broadband and pulse signal amplifiers of miscellaneous analog interface structures to enhance their speed by 5 to 10 times using micron technology with layout standards equal to or higher than 1.5 - 2 μm includes generation of additional charge-discharge current for correcting capacitor 3 (Fig. 1) proportional to difference 8 between current value of voltage across correcting capacitor and instant output voltage of auxiliary differential stage 6 identical to limited-output-current nonlinear input differential stage 1 connected to its inputs.

EFFECT: enhanced speed.

2 cl, 12 dwg

FIELD: radio engineering, communications engineering, possible use in various microelectronic devices for amplification and transformation of analog signals.

SUBSTANCE: differential amplifier contains input differential cascade on first and second input transistors, emitters of which are connected to output of first current mirror, first and second transistors of input current compensation channel, bases of which are connected to bases of first and second input transistors, while emitters are connected to outputs of static mode stabilization circuit. Collectors of first and second transistors of input current compensation channel are connected to input of first current mirror.

EFFECT: increased depletion coefficient of input cophased signal.

4 cl, 15 dwg

FIELD: radio and communication engineering.

SUBSTANCE: proposed operational amplifier designed for amplifying broadband and pulse signals in miscellaneous analog interface structures and characterized in maximum output voltage growth to 10 000 - 160 000 V/μs using micron technologies has input differential stage 1 built around transistors 2, 3 with first reference current supply 4; input differential stage 5 built around transistors 6, 7 with second reference current supply 8, main inputs 9, 10 of differential stage 1 being connected to inputs 11, 12 of differential stage 5; intermediate push-pull stage built around intermediate amplifiers 13, 15 whose inverting inputs are connected to collectors of transistors 2, 6, respectively, and their outputs 17, 29 are coupled through ac circuit with input 18 of output stage 19 and also with correcting capacitor 21. Output 22 of ac circuit of output stage 19 is coupled through first and second resistors 25 and 26, respectively, with emitters of transistors 2, 3 and with those of transistors 6, 7.

EFFECT: enhanced maximal speed of output voltage rise.

7 cl, 19 dwg

FIELD: radio engineering for use in micro-electronic amplifiers and transformers of analog signals.

SUBSTANCE: differential amplifier (dwg.2) contains input differential cascade 1 on input transistors 2,3, emitters of which are connected to supporting current source 4 and through voltage repeater 6 - to bases of output transistors 11,12, emitters of which are connected to collectors of input transistors 2,3, bases of which are connected to bases of appropriate auxiliary transistors 9,10, emitters of which through provided additional transistors 18,19 are connected to current outputs 14,15 of output transistors 11,12, bases of transistors 18,19 are connected to collectors of transistors 2,3, while collectors of transistors 18,19 and 9,10 perform functions of appropriate current outputs (20,21 and 22,23) of parallel channel, providing amplification of large amplitudes of input signal.

EFFECT: decreased zone of non-sensitivity of pass characteristic while maintaining statistical precision at high level.

4 cl, 10 dwg

Up!