(57) Abstract:Usage: for amplification of the signals with high dynamic accuracy. The inventive amplifier, built on two operational amplifiers (high-precision and high-speed) introduces an additional resistor, and the ratio between the resistors is selected so that the total amplitude-frequency characteristic of the amplifier has a slope of - 20 dB/Dec. In the dynamic properties of the amplifier are determined by the high-speed operational amplifier and the accuracy specifications precision operational amplifier. 1 Il. The invention relates to electronic devices and can be used to amplify signals with high dynamic accuracy.Known amplifier containing the first and second operational amplifiers (OA), covered by independent negative feedbacks and connected in series  Its disadvantage is the low dynamic accuracy. Known amplifiers closest to the technical essence is the device described in . This amplifier is composed of the first OS and the second OS, the first and second resistors, and the first resi is the dominant input and output of the second OS, non-inverting input of the first OS is connected to a shared bus, non-inverting input of the second OS is connected to the output of the first OS, the output of the second OS is the output of the amplifier.The objective of the invention is to improve the dynamic accuracy. The problem is solved in that the amplifier consisting of the first OS and the second OS, the first and second resistors, the first resistor connected between the input of the amplifier and the inverting input of the first OS, a second resistor connected between the inverting input and output of the second OS, the non-inverting input of the first OS is connected to a shared bus, non-inverting input of the second OS is connected to the output of the first OS, the output of the second OS is the output of the amplifier introduces an additional resistor that is connected between the inverting inputs of the first and second OS, and the ratio of the resistors is chosen equal to (Rd+ R2)/R1K, where R1, R2, Rdrespectively the first, second and additional resistors, f1and f2the unity gain frequency of the first and second OS.The essence of the proposal is illustrated by a drawing, which shows the amplifier circuit, which contains: 1 first resistor (R1), 2 OS, 3 - additional resistor connected between the input of the amplifier and the inverting input of the first OS, a second resistor connected between the inverting input and output of the second OS, the non-inverting input of the first OS is connected to a shared bus, non-inverting input of the second OS is connected to the output of the first OS, the output of the second OS is the output of the amplifier introduces an additional resistor that is connected between the inverting inputs of the first and second OS.The amplifier circuit operates as follows: first the OS, which determines the bias voltage and temperature drift of the bias voltage of the entire amplifier is implemented on a precise OS and usually has a low performance. The second OS, which has virtually no effect on the bias voltage and temperature drift, can be implemented on the basis of a fast OS. When it arrives at the amplifier input surge in the beginning because of the lag caused by the poor performance of the first OS, the output voltage is determined by the second OS. Then, as the output voltage rise, increasingly the first OS and eventually DC only the first OS. To explain the positive effect of present OS of the linear inertia of the links of the first order. Their transmission characteristics can be made>the gains of the first and second OS on direct current, respectively,1and2their time constants. Taking into account inequalities TO1>> 1 and K2>> 1, the transfer characteristic of the amplifier can be represented as:
where K01 + (Rd+ R3)/R1, 1 + R2/R1, (3) C given that
t1/K1= 1/2f1and2/K2= 1/2f2,
where f1and f2frequency unity gain, respectively, the first and second operational amplifiers, the transfer characteristic of the amplifier can be represented in the form:
the denominator of the right side can be represented as:
where0the degree of acceleration and circular resonant frequency, and
Imagine the formula (2)
From(6), (7), (9) (11) it is seen that if the selected OU and OU the values of f1and f2known, and the value TO0specified, then the value of f0entirely defined, and T1T2T3depend on a, i.e. on the ratio Rd/R1.To declare the schema of interest is the value a defined by the formula:
When K < Kgis there
and treatment (8)
Ku(p) (K0- 1)/(1 + pT2) (15)
where T2determined (10). When K > Kg< / BR>(16)
and the formula (8) becomes
TOy(b) (1)/(1 + RT1) (17)
where T1is determined by (9). Transfer characteristics (15) and (17) corresponds to the asymptotic LATCH with a slope of -20 dB/Dec.From the above it is evident that when the conditions of the transfer function becomes close to the transfer characteristic of the inertial element of the first order, which is smaller than the reference time setting to the desired accuracy.As the first OS can be used chip type KDA, as well as a second chip type COA. Resistors can be taken of the type S2-29V.Sources of information
1. A. G. Alexenko, E. A. Particularly, G. I. Starodub. The use of precision analog circuits. M. Chapman and hall, 1985, S. 22, Fig. 1.16.2. Amplifiers with parallel channels.// Instruments and control elements and vychislitelnyi, first and second resistors, and the first output of the first resistor is the input of the amplifier and a second output connected to the inverting input of the first operational amplifier, a noninverting input connected to a shared bus, and the output from reinvestiruet input of the second operational amplifier whose output is the output of the amplifier and via a second resistor connected to the inverting input of the second operational amplifier, characterized in that it introduced an additional resistor connected between the inverting inputs of the first and second operational amplifiers, and the ratio of the resistors is selected to be
(Rd+ R2) /R1K1;
< / BR>where R1, R2, Rdfirst and second additional resistor, respectively;
f1f2the unity gain frequency of the first and second operational amplifiers.
FIELD: radio and communications engineering; miscellaneous microelectronic amplifying devices.
SUBSTANCE: proposed differential amplifier has first and second parallel-balanced stages 1, 2 whose inputs are connected in parallel with transistors 1.1, 1.2 of first stage 1 whose polarity of conductivity is other than that of transistors 2.1, 2.2 of second stage 2; emitters of transistors 1.1, 1.2 are coupled with base of first additional transistor 5 whose emitter is connected through first auxiliary resistor 6 to integrated emitters of transistors 2.1, 2.2; integrated emitters of transistors 2.1, 2.2 are connected to base of second additional transistor 7 whose emitter is connected through auxiliary resistor 8 to integrated emitters of transistors 1.1, 1.2.
EFFECT: enlarged effective operating range; enhanced maximal rate of rise of output voltage.
2 cl, 15 dwg
FIELD: radio and communications engineering.
SUBSTANCE: proposed operational amplifier designed for amplifying broadband signals, including pulsed ones, in analog interface structures of various functional applications has input stage 1 made in the form of differential amplifiers whose output current is unlimited at input voltage fluctuations up to several volts; p-n-p transistors 8, 9; and n-p-n transistors 10, 11. Emitters of transistors 8 through 11 are connected to respective antiphase current outputs of stage 1; collectors of transistors 9, 11 are integrated and coupled with correcting capacitor 16 and with output buffer amplifier 17. Current followers 19, 18 are introduced between collectors of transistors 8, 9 and collectors of transistors 10, 11. Use of micron technologies with layout standards of 1.5 to 2 μm provides for speed growth at level of 4000 - 6000 V/μs.
EFFECT: enhanced speed.
8 cl, 11 dwg
FIELD: radio engineering; high-linearity voltage-current converters designed for active operation in wide range.
SUBSTANCE: proposed differential amplifier is designed for operation in miscellaneous analog integrated circuits (for instance, in high-speed operational amplifiers, analog signal multipliers, and the like), within a wide range of 50 to 60 mV up to units of Volts in nonlinear modes limited by final speed of differential amplifier. Speed of the latter rises due to dynamic growth of recharge currents through correcting capacitor at maximal rate of output voltage rise comparable with its speed in linear modes. Differential amplifier has input transistors 1, 3, reference current supplies 2, 4, auxiliary resistor 5 inserted between emitters of transistors 1, 3, and load circuit connected to collectors of transistors 1, 3. Newly introduced are transistors 8, 9 of different structure whose emitters are connected through additional resistors 10, 11 to emitters of transistors 3 and 1, respectively. Bases of transistors 8, 9 are connected to those of transistors 3, 1, respectively.
EFFECT: enlarged active operating range of differential amplifier.
4 cl, 5 dwg
FIELD: radio and communications engineering.
SUBSTANCE: proposed differential amplifier that can be used in miscellaneous microelectronic devices for amplifying and converting analog signals has input parallel-balance stage 1 incorporating first and second inputs 2, 3, as well as first and second antiphase current outputs 4, 5 and first output transistor 6 whose emitter is connected to second current output 5 of input parallel-balance stage 1, base of first output transistor 6 being coupled at ac end with first input 2 of input parallel-balance stage 1.
EFFECT: reduced input conductance of amplifier in wide frequency range and, hence, enhanced high value of boundary frequency.
12 cl, 16 dwg
FIELD: radio and communications engineering; miscellaneous microelectronic analog-signal amplifiers and converters.
SUBSTANCE: proposed broadband amplifier has differential stage built around transistors 3, 4 with main input 1 that functions as amplifier input and auxiliary input 2; emitters of these transistors are interconnected and collectors are coupled with load-circuit resistors 5, 6; it also has non-inverting current amplifier built around output transistor 7; differential-stage transistors 3, 4 have different polarities of conductivity and non-inverting current amplifier is provided in addition with input transistor 8 whose collector and base are integrated and connected to current supply 9 and to differential-stage auxiliary input 2, and its emitter is coupled with that of output transistor 7 having reverse polarity of conductivity whose collector is connected to differential-stage main input 1.
EFFECT: reduced input conductivity within broad frequency band and, hence, enhanced higher frequency limit.
1 cl, 4 dwg
FIELD: radio engineering.
SUBSTANCE: proposed amplifier (Fig. 3) that functions to amplify broadband and pulse signals in structure of various interfaces has input transistors 1 - 4 whose emitters are coupled with bases of respective output transistors 15 - 18, emitters of the latter being connected to those of respective input transistors 1 - 4 through additional resistors 24 - 26; inserted between emitters of output transistors 15 - 18 is resistor-diode matching sub-circuit 19.
EFFECT: enhanced speed due to reduced impact of collector junction capacitances on transient variables of nonlinear recharge processes.
4 cl, 18 dwg
FIELD: radio and communications engineering.
SUBSTANCE: proposed method designed for application in broadband and pulse signal amplifiers of miscellaneous analog interface structures to enhance their speed by 5 to 10 times using micron technology with layout standards equal to or higher than 1.5 - 2 μm includes generation of additional charge-discharge current for correcting capacitor 3 (Fig. 1) proportional to difference 8 between current value of voltage across correcting capacitor and instant output voltage of auxiliary differential stage 6 identical to limited-output-current nonlinear input differential stage 1 connected to its inputs.
EFFECT: enhanced speed.
2 cl, 12 dwg
FIELD: radio engineering, communications engineering, possible use in various microelectronic devices for amplification and transformation of analog signals.
SUBSTANCE: differential amplifier contains input differential cascade on first and second input transistors, emitters of which are connected to output of first current mirror, first and second transistors of input current compensation channel, bases of which are connected to bases of first and second input transistors, while emitters are connected to outputs of static mode stabilization circuit. Collectors of first and second transistors of input current compensation channel are connected to input of first current mirror.
EFFECT: increased depletion coefficient of input cophased signal.
4 cl, 15 dwg
FIELD: radio and communication engineering.
SUBSTANCE: proposed operational amplifier designed for amplifying broadband and pulse signals in miscellaneous analog interface structures and characterized in maximum output voltage growth to 10 000 - 160 000 V/μs using micron technologies has input differential stage 1 built around transistors 2, 3 with first reference current supply 4; input differential stage 5 built around transistors 6, 7 with second reference current supply 8, main inputs 9, 10 of differential stage 1 being connected to inputs 11, 12 of differential stage 5; intermediate push-pull stage built around intermediate amplifiers 13, 15 whose inverting inputs are connected to collectors of transistors 2, 6, respectively, and their outputs 17, 29 are coupled through ac circuit with input 18 of output stage 19 and also with correcting capacitor 21. Output 22 of ac circuit of output stage 19 is coupled through first and second resistors 25 and 26, respectively, with emitters of transistors 2, 3 and with those of transistors 6, 7.
EFFECT: enhanced maximal speed of output voltage rise.
7 cl, 19 dwg
FIELD: radio engineering for use in micro-electronic amplifiers and transformers of analog signals.
SUBSTANCE: differential amplifier (dwg.2) contains input differential cascade 1 on input transistors 2,3, emitters of which are connected to supporting current source 4 and through voltage repeater 6 - to bases of output transistors 11,12, emitters of which are connected to collectors of input transistors 2,3, bases of which are connected to bases of appropriate auxiliary transistors 9,10, emitters of which through provided additional transistors 18,19 are connected to current outputs 14,15 of output transistors 11,12, bases of transistors 18,19 are connected to collectors of transistors 2,3, while collectors of transistors 18,19 and 9,10 perform functions of appropriate current outputs (20,21 and 22,23) of parallel channel, providing amplification of large amplitudes of input signal.
EFFECT: decreased zone of non-sensitivity of pass characteristic while maintaining statistical precision at high level.
4 cl, 10 dwg